CN205901700U - An active gate control circuit - Google Patents

Abstract

The utility model provides an active gate pole control circuit which it includes voltage feedback control circuit unit, active voltage clamp circuit unit, high -speed high gain amplifier unit and gate drive power amplifier unit characterized in that, its superiority: 1, circuit structure is simple, easy to realize that work efficiency is high with stability, 2, switching loss is low, restraines electromagnetic interference, 3, the degree of accuracy is higher, 4, power semiconductor to on -off control has the commonality.

Description

An active gate control circuit

(1) Technical field:

The utility model relates to an electromagnetic interference suppression technology of a power semiconductor device, in particular to an AGC (Active Gate Control, referred to as AGC, active gate control) circuit.

(two) background technology:

With the continuous development of power electronics technology, the role of power electronics systems in modern industrial fields is gradually obvious, such as motor drives, electric vehicles, and solar and wind energy and other fields. With the continuous expansion of the application field of power electronic system, the electromagnetic interference generated by it has become a research hotspot. Therefore, it is very necessary to study the suppression technology of the system EMI (Electromagnetic interference, referred to as EMI, electromagnetic interference).

The relevant standards of IEC (International Electrotechnical Commission, referred to as International Electrotechnical Commission) define EMC (Electromagnetic compatibility, referred to as EMC, electromagnetic compatibility) as: a system or device can operate normally in the electromagnetic environment in which it works, and is not compatible with the same environment. the ability of other equipment to generate intolerable electromagnetic interference. Electromagnetic interference is very harmful. On the one hand, it affects the normal operation of devices, equipment and systems, greatly shortening their service life; It will be affected by electromagnetic radiation and disrupt normal life. As early as the 1940s, European and American countries had proposed the concept of EMC. In the 1960s, computer-aided analysis of electromagnetic compatibility appeared. High achievements, developed a large number of different scales of EMC analysis and prediction software, has completed a lot of experimental research and analysis modeling work, and then the method of describing EMI based on physical modeling has been developed. EMC-related standards in developed countries such as Europe and the United States include basic standards, general standards, product standards, etc., including the International Electrotechnical Commission's IEC61000 and CISPR (International Special Committee on Radio Interference, referred to as CISPR, International Special Committee on Radio Interference) series standards, the European Community The EN (European Norm, referred to as EN, European Standard) series of standards, the FCC (Federal Communications Commission, referred to as FCC, the United States Federal Communications Commission) series of standards, North American standards, etc., have formed a complete set of EMC systems. For example, CISPR16 "Measurement of Radio Interference and Immunity" is the basic emission standard; IEC6100-4 series standards are the basic standards for immunity that are relatively systematic in the world at present.

Our country started relatively late in EMC research, and currently mainly stays in the stage of passive or semi-active solution to electromagnetic interference problems. In the 1970s, some domestic units, especially military units, encountered electromagnetic compatibility problems in actual work, and began to attract widespread attention. In the 1980s, the National Radio Interference Standardization Technical Committee was established. After the 1990s, aerospace, communications, electronics and other departments established a number of EMC experimental test centers, and carried out corresponding research and applications in engineering design and predictive analysis. Compared with electromagnetic interference emission, the research on electromagnetic susceptibility started in the 1970s. With the rapid development of electromagnetic compatibility, some domestic research institutes and universities have gradually established electromagnetic compatibility laboratories to conduct electromagnetic compatibility testing and certification and electromagnetic environment testing and evaluation.

EMC includes two aspects: EMI and EMS (Electromagnetic Susceptibility, referred to as EMS, electromagnetic susceptibility). EMI refers to the degradation of product performance due to interference caused by electronic equipment; EMS refers to the ability of a product to resist interference from surrounding equipment. The generation of EMI must have three major elements: interference source, coupling path and sensitive equipment. The interference source emits EMI energy, which is transmitted to the sensitive equipment through the coupling path, thereby affecting the normal operation of the sensitive equipment. The source of electromagnetic interference is the primary factor considered when studying EMC problems, but the existence of the source of interference may not necessarily cause electromagnetic interference, that is, the source of interference is a necessary condition for generating EMI. Electromagnetic interference sources include any components, natural phenomena, electronic equipment or systems that can cause EMI to occur. According to different interference methods, interference sources can be divided into external and internal interference sources. The coupling channel, also known as the coupling channel, is the channel or medium for transmitting EMI. EMI coupling pathways include conduction and radiation coupling pathways. Conducted coupling paths require that electromagnetic energy can be connected in a circuit loop between the source of EMI emissions and sensitive equipment. The connecting circuit uses the power supply, power line, wire, ground plane, etc. as the propagation medium. Once two circuits are directly connected to the return path, conductive coupling will be generated. The radiation coupling path is the propagation of energy by the interference source in the form of electromagnetic field, which is divided into near-field and far-field coupling modes. Sensitive equipment refers to equipment that receives EMI, and can also be said to have an impact on EMI. Sensitive equipment may be a certain component, a part or the whole electronic equipment in the electronic equipment.

In power electronic systems, the commonly used power switching device is IGBT, which is mainly due to the following advantages: 1) IGBT can be used in high-voltage and high-current environments; 2) IGBT has fast short-circuit current handling capability; 3) IGBT is a voltage-controlled device, so it is easier to control the switching action of the device through the gate signal. Due to the high du/dt and di/dt formed by the power switching device during the fast on-off action, high-order harmonics are generated, which become the main source of EMI interference in the power electronic system. Under the action of du/dt, a pulse current will be generated during the continuous charge and discharge process of the capacitor or parasitic capacitor. When di/dt acts on the inductance or stray inductance, a certain pulsating voltage will be induced, and these pulsating signals The resulting high-frequency oscillating waves will cause extremely serious interference problems to the entire system. Therefore, it is very necessary to consider the technology of suppressing system EMI from the perspective of IGBT control strategy. Based on this, a new type of IGBT active gate control is proposed to limit the voltage overshoot through the voltage V _CE feedback network between the collector and emitter. The amount can effectively reduce the turn-off loss and suppress the electromagnetic interference of the system.

(3) Contents of utility model:

The purpose of the utility model is to provide an active gate control circuit, which solves the problems that the electromagnetic interference affects the reliability of the system, the failure rate increases, and the electromagnetic compatibility standard cannot be reached. It is a circuit with simple structure, convenient operation, and commercialization. The purpose of reducing electromagnetic interference noise can be achieved by using a promising structure and limiting the voltage overshoot of the power semiconductor device through the voltage V _CE feedback network between the collector and the emitter.

The technical scheme of the utility model: an active gate control circuit, including a PWM (Pulse WidthModulation, PWM for short, pulse width modulation) unit, a resistor Rb, a resistor Rg and an IGBT, characterized in that it includes a voltage feedback control circuit unit, Active voltage clamping circuit unit, high-speed high-gain amplifier unit and gate drive power amplifier unit; wherein, the active gate control circuit is connected between the IGBT gate G terminal and the collector C terminal; the gate The input end of the drive power amplifier unit is connected to one end of the resistor Rb, and its output end is connected to the gate G terminal of the IGBT through the resistor Rg; the other end of the resistor Rb receives the voltage signal V _I from the PWM unit; the high-speed high The input end of the gain amplifier unit is connected to the output end of the voltage feedback control circuit unit, and its output end is connected to one end of the gate drive power amplifier unit connected to the resistor Rb; the input end of the voltage feedback control circuit unit is connected to the active voltage clamp The output end of the circuit unit is connected to the input end of the high-speed high-gain amplifier unit; the input end of the active voltage clamping circuit unit is connected to the gate G terminal of the IGBT.

The voltage feedback control circuit unit is composed of a voltage rise rate feedback module, a charging and discharging capacitor C1, a diode D2 and a diode D3; wherein the voltage rising rate feedback module is composed of a transient suppression diode Z2, a resistor R2 and a charging and discharging capacitor C2 connected in series Composition; the anode of the transient suppression diode Z2 is connected to one end of the resistor R2; the other end of the resistor R2 is connected to one end of the charge and discharge capacitor C2; the other end of the charge and discharge capacitor C2 is connected to the anode of the diode D2 and the diode D3 Negative electrode; the charging and discharging capacitor C1 is connected in parallel with the transient suppression diode Z2 and the resistor R2.

The gate drive power amplifier unit is composed of a triode T2 and a triode T3; the two bases of the triode T2 and the triode T3 are connected, and the two emitters are connected; the collector of the triode T2 is connected to a +15V power supply, and It is connected with the high-speed high-gain amplifier unit; the collector of the triode T3 is connected with the -15V power supply, and is connected with the anode of the diode D3 in the voltage feedback control circuit unit.

The transistor T2 is an NPN transistor; the transistor T3 is a PNP transistor.

The high-speed high-gain amplifier unit is composed of a resistor R3, a resistor R4, a transistor T4, and a diode D; the resistor R3 and the resistor R4 are connected in series; the other end of the resistor R3 is connected to the negative pole of the diode D2; the other end of the resistor R4 One end is connected to one end of the resistor Rb connected to the gate drive power amplifier unit; the gate of the transistor T4 is connected to one end of the resistor R3 connected to the resistor R4, and its source is connected to one end of the resistor Rb connected to the gate drive power amplifier unit. The drain is connected to the collector of the transistor T2 in the gate drive power amplifier unit; the anode of the diode D is connected to the source of the transistor T4, and the cathode is connected to the drain of the transistor T4.

The transistor T4 is an N-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET for short, Metal-Oxide Semiconductor Field-Effect Transistor) transistor.

The active voltage clamping circuit unit is composed of a TVS diode Z1, a resistor R1 and a diode D1 connected in series; the negative pole of the TVS diode Z1 is connected to the positive pole of the TVS diode Z2, and its positive pole is connected to the positive pole of the resistor R1. One end is connected; the other end of the resistor R1 is connected to the anode of the diode D1; the cathode of the diode D1 is connected to the gate G terminal of the IGBT.

The active voltage clamping circuit unit also includes a voltage source and a diode D4; the cathode of the diode D4 is connected to a +15V power supply, and its anode is connected to the gate G terminal of the IGBT.

IGBT electromagnetic interference suppression method of the present utility model:

① Input the voltage signal V _I of the PWM unit, the collector C terminal of the IGBT is connected to the positive pole of the DC bus, and is used for the on-off of the active gate control circuit;

② At the moment when the IGBT is turned off, the voltage V _GE between the gate and the emitter is falling, and the AGC active gate control has not yet taken effect;

When the voltage V _CE between the collector and the emitter starts to rise, the AGC starts to work, and the collector current i _c1 passes through the voltage feedback control circuit unit composed of the charge and discharge capacitor C1, the charge and discharge capacitor C2 and the diode D2 to control the IGBT in advance The voltage change rate of V _CE during the shutdown process dV _CE /dt;

At this time, the positive pole of diode D3 is connected to the negative pole of the power supply, and the negative pole is equivalent to being connected to the positive pole of the power supply, which prevents the power supply from being damaged by the reverse voltage of the external circuit and plays a protective role. The expression of the collector current i _c1 is as follows:

${\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}{{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; \&CenterDot;</span>\frac{{\mathrm{<span\; class="notranslate">\; dV</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; E.</span>}}}{\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

③ During the turn-off process of the IGBT, when the voltage V _GE between the gate and the emitter rises to V _DC , which is the breakdown voltage of the transient suppression diode Z2, and the transient suppression diode Z2 is broken down, the collector current i _c2 passes through the instantaneous State suppression diode Z2, resistor R2, charge and discharge capacitor C2 and diode D2 form a voltage feedback control circuit unit. At this time, due to the breakdown of the transient suppression diode Z2, the charge and discharge capacitor C1 is short-circuited, and the collector current i _c2 passes through the resistor R3 And resistor R4, resistor R3 play the role of current limiting, when the voltage of resistor R4 is large enough, that is, the voltage change rate dV _CE /dt is large enough, the transistor T4 is turned on, reducing the gate voltage V _G to the control of the collector current _ic The impact of delay; the gate drive power amplifier unit composed of transistor T2 and transistor T3 recharges the gate of the IGBT, so as to ensure that V _GE is maintained at the Miller platform and compensate for the delay of the active gate control circuit; at this time The collector current _ic2 of the collector only flows through the charge and discharge capacitor C2, and the voltage change rate dV _CE /dt reflects the change of the collector current _ic of the IGBT. Due to the effect of _ic2 , the discharge speed of the IGBT gate is reduced, so The collector current change rate di _c /dt is also reduced, thereby improving the V _CE voltage spike, and the expression of the collector current i _c2 is as follows:

${\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&CenterDot;</span>\frac{{\mathrm{<span\; class="notranslate">\; dV</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; E.</span>}}}{\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

④ During the turn-off process of the IGBT, when the voltage V _GE between the gate and the emitter breaks down the transient suppression diode Z1, the active voltage clamping circuit unit starts to work; the function of the voltage source is to clamp the gate voltage V _G , so that the gate shock voltage will not be too high, the diode D4 is to turn on the current flowing from the gate to the voltage source, and to cut off the current from the voltage source to the gate, which plays a role in protecting the IGBT; the gate drives the power amplifier unit to the gate of the IGBT recharging, thereby suppressing the V _CE voltage spike between the IGBT collector and emitter;

⑤In the case of traditional gate control and active gate control, use the interference extractor to measure the conducted interference at both ends of the DC side power supply of the system respectively, and obtain the electromagnetic interference of the phase line L and neutral line N mixed interference at both ends of the DC side power supply compare spectrum;

⑥Separate the mixed interference measured in the above ⑤, and obtain the common-mode interference spectrum and differential-mode interference spectrum in the two cases of traditional gate control and active gate control.

Working principle of the utility model: the structural feature of the active gate control circuit is to set different turn-off feedback gains. Composed of R2, an active voltage clamping circuit unit composed of a transient suppression diode Z1, a resistor R1, a diode D1, a voltage source and a diode D4, and a high-speed high-gain amplifier unit composed of a resistor R3, a resistor R4, a transistor T4 and a diode D, The gate drive power amplifier is composed of the transistor T2 and the transistor T3 to recharge the gate. The GC terminal of the IGBT is connected to the active gate control circuit, and the circuit obtains different feedback voltage gains at the moment of turn-off by controlling, and suppresses V _CE voltage spikes. The suppression method uses an active gate control circuit connected to the system. By integrating the advantages of voltage rise rate feedback and Zener tube clamp control, the control circuit is composed of simple analog components to suppress V _CE voltage spikes. Different voltage change rates dV _CE /dt are realized during the breaking process.

Advantages of the utility model: 1. The control circuit is composed of analog elements, the circuit structure is simple and easy to implement, and compared with the prior art, the work efficiency and stability are improved; 2. The control circuit is combined with transient suppression Diode and Zener tube clamping control, by obtaining different voltage change rates when turned off, can effectively suppress collector current and turn-off voltage peaks, while reducing voltage switching losses and suppressing electromagnetic interference in the system; 3. By adjusting The charge and discharge capacitor C1 can control the rising slope of V _CE , and the charge and discharge capacitor C2 can control the maximum value of V _CE . Even if the parasitic inductance in the circuit is large, the active gate control circuit can effectively suppress the voltage spike by adjusting the capacitance value ; 4. The accuracy is high, and it can be integrated with the existing driver board, which has the prospect of commercial utilization; 5. Based on the PWM control strategy, it has universality for power semiconductor devices controlled by switches.

(4) Description of drawings:

Fig. 1 is a circuit structure diagram of an active gate control circuit involved in the present invention.

FIG. 2 is a schematic diagram of the circuit structure of an active gate control circuit involved in the present invention.

FIG. 3 is a schematic diagram of a series circuit simulation principle of an active gate control circuit involved in the present invention.

4 is a schematic diagram of the operation simulation of an IGBT electromagnetic interference suppression method for an active gate control circuit of the present invention (wherein, the simulation conditions are DC voltage 150V, resistance 100Ω, and parasitic inductance 10uH).

FIG. 5 is a simulation voltage waveform of the switching process of two IGBT series circuits of the same model under the simulation model of the series circuit in FIG. 3 .

FIG. 6 is a simulation comparison diagram of mixed interference between phase line L and neutral line N at both ends of the DC side power supply in step ⑤ of an IGBT electromagnetic interference suppression method for an active gate control circuit.

FIG. 7 is a simulation comparison diagram of common-mode interference and differential-mode interference at both ends of the DC side power supply in step ⑥ of an IGBT electromagnetic interference suppression method for an active gate control circuit.

Among them, 1 is a high-speed high-gain amplifier unit; 2 is a gate drive power amplifier unit; 3 is an active voltage clamping circuit unit; 4 is a voltage rise rate feedback module.

(5) Specific implementation methods:

Embodiment: a kind of active gate control circuit (see Fig. 1, Fig. 2), comprise PWM unit, resistance Rb, resistance Rg and IGBT, it is characterized in that it comprises voltage feedback control circuit unit, active voltage clamping circuit unit 3. A high-speed high-gain amplifier unit 1 and a gate drive power amplifier unit 2; wherein, the active gate control circuit is connected between the IGBT gate G terminal and the collector C terminal; the gate drive power amplifier unit The input end of 2 is connected to one end of the resistor Rb, and its output end is connected to the gate G terminal of the IGBT through the resistor Rg; the other end of the resistor Rb receives the voltage signal V _I from the PWM unit; the high-speed high-gain amplifier unit The input terminal of 1 is connected to the output terminal of the voltage feedback control circuit unit, and its output terminal is connected to one end of the gate drive power amplifier unit 2 connected to the resistor Rb; the input terminal of the voltage feedback control circuit unit is connected to the active voltage clamping circuit The output terminal of the unit 3 is connected, and its output terminal is connected with the input terminal of the high-speed high-gain amplifier unit 1; the input terminal of the active voltage clamping circuit unit 3 is connected with the gate G terminal of the IGBT.

The voltage feedback control circuit unit (see Figure 2) is composed of a voltage rise rate feedback module 4, a charging and discharging capacitor C1, a diode D2 and a diode D3; wherein the voltage rise rate feedback module 4 is composed of a transient suppression diode Z2, a resistor R2 It is connected in series with the charge and discharge capacitor C2; the anode of the transient suppression diode Z2 is connected to one end of the resistor R2; the other end of the resistor R2 is connected to one end of the charge and discharge capacitor C2; the other end of the charge and discharge capacitor C2 is connected to a diode The anode of D2 and the cathode of diode D3; the charging and discharging capacitor C1 is connected in parallel with the transient suppression diode Z2 and the resistor R2.

The gate drive power amplifier unit 2 (see Figure 2) is composed of a triode T2 and a triode T3; two bases are connected between the triode T2 and the triode T3, and two emitters are connected; the collector of the triode T2 connected to +15V power supply; and connected to the high-speed high-gain amplifier unit 1; the collector of the triode T3 connected to -15V power supply, and connected to the anode of diode D3 in the voltage feedback control circuit unit.

The transistor T2 is an NPN transistor; the transistor T3 is a PNP transistor (see FIG. 2 ).

Described high-speed high-gain amplifier unit 1 (seeing Fig. 2) is made of resistance R3, resistance R4, transistor T4 and diode D; Described resistance R3 and resistance R4 are connected in series; The other end of described resistance R3 is connected with the cathode of diode D2; The other end of the resistor R4 is connected to one end of the resistor Rb connected to the gate drive power amplifier unit 2; the gate of the transistor T4 is connected to one end of the resistor R3 connected to the resistor R4, and the source is connected to the gate drive power amplifier of the resistor Rb One end of the unit 2 is connected, and the drain is connected to the collector of the transistor T2 in the gate drive power amplifier unit 2; the anode of the diode D is connected to the source of the transistor T4, and the cathode is connected to the drain of the transistor T4.

The transistor T4 is an N-channel MOSFET (see FIG. 2 ).

The active voltage clamping circuit unit 3 (see Figure 2) is composed of a TVS diode Z1, a resistor R1 and a diode D1 connected in series; the negative pole of the TVS diode Z1 is connected to the positive pole of the TVS diode Z2, Its anode is connected to one end of the resistor R1; the other end of the resistor R1 is connected to the anode of the diode D1; the cathode of the diode D1 is connected to the gate G terminal of the IGBT.

The active voltage clamping circuit unit 3 also includes a voltage source and a diode D4; the cathode of the diode D4 is connected to a +15V power supply, and its anode is connected to the gate G terminal of the IGBT.

Referring to Figure 1 and Figure 2, an active gate control circuit is set for the high-power switching device IGBT;

As shown in Figure 2, the circuit divides the turn-off process into three parts, using two charge and discharge capacitors and TVS (TransientVoltage Suppressors, referred to as TVS, transient voltage suppressor) to obtain different feedback gains at the moment of turn-off, and then play a role The function of suppressing the shutdown voltage and controlling its rising slope. At the moment when the IGBT is turned off, when the voltage V _GE between the gate and the emitter drops, the AGC has not yet worked. When the V _CE starts to rise, the collector current i _c1 flows through the charging and discharging capacitor C1 and the charging and discharging capacitor C2, expressing The formula is as follows:

${\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}{{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; \&Center\; Dot;</span>\frac{{\mathrm{<span\; class="notranslate">\; dV</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; E.</span>}}}{\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

When V _GE rises to V _DC (that is, the breakdown voltage of the TVS diode Z2), the TVS diode Z2 short-circuits the charging and discharging capacitor C1, and the collector current i _c2 at this time only flows through the charging and discharging capacitor C2, the expression as follows:

${\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>\frac{{\mathrm{<span\; class="notranslate">\; dV</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; E.</span>}}}{\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

Fig. 3 is a schematic diagram of IGBT series circuit, DC power supply U _dc =150V; load R _load =100Ω; stray and parasitic inductance L _s =10uH. The two drive signals are +20V, 0V pulse modulation wave signal, and the switching frequency is 10kHz; the switch device IGBT type is SKM75GB063D; the resistance Rg is 50Ω. Use LISN (Line Impedance Stabilization Network, referred to as LISN, line impedance stabilization network) to extract the mixed interference at both ends of the DC side power supply, and separate CM (Common mode, referred to as CM, common mode interference) and DM (Differential mode, referred to as DM, differential mode interference) ). Mode 1 is traditional gate control where both IGBTs are connected to resistor Rg, and mode 2 is active gate control where both IGBTs are connected to AGC.

Figure 4 is a schematic diagram of the simulation structure under the series structure built in the saber simulation environment. The simulation conditions are DC voltage 150V, load resistance 100Ω; stray and parasitic inductance 10uH.

Figure 5 is the simulation voltage V _CE waveform of the switching process of two IGBT series circuits of the same type in two modes. Among them, the V _CE1 line is the voltage waveform under the traditional gate control of mode 1, and the V _CE2 line is the voltage waveform under the active gate control of the mode 2. It can be seen from the figure that when the AGC is connected, the peak value of the V _CE voltage is significantly reduced, and the suppression effect of the overshoot of the cut-off voltage is good. It is proved that this circuit has a good suppression effect on the voltage spike of IGBT. Moreover, the rise time of the voltage is increased, which reduces the turn-off loss, and the active control can also effectively suppress electromagnetic interference.

Figure 6 is the mixed interference simulation waveform of the phase line L and the neutral line N at both ends of the DC side power supply. Among them, the L1 line is the mixed interference simulation curve of the phase lines L at both ends of the DC side power supply under the traditional gate control of mode 1, and the L2 line is the mixed interference simulation curve of the phase lines L at both ends of the DC side power supply under the mode 2 active gate control ; N1 line is the mixed interference simulation curve of the neutral line N at both ends of the DC side power supply under mode 1 traditional gate control, and N2 line is the mixed interference simulation curve of the neutral line N at both ends of the DC side power supply under mode 2 active gate control. It can be seen from the figure that the electromagnetic interference intensity of the series circuit is relatively large, and the mixed interference is between 60-120dBuV, which exceeds the limit specified in the national standard GB 9254-2008, as shown in Table 1. Therefore, the AGC control method has a better suppression effect on electromagnetic interference.

Table 1 Limits of Conducted Disturbance at Power Terminals of Class B Equipment Under Test

Figure 7 shows the CM/DM simulation waveforms at both ends of the DC side power supply. Among them, the CM1 line is the common mode interference simulation curve at both ends of the DC side power supply under the traditional gate control of mode 1, the CM2 line is the common mode interference simulation curve at both ends of the DC side power supply under the mode 2 active gate control; the DM1 line is the mode 1 The simulation curve of differential mode interference at both ends of the DC side power supply under traditional gate control, and the DM2 line is the simulation curve of differential mode interference at both ends of the DC side power supply under mode 2 active gate control. According to the formula (3), use the waveform calculator to calculate the CM/DM waveform, where _VR1 and _VR2 are the interference voltage values of the L and N lines on the DC side, respectively.

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$

The waveform CM1 after separation of traditional gate control is between 30-80dBuV, and the waveform of DM1 is between 60-110dBuV. After adopting the AGC control method, the common-mode interference CM2 increases in the low frequency band, and decreases by 5-20dBuV above the 2MHz frequency band; the differential-mode interference DM2 decreases by 10-30dBuV in the entire frequency band. Therefore, the AGC method can effectively suppress system common mode/differential mode interference.

The simulation results show that the active control method can reduce the interference of the system, and the suppression effect on low-frequency interference (below 1MHz) is small, but the suppression effect on high-frequency interference (above 1MHz) is obvious, so the active gate control method is adopted Inhibition is better. It can be applied in various power electronic devices and has great significance in engineering practice.

Claims (8)

1. An active gate control circuit, comprising a PWM unit, resistance Rb, resistance Rg and IGBT, is characterized in that it comprises a voltage feedback control circuit unit, an active voltage clamping circuit unit, a high-speed high-gain amplifier unit and a gate drive power amplifier unit; wherein, the active gate control circuit is connected between the IGBT gate G terminal and the collector C terminal; the input terminal of the gate drive power amplifier unit is connected to one end of the resistor Rb, and its output The terminal is connected to the gate G terminal of the IGBT through the resistor Rg; the other end of the resistor Rb receives the voltage signal V _I from the PWM unit; the input terminal of the high-speed high-gain amplifier unit is connected to the output terminal of the voltage feedback control circuit unit , its output end is connected to one end of the gate drive power amplifier unit connected to the resistor Rb; the input end of the voltage feedback control circuit unit is connected to the output end of the active voltage clamping circuit unit, and its output end is connected to the high-speed high-gain amplifier unit The input end of the active voltage clamping circuit unit is connected to the gate G terminal of the IGBT. 2. An active gate control circuit according to claim 1, wherein the voltage feedback control circuit unit is composed of a voltage rise rate feedback module, a charging and discharging capacitor C1, a diode D2, and a diode D3; wherein the voltage The rate of rise feedback module is composed of a transient suppression diode Z2, a resistor R2 and a charging and discharging capacitor C2 connected in series; the anode of the transient suppressing diode Z2 is connected to one end of the resistor R2; the other end of the resistor R2 is connected to the charging and discharging capacitor C2 One end; the other end of the charge and discharge capacitor C2 is connected to the anode of the diode D2 and the cathode of the diode D3; the charge and discharge capacitor C1 is connected in parallel with the transient suppression diode Z2 and the resistor R2. 3. A kind of active gate control circuit according to claim 1, characterized in that said gate drive power amplifier unit is composed of triode T2 and triode T3; two bases are connected between said triode T2 and triode T3 , the two emitters are connected; the collector of the triode T2 is connected to the +15V power supply, and is connected to the high-speed high-gain amplifier unit; the collector of the triode T3 is connected to the -15V power supply, and is connected to the diode D3 in the voltage feedback control circuit unit Positive connection. 4. An active gate control circuit according to claim 3, characterized in that said transistor T2 is an NPN transistor; said transistor T3 is a PNP transistor. 5. A kind of active gate control circuit according to claim 1, characterized in that said high-speed high-gain amplifier unit is composed of resistor R3, resistor R4, transistor T4 and diode D; said resistor R3 and resistor R4 are connected in series; The other end of the resistor R3 is connected to the cathode of the diode D2; the other end of the resistor R4 is connected to one end of the resistor Rb connected to the gate drive power amplifier unit; the gate of the transistor T4 is connected to one end of the resistor R4 with the resistor R3 connected, its source is connected to one end of the gate drive power amplifier unit connected to the resistor Rb, and its drain is connected to the collector of the triode T2 in the gate drive power amplifier unit; the positive pole of the diode D is connected to the source of the transistor T4, The negative electrode is connected to the drain of the transistor T4. 6. An active gate control circuit according to claim 5, characterized in that said transistor T4 is an N-channel MOSFET transistor. 7. A kind of active gate control circuit according to claim 1, characterized in that said active voltage clamping circuit unit is composed of transient suppression diode Z1, resistor R1 and diode D1 in series; said transient suppression The cathode of the diode Z1 is connected to the anode of the transient suppression diode Z2, and its anode is connected to one end of the resistor R1; the other end of the resistor R1 is connected to the anode of the diode D1; the cathode of the diode D1 is connected to the gate G terminal of the IGBT connect. 8. A kind of active gate control circuit according to claim 7, characterized in that the active voltage clamping circuit unit also includes a voltage source and a diode D4; the cathode of the diode D4 is connected to a +15V power supply, Its anode is connected to the gate G terminal of the IGBT.