CN205725693U - A kind of high-speed isolated Drive Protecting Circuit of SiC-MOSFET - Google Patents
A kind of high-speed isolated Drive Protecting Circuit of SiC-MOSFET Download PDFInfo
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- CN205725693U CN205725693U CN201620319583.9U CN201620319583U CN205725693U CN 205725693 U CN205725693 U CN 205725693U CN 201620319583 U CN201620319583 U CN 201620319583U CN 205725693 U CN205725693 U CN 205725693U
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Abstract
The utility model discloses the high-speed isolated Drive Protecting Circuit of a kind of SiC MOSFET, including high speed CMOS digital isolation circuit, high-speed driving circuit, grid source electrode overvoltage crowbar and negative voltage generating circuit.High speed CMOS digital isolation circuit can realize the strict potential isolation of input and drive circuit, and can guarantee that the rapidity of driving；High-speed driving circuit can provide powerful driving electric current；Grid source electrode overvoltage crowbar is possible to prevent grid source electrode overvoltage occur；Negative voltage generating circuit, to providing a negative voltage between grid source electrode, makes SiC MOSFET reliable turn-off.This utility model can be used on fast driving SiC MOSFET in high-frequency circuit, has rapidity, isolation, and defencive function reliably concurrently.
Description
Technical field
This utility model relates to MOSFET drive circuit, especially relates to the high-speed isolated Drive Protecting Circuit of a kind of SiC-MOSFET.
Background technology
Along with Power Electronic Technique develops towards high frequency, high-power direction, it is increasingly difficult to meet requirement based on the power electronic devices of Si material；Wide band gap semiconductor device becomes the study hotspot of power electronic devices by its prominent performance advantage, and is gradually applied in commercial production.Wherein SiC-MOSFET is as electrode control type device, and switching speed grade fast, pressure is high, have good heat stability, can under the adverse circumstances such as high temperature, high radiation reliably working.But SiC-MOSFET threshold voltage of the grid is less, it is easily subject to circuit interference generation and opens by mistake logical；For improving reliability, it is desirable to SiC-MOSFET uses negative pressure to turn off, drive circuit isolated drive circuit to be designed to；In order to ensure the rapidity of SiC-MOSFET switching speed, it is desirable to drive circuit provides sufficiently large driving electric current；For preventing SiC-MOSFET grid oxic horizon from puncturing, gate source voltage not can exceed that permissible value.
Due to Si device and the difference of SiC device physical characteristic, and SiC-MOSFET all cannot meet the driving requirement of SiC-MOSFET to drive circuit isolation performance, quick performance, the rigors of driving force, drive circuit based on the design of Si device.Need to design and a there is good isolating power, the high speed SiC-MOSFET drive circuit of grid source electrode protective capability.
Summary of the invention
Technical problem to be solved in the utility model is to provide a kind of high-speed isolated drive circuit being applicable to SiC-MOSFET, and has grid source electrode overvoltage protection and negative pressure turn-off capacity.
The technical scheme that the above-mentioned technical problem of this utility model solution is used is: the high-speed isolated Drive Protecting Circuit of a kind of SiC-MOSFET, it is characterized in that including that high speed CMOS digital isolates circuit, high-speed driving circuit, grid source electrode overvoltage crowbar and negative voltage generating circuit, input signal is connected with described high speed CMOS digital isolation circuit, described high speed CMOS digital isolation circuit is connected with high-speed driving circuit, described high-speed driving circuit is connected with SiC-MOSFET grid, described grid source electrode overvoltage crowbar is connected with SiC-MOSFET grid source electrode, described negative voltage generating circuit is connected with SiC-MOSFET source electrode.
Described high speed CMOS digital isolation circuit includes high speed CMOS digital isolating chip Si8710, the first resistance, the first electric capacity and the second electric capacity；Input signal is connected with described isolating chip the first, the 3rd pin；Described first resistance one end and isolating chip the 6th pin connect, and the first resistance other end and the 5th pin connect；Described first electric capacity one end and isolating chip the 5th pin connect, and the first electric capacity other end and isolating chip the 4th pin connect；Described second electric capacity one end and isolating chip the 6th pin connect, and the second electric capacity other end and isolating chip the 4th pin connect；Described isolating chip the second pin is not connected to, the 4th pin ground connection, and the 6th pin connects power supply.
Described high-speed driving circuit includes ultrahigh speed driving chip IXDN609, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity；Described 3rd electric capacity one end and driving chip the first pin connect, the 3rd electric capacity other end ground connection；Described 4th electric capacity one end and driving chip the 4th pin connect, the 4th electric capacity other end ground connection；Described 5th electric capacity one end and driving chip the 5th pin connect, the 5th electric capacity other end ground connection；Described driving chip the second pin is connected with isolating chip the 5th pin；Described driving chip the 3rd pin is not connected to, and the 6th and the 7th pin is connected with SiC-MOSFET grid, and the 8th pin connects power supply.
Described grid source electrode overvoltage crowbar includes that the first stabilivolt 1N4732A and the second stabilivolt 1N4749A, described first stabilivolt positive pole are connected with SiC-MOSFET grid, and the first stabilivolt negative pole and the second stabilivolt negative pole connect；Described second stabilivolt positive pole and SiC-MOSFET source electrode connect.
Described negative voltage generating circuit includes the second resistance and the 3rd resistance, described second resistance and the 3rd resistant series, and series connection common port is connected with SiC-MOSFET source electrode；The described second resistance other end is connected with power supply；Described 3rd resistance other end ground connection.
Compared with prior art, the utility model has the advantages that employing high speed CMOS digital isolating chip, have extremely strong isolating power and propagation delay to be only 30ns, it is ensured that the rapidity of drive circuit；Use ultrahigh speed driving chip signal elevating time to be only 26ns, can be that SiC-MOSFET provides the maximum drive current being up to 9A, SiC-MOSFET input capacitance is carried out quick charge, accelerate to open speed；Use electric resistance partial pressure to provide for grid source electrode and turn off negative voltage, reduce the cost of power supply；Stabilivolt is used to prevent grid source electrode overvoltage, it is ensured that the reliability of drive circuit.
Accompanying drawing explanation
Fig. 1 is driving circuit structure block diagram of the present utility model.
Fig. 2 is driving circuit principle figure of the present utility model.
Detailed description of the invention
Below in conjunction with accompanying drawing embodiment, this utility model is described in further detail.
With reference to Fig. 1; a kind of high-speed isolated Drive Protecting Circuit of SiC-MOSFET; including high speed CMOS digital isolation circuit 1, high-speed driving circuit 2, grid source electrode overvoltage crowbar 3 and negative voltage generating circuit 4; input signal is connected with high speed CMOS digital isolation circuit 1; high speed CMOS digital isolation circuit 1 is connected with high-speed driving circuit 2; high-speed driving circuit 2 is connected with SiC-MOSFET grid; grid source electrode overvoltage crowbar 3 is connected with SiC-MOSFET grid source electrode, and negative voltage generating circuit 4 is connected with SiC-MOSFET source electrode.
With reference to Fig. 2, high speed CMOS digital isolation circuit 1 includes high speed CMOS digital isolating chip U1(Si8710), the first resistance R1, the first electric capacity C1 and the second electric capacity C2；Input signal is connected with isolating chip U1 the first, the 3rd pin；First resistance R1 one end and isolating chip U1 the 6th pin connect, and the first resistance R1 other end and isolating chip U1 the 5th pin connect；First electric capacity C1 one end and isolating chip U1 the 5th pin connect, and the first electric capacity C1 other end and isolating chip U1 the 4th pin connect；Second electric capacity C2 one end and isolating chip U1 the 6th pin connect, and the second electric capacity C2 other end and isolating chip U1 the 4th pin connect；Isolating chip U1 the second pin is not connected to, the 4th pin ground connection GND, and the 6th pin connects power supply VCC.
High-speed driving circuit 2 includes ultrahigh speed driving chip U2(IXDN609), the 3rd electric capacity C3, the 4th electric capacity C4, the 5th electric capacity C5；3rd electric capacity C3 one end and driving chip U2 the first pin connect, the 3rd electric capacity C3 other end ground connection GND；4th electric capacity C4 one end and driving chip U2 the 4th pin connect, the 4th electric capacity C4 other end ground connection GND；5th electric capacity C5 one end and driving chip U2 the 5th pin connect, the 5th electric capacity C5 other end ground connection GND；Driving chip U2 the second pin is connected with isolating chip U1 the 5th pin；Driving chip U2 the 3rd pin is not connected to, and the 6th and the 7th pin is connected with SiC-MOSFET grid G, and the 8th pin connects power supply VCC.
Grid source electrode overvoltage crowbar 3 includes the first stabilivolt D1(1N4732A) and the second stabilivolt D2(1N4749A), the first stabilivolt D1 positive pole is connected with SiC-MOSFET grid G, and the first stabilivolt D1 negative pole and the second stabilivolt D2 negative pole connect；Second stabilivolt D2 positive pole and SiC-MOSFET source S connect.
Negative voltage generating circuit 4 includes that the second resistance R2 and the 3rd resistance R3, the second resistance R2 and the 3rd resistance R3 connect, and series connection common port is connected with SiC-MOSFET source S；The second resistance R2 other end is connected with power supply VCC, the 3rd resistance R3 other end ground connection GND.
Operation principle of the present utility model: drive input signal is through high speed CMOS digital isolating chip U1 and ultrahigh speed driving chip U2, it is transferred to SiC-MOSFET grid G, owing to high speed CMOS digital isolating chip U1 propagation delay is only 30ns, the signal elevating time only 26ns of ultrahigh speed driving chip U2 ensure that the rapidity that signal transmits, and is operated in higher frequency for SiC-MOSFET and provides guarantee.Ultrahigh speed driving chip U2 can provide the maximum drive current of up to 9A, SiC-MOSFET input capacitance can be carried out quick charge, and improve SiC-MOSFET opens speed.
When drive input signal is low level, the level of SiC-MOSFET grid G is zero；Power supply VCC is 24V, and after the second resistance R2 and the 3rd resistance R3 dividing potential drop, the level produced in SiC-MOSFET source S is 4V, then grid voltage between source electrodes is-4V, and this negative voltage can make SiC-MOSFET reliable turn-off, it is to avoid device opens by mistake logical.When drive input signal is high level, the level of SiC-MOSFET grid G be the level of 24V, SiC-MOSFET source S be still 4V, then grid voltage between source electrodes is that 20V, SiC-MOSFET are the most open-minded.
First stabilivolt D1 and the second stabilivolt D2 differential concatenation are connected on grid source electrode two ends, and the first stabilivolt D1 voltage stabilizing value is 4.7V, and the second stabilivolt D2 voltage stabilizing value is 24V.Between SiC-MOSFET grid source electrode, safe voltage scope is-5V ~ 25V, and when SiC-MOSFET grid voltage between source electrodes is more than 24V, the first stabilivolt D1 forward conduction, the second stabilivolt D2 plays pressure stabilization function, grid voltage between source electrodes is maintained 24V；When SiC-MOSFET grid voltage between source electrodes is less than-4.7V, the second stabilivolt D2 forward conduction, the first stabilivolt D1 plays pressure stabilization function, grid voltage between source electrodes is maintained-4.7V.In the range of SiC-MOSFET grid voltage between source electrodes reliably can be maintained safe voltage by this protection circuit.
Claims (5)
1. the high-speed isolated Drive Protecting Circuit of a SiC-MOSFET; it is characterized in that including high speed CMOS digital isolation circuit, high-speed driving circuit, grid source electrode overvoltage crowbar and negative voltage generating circuit; input signal is connected with described high speed CMOS digital isolation circuit; described high speed CMOS digital isolation circuit is connected with high-speed driving circuit; described high-speed driving circuit is connected with SiC-MOSFET grid; described grid source electrode overvoltage crowbar is connected with SiC-MOSFET grid source electrode, and described negative voltage generating circuit is connected with SiC-MOSFET source electrode.
The high-speed isolated Drive Protecting Circuit of a kind of SiC-MOSFET the most according to claim 1, it is characterised in that described high speed CMOS digital isolation circuit includes high speed CMOS digital isolating chip Si8710, the first resistance, the first electric capacity and the second electric capacity；Input signal is connected with isolating chip the first, the 3rd pin；Described first resistance one end and isolating chip the 6th pin connect, and the first resistance other end and isolating chip the 5th pin connect；Described first electric capacity one end and isolating chip the 5th pin connect, and the first electric capacity other end and isolating chip the 4th pin connect；Described second electric capacity one end and isolating chip the 6th pin connect, and the second electric capacity other end and isolating chip the 4th pin connect；Described isolating chip the second pin is not connected to, the 4th pin ground connection, and the 6th pin connects power supply.
The high-speed isolated Drive Protecting Circuit of a kind of SiC-MOSFET the most according to claim 1, it is characterised in that described high-speed driving circuit includes ultrahigh speed driving chip IXDN609, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity；Described 3rd electric capacity one end and driving chip the first pin connect, the 3rd electric capacity other end ground connection；Described 4th electric capacity one end and driving chip the 4th pin connect, the 4th electric capacity other end ground connection；Described 5th electric capacity one end and driving chip the 5th pin connect, the 5th electric capacity other end ground connection；Described driving chip the second pin is connected with isolating chip the 5th pin；Described driving chip the 3rd pin is not connected to, and the 6th and the 7th pin is connected with SiC-MOSFET grid, and the 8th pin connects power supply.
The high-speed isolated Drive Protecting Circuit of a kind of SiC-MOSFET the most according to claim 1; it is characterized in that described grid source electrode overvoltage crowbar includes the first stabilivolt 1N4732A and the second stabilivolt 1N4749A; described first stabilivolt positive pole is connected with SiC-MOSFET grid, and the first stabilivolt negative pole and the second stabilivolt negative pole connect；Described second stabilivolt positive pole and SiC-MOSFET source electrode connect.
The high-speed isolated Drive Protecting Circuit of a kind of SiC-MOSFET the most according to claim 1; it is characterized in that described negative voltage generating circuit includes the second resistance and the 3rd resistance; described second resistance and the 3rd resistant series, series connection common port is connected with SiC-MOSFET source electrode；The described second resistance other end is connected with power supply；Described 3rd resistance other end ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620319583.9U CN205725693U (en) | 2016-04-15 | 2016-04-15 | A kind of high-speed isolated Drive Protecting Circuit of SiC-MOSFET |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201620319583.9U CN205725693U (en) | 2016-04-15 | 2016-04-15 | A kind of high-speed isolated Drive Protecting Circuit of SiC-MOSFET |
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| CN205725693U true CN205725693U (en) | 2016-11-23 |
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| CN201620319583.9U Expired - Fee Related CN205725693U (en) | 2016-04-15 | 2016-04-15 | A kind of high-speed isolated Drive Protecting Circuit of SiC-MOSFET |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107370347A (en) * | 2017-07-21 | 2017-11-21 | 西安交通大学 | More SiC MOSFET chips parallel power module drive control circuits and its printed circuit board |
| US10171069B1 (en) | 2018-01-26 | 2019-01-01 | General Electric Company | Switch controller for adaptive reverse conduction control in switch devices |
-
2016
- 2016-04-15 CN CN201620319583.9U patent/CN205725693U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107370347A (en) * | 2017-07-21 | 2017-11-21 | 西安交通大学 | More SiC MOSFET chips parallel power module drive control circuits and its printed circuit board |
| CN107370347B (en) * | 2017-07-21 | 2019-12-24 | 西安交通大学 | Multi-SiC MOSFET chip parallel power module driving control circuit and printed circuit board thereof |
| US10171069B1 (en) | 2018-01-26 | 2019-01-01 | General Electric Company | Switch controller for adaptive reverse conduction control in switch devices |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20161123 Termination date: 20170415 |