CN205647495U - Analog -digital conversion circuit - Google Patents

Analog -digital conversion circuit Download PDF

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Publication number
CN205647495U
CN205647495U CN201620387030.7U CN201620387030U CN205647495U CN 205647495 U CN205647495 U CN 205647495U CN 201620387030 U CN201620387030 U CN 201620387030U CN 205647495 U CN205647495 U CN 205647495U
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CN
China
Prior art keywords
foot
conversion chip
microprocessor
analog
electric capacity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201620387030.7U
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Chinese (zh)
Inventor
鲁霄钢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Foshan Kairuida Electronic Co., Ltd.
Original Assignee
鲁霄钢
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 鲁霄钢 filed Critical 鲁霄钢
Priority to CN201620387030.7U priority Critical patent/CN205647495U/en
Application granted granted Critical
Publication of CN205647495U publication Critical patent/CN205647495U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model discloses an analog -digital conversion circuit, including analog -digital conversion chip, each way analog input foot of this analog -digital conversion chip inserts the modulus that corresponds the passageway and plans the signal, the reference voltage foot is through electric capacity C1 ground connection, benchmark calibration foot is through electric capacity C2 ground connection, the chip selection foot connects microprocessor's input/output end, the serial clock foot meets microprocessor's clock terminal, the serial input foot connects microprocessor's primary output from input, the serial output foot connects microprocessor's primary input from output, the positive foot of high potential meets analog -digital conversion chip power supply positive terminal, current potential burden foot ground connection, the positive foot of electronegative potential meets microprocessor's power supply positive terminal, microprocessor's power supply positive terminal meets microprocessor power supply positive terminal, meet electric capacity C3 between analog -digital conversion chip's positive foot of high potential and the ground, meet electric capacity C4 between microprocessor's power end and the ground. The utility model discloses an analog -digital conversion circuit structure is comparatively simple, and the price is comparatively cheap.

Description

Analog to digital conversion circuit
Technical field
This utility model relates to electronic circuit, particularly relates to a kind of analog to digital conversion circuit.
Background technology
During modern signal processing, it is often necessary to carry out the conversion from analogue signal to digital signal, this needs mould Number conversion (A/D) circuit completes.Common analog to digital conversion circuit have employed more element, there is structure multiple The weak point that miscellaneous, price is higher, so that be optimized design.
Utility model content
The defect existed for prior art, the modulus that this utility model provides a kind of simple in construction, price relatively low turns Change circuit.
For solving above technical problem, this utility model provides a kind of analog to digital conversion circuit, including modulus conversion chip, Each road simulation input pin of this modulus conversion chip accesses the modulus of respective channel and intends signal, the base of modulus conversion chip Quasi-voltage foot meridian capacitor C1 ground connection, the reference calibration foot meridian capacitor C2 ground connection of modulus conversion chip, analog digital conversion core The chip select pin of sheet connects the input/output terminal of microprocessor, the serial clock foot of modulus conversion chip connect microprocessor time Zhong Duan, the serial input foot of modulus conversion chip connects the main output of microprocessor from input, modulus conversion chip Serial output foot connects the primary input of microprocessor and connects analog digital conversion from outfan, the positive foot of high potential of modulus conversion chip Chip power anode, the current potential of modulus conversion chip bears foot ground connection, and the positive foot of electronegative potential of modulus conversion chip meets micro-place The power positive end of reason device, the power positive end of this microprocessor connects power supply of microprocessor anode, the height of modulus conversion chip The positive foot of current potential and the indirect electric capacity C4 on the indirect electric capacity C3 on ground, the power end of microprocessor and ground.
Compared with prior art, this utility model analog to digital conversion circuit uses low-power consumption serial a/d transducer, its yuan Part is less, small volume, and operating voltage range is wider, has simple in construction, cheap advantage.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of this utility model analog to digital conversion circuit.
Detailed description of the invention
It is described in detail with specific embodiment below in conjunction with accompanying drawing.Elaborate a lot of concrete thin in the following description Joint is so that fully understanding this utility model.But this utility model can be much different from described here other Mode is implemented, and those skilled in the art can do similar popularization in the case of this utility model intension, Therefore this utility model is not limited by following public specific embodiment.
As it is shown in figure 1, analog to digital conversion circuit includes modulus conversion chip ADC, just may be used after configuration interface circuit To realize and the connection of Micro-processor MCV (optional MC683 series such as MC683XX).This modulus turns Change the serial ADC that chip ADC is a 10bit, there are 8 tunnel simulation input and railway digital outputs.Should The particular circuit configurations of analog to digital conversion circuit 1222 is: each road simulation input pin of modulus conversion chip ADC CH0~CH7 accesses the modulus of respective channel and intends signal (the eye potential difference after i.e. analog to digital conversion circuit 1221 amplifies Signal), the reference voltage foot REF of modulus conversion chip ADC is through electric capacity C1 ground connection, modulus conversion chip The reference calibration foot REFADJ of ADC is through electric capacity C2 ground connection, the chip select input foot of modulus conversion chip ADC CS (Low level effective) connects the input/output terminal I/O of Micro-processor MCV, the string of modulus conversion chip ADC Row clock input pin SCLK connects the clock end CLK of Micro-processor MCV, the string of modulus conversion chip ADC Row data input pin DIN connects the main output of Micro-processor MCV from input MOSI, modulus conversion chip The serial data output pin DOUT of ADC connects the MISO primary input of Micro-processor MCV from outfan, mould The high potential positive foot VDD of number conversion chip ADC meets the power positive end VH of modulus conversion chip ADC (+5V), the current potential of modulus conversion chip ADC bears foot VSS ground connection, the low electricity of modulus conversion chip ADC The positive foot VL in position meets the power positive end VDD, the power positive end VDD of Micro-processor MCV of Micro-processor MCV Connect power positive end VL (+3V) of Micro-processor MCV, the high potential positive foot VDD of modulus conversion chip ADC Indirect electric capacity C4 with the indirect electric capacity C3 on ground, the power end VDD of Micro-processor MCV Yu ground.This modulus CS Low level effective in conversion chip ADC, only this end set low, data just can synchronize input (DIN) or When output (DOUT): CS is low, the data on DIN are in the rising edge input chip of SCLK;CS is low Time, the data on DOUT export at the trailing edge of SCLK;When setting high, DOUT is high-impedance state.SSTRB Output pin is triggered: under internal clocking pattern, the rising edge saltus step of SSTRB shows to convert for serial;? Under external clocking mode, SSTRB is low level always.SHDN controls foot for turning off, its Low level effective, Can access and turn off control signal accordingly.
In the present embodiment, a kind of optional parameters type selecting of analog to digital conversion circuit is: modulus conversion chip ADC is optional The MAX1024, Micro-processor MCV optional MC683 series (such as MC683XX) of MAXIM series, Electric capacity C1 is 4.7 μ F, and electric capacity C2 is 0.01 μ F, and electric capacity C3 is 0.1 μ F, and electric capacity C4 is 0.1 μ F, modulus The power positive end VH of conversion chip ADC is+5V, and the power positive end VL of Micro-processor MCV is+3V. Certainly, it is possible to according to circumstances select other parameter to combine, repeat no more.
This analog to digital conversion circuit uses low-power consumption serial a/d transducer, and its element is less, small volume, work Voltage range wider (2.7V~5.25V).After this analog to digital conversion circuit input signal after receiving the amplification of a certain road, Digital signal can be converted analog signals into, thus can carry out follow-up process for Micro-processor MCV.
Below it is only preferred implementation of the present utility model, it is noted that above-mentioned preferred implementation should not Being considered as restriction of the present utility model, protection domain of the present utility model should be with claim limited range Accurate.For those skilled in the art, without departing from spirit and scope of the present utility model, Can also make some improvements and modifications, these improvements and modifications also should be regarded as protection domain of the present utility model.

Claims (2)

1. an analog to digital conversion circuit, it is characterised in that include modulus conversion chip, this modulus conversion chip Each road simulation input pin accesses the modulus of respective channel and intends signal, the reference voltage foot meridian capacitor of modulus conversion chip C1 ground connection, the reference calibration foot meridian capacitor C2 ground connection of modulus conversion chip, the chip select pin of modulus conversion chip connects The input/output terminal of microprocessor, the serial clock foot of modulus conversion chip connects the clock end of microprocessor, modulus The serial input foot of conversion chip connects the main output of microprocessor from input, the Serial output of modulus conversion chip Foot connects the primary input of microprocessor from outfan, and the positive foot of high potential of modulus conversion chip connects modulus conversion chip electricity Source anode, the current potential of modulus conversion chip bears foot ground connection, and the positive foot of electronegative potential of modulus conversion chip connects microprocessor Power positive end, the power positive end of this microprocessor connects power supply of microprocessor anode, the high electricity of modulus conversion chip The positive foot in position and the indirect electric capacity C4 on the indirect electric capacity C3 on ground, the power end of microprocessor and ground.
2. analog to digital conversion circuit as claimed in claim 1, it is characterised in that mould conversion chip is MAX1024, Microprocessor is MC683XX, and electric capacity C1 is 4.7 μ F, and electric capacity C2 is 0.01 μ F, and electric capacity C3 is 0.1 μ F, Electric capacity C4 is 0.1 μ F, and the power positive end of modulus conversion chip is+5V, and the power positive end of microprocessor is+3V.
CN201620387030.7U 2016-04-30 2016-04-30 Analog -digital conversion circuit Expired - Fee Related CN205647495U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620387030.7U CN205647495U (en) 2016-04-30 2016-04-30 Analog -digital conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620387030.7U CN205647495U (en) 2016-04-30 2016-04-30 Analog -digital conversion circuit

Publications (1)

Publication Number Publication Date
CN205647495U true CN205647495U (en) 2016-10-12

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201620387030.7U Expired - Fee Related CN205647495U (en) 2016-04-30 2016-04-30 Analog -digital conversion circuit

Country Status (1)

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CN (1) CN205647495U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106340262A (en) * 2016-11-16 2017-01-18 天津市盛丹电子技术发展有限公司 Multi-purpose digital display circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106340262A (en) * 2016-11-16 2017-01-18 天津市盛丹电子技术发展有限公司 Multi-purpose digital display circuit

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CB03 Change of inventor or designer information
CB03 Change of inventor or designer information

Inventor after: Guan Haiming

Inventor before: Lu Xiaogang

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20170825

Address after: 528200 Guangdong Province, Foshan City Nanhai Dali Taiping Industrial Zone

Patentee after: Foshan Kairuida Electronic Co., Ltd.

Address before: Huang Shan Zhen 311809 Zhejiang city of Shaoxing province Zhuji City, the East Road No. 66 Zhuji Gengxing environmental protection equipment Co. Ltd.

Patentee before: Lu Xiaogang

CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20161012

Termination date: 20190430