CN202721658U - Switching power supply chip integrated with power-on reset function - Google Patents
Switching power supply chip integrated with power-on reset function Download PDFInfo
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- CN202721658U CN202721658U CN 201220299900 CN201220299900U CN202721658U CN 202721658 U CN202721658 U CN 202721658U CN 201220299900 CN201220299900 CN 201220299900 CN 201220299900 U CN201220299900 U CN 201220299900U CN 202721658 U CN202721658 U CN 202721658U
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Abstract
The utility model discloses a switching power supply chip integrated with the power-on reset function. The switching power supply chip comprises: a first divider resistor, wherein one end of the first divider resistor is connected to the voltage input end, the other end of the first divider resistor is connected with the forward input end of a comparator module and a second divider resistor, and the other end of the second divider resistor is grounded; a reference circuit module, wherein one end of the reference circuit module is connected to the voltage input end, the other end of the reference circuit module is connected with the reverse input end of the comparator module and a pulse width modulation control and protection circuit module, the output end of the comparator module is connected with a timer, and the output end of the timer is connected with the chip output end having an open-drain structure; an oscillator, wherein the output end of the oscillator is connected with the timer and the pulse width modulation control and protection circuit module; and a current detector module, wherein the input end of the current detector module is connected with the voltage input end and a voltage output end module separately, and the pulse width modulation control and protection circuit module is connected with an enabling signal, a feedback signal, the output end of the current detector module and the voltage output end module. According to the utility model, the power supply cost of a microprocessing system can be reduced, and the power supply stability of the microprocessing system can be improved.
Description
Technical field
The utility model relates to a kind of switching power source chip of integrated electrification reset function, belongs to the power management class.
Background technology
Newly can require more and more highlyer in the modern science and technology field to electronic product, the stability of microprocessing systems and antijamming capability are a great problems that faces in this field always.In order to improve microprocessing systems to the antijamming capability of external power source, the Electronics Engineer can adopt switching power source chip (DC/DC chip) to provide power supply for microprocessing systems; Simultaneously in order to guarantee the stability of microprocessing systems, be one of effective means that improves the stability of a system to the supervisory control system of microprocessing systems power supply.Electrification reset (power-on-reset, POR) circuit resets (reset) to element circuits such as the oscillator in shift register, d type flip flop sum counter, the analog circuit in the digital circuit, comparators, guarantees that microprocessing systems correctly starts in power up.
Because present DC/DC does not have the electrification reset function, the Electronics Engineer can only adopt DC/DC chip and POR chip (as shown in Figure 1) simultaneously when design microprocessing systems power supply
Because present microprocessing systems power supply also needs to adopt simultaneously DC/DC chip and POR chip, has increased the complexity of system, has reduced Systems balanth; Because the operating voltage that different microprocessing systems needs is different, therefore need the POR chip model of usefulness also different simultaneously, this has also increased system cost and Electronics Engineer's design difficulty.
Summary of the invention
Owing to the problems referred to above of prior art, the utility model proposes a kind of switching power source chip of integrated electrification reset function, it can effectively solve the problems referred to above of prior art.
The utility model addresses the above problem by the following technical programs:
One first divider resistance, the one end links to each other with voltage input end, and the other end connects respectively positive input and second divider resistance of comparator module, and the other end ground connection of the second divider resistance;
One reference circuit module, the one end connects voltage input end, and output reference voltage is supplied with respectively negative input and pulse width modulation controlled and the protective circuit module of comparator module;
The output of comparator module connects a timer, and this timer output end connects the chip output with Floating drain;
One oscillator output end connects timer and pulse width modulation controlled and protective circuit module;
One current detector module, two input connect respectively voltage input end and a voltage output end module;
Pulse width modulation controlled and protective circuit module are connected with output and the voltage output end module of enable signal, feedback signal and current detector module.
As further feature of the present utility model, the current detector module is its two input of current detector formation that links to each other with current sense resistor two ends.
As further feature of the present utility model; the voltage output end module comprises the transistor of two parallel connections, and two transistorized grids connect pulse width modulation controlled and protective circuit, its drain electrode connection Voltage-output port; a connection current detector of its source electrode module, a ground connection.
Owing to used above-mentioned technological means, the utility model relatively formerly technology has added divider resistance, comparator and the timer that can realize the electrification reset function in the DC/DC structure, and multiplexing reference circuit module and oscillator module, so that the utlity model has following two advantages:
1. reduce microprocessing systems power supply cost
Because integrated POR function, the Electronics Engineer can reduce the number of devices of microprocessing systems power source design; The pcb board area of reduction system scheme; Make things convenient for the optimization of other device positions on the pcb board.POR detects input voltage simultaneously, adopts the Open-drain mode to export, and the Electronics Engineer can be applied to different output voltage ranges.
2. improve microprocessing systems power supply stability
Because integrated POR function, the Electronics Engineer can simplify the microprocessing systems power source design, because POR function and DC/DC function is integrated, so that the reference voltage of two templates is identical, has eliminated because two system risks that the template threshold deviation causes.
Description of drawings
Fig. 1 is the work schematic diagram that adopts simultaneously DC/DC chip and POR chip in the prior art;
Fig. 2 is structural representation of the present utility model;
Fig. 3 is application schematic diagram of the present utility model.
Among the figure: 1. voltage input end (VIN); 2. the first divider resistance (R1); 3. the second divider resistance (R2); 4. comparator module; 5. timer; 6. reference circuit module; 7. oscillator; 8. pulse width modulation controlled and protective circuit module; 9. the chip that has Floating drain; 10. current detector module; 11. voltage output end module; 12. enable signal (EN); 13. feedback signal (FB); 14. current detector; 15. current sense resistor
Embodiment:
Below in conjunction with embodiment, describe the present invention in detail.
As shown in Figure 2, one first divider resistance 2, the one end links to each other with voltage input end 1, and the other end connects respectively positive input and second divider resistance 3 of comparator module 4, and the other end ground connection (GND) of the second divider resistance 3; One reference circuit module 6, the one end connects voltage input end 1, and output reference voltage is supplied with respectively negative input and pulse width modulation controlled and the protective circuit module 8 of comparator module 4; The output of comparator module 4 connects a timer 5, and these timer 5 outputs connect chip 9 outputs with Floating drain; One oscillator, 7 outputs connect timer 5 and pulse width modulation controlled and protective circuit module 8; One current detector module 10, two input connect respectively voltage input end 1 and a voltage output end module 11; Pulse width modulation controlled and protective circuit module 8 are connected with output and the voltage output end module 11 of enable signal 12, feedback signal 13 and current detector module 10.
Wherein, current detector module 10 is a current detector 14 its two inputs formations that link to each other with a current sense resistor 15 two ends.
Wherein, voltage output end module 11 comprises the transistor of two parallel connections, and two transistorized grids connect pulse width modulation controlled and protective circuit, its drain electrode connection Voltage-output port (SW), 10, one ground connection of a connection current detector of its source electrode module.
The characteristics of the utility model patent are:
1, traditional switching power source chip and electrification reset chips incorporate are in the same place.
What 2, electrification reset detected is input voltage, threshold voltage when this electrification reset threshold voltage is generally worked than chip Switching Power Supply is high, so when input voltage slowly powers on the Switching Power Supply threshold value of inside, what be activated at first is the switching voltage module, after switch power module starts, output voltage exists, if this time, supply voltage did not reach the electrification reset threshold value of setting, the reset output terminal mouth output of chip be low level.Only have the electrification reset threshold value (judging by comparator) that rises to setting when supply voltage, the chip reset output could be exported high level.
3, the chip switch power module needs start-up time when preventing false triggering and fast powering-up, we have used the mode of timer, only have input voltage to rise to the electrification reset threshold value and will guarantee to be higher than this threshold value (we have used timer to increase time-delay) always here, chip is just exported high level at reset output terminal.The reset signal that if of short duration high impulse of power supply can flip chip when having guaranteed like this to power on.If simultaneously this time-delay has guaranteed that also power supply electrifying is very fast, the Switching Power Supply of chip partly needs the time to set up work, by the time the Switching Power Supply some work is normal, exports the reset terminal high level when output voltage is normal again, guarantees that back microprocessing systems logic does not have problem.
In conjunction with Fig. 3, in powerful DC/DC chip structure, the utility model is except normal DC/DC function, this chip also detects the voltage of input simultaneously, rise above the threshold value of setting when detecting voltage input end 1 voltage, after the time-delay 200ms, export the L level in electrification reset port Open-Drain mode.Arrive the threshold value of setting above after the 20us when detecting voltage input end 1 voltage drop, export the H level in electrification reset port Open-Drain mode.R, L are resistance among the figure.
Should be understood that these execution modes only to be used for explanation the present invention and be not used in and limit the scope of the invention.Should be understood that in addition those skilled in the art can make various changes or modifications the present invention after the content of having read the present invention's instruction, these equivalent form of values fall within the application's appended claims limited range equally.
Claims (3)
1. the switching power source chip of an integrated electrification reset function is characterized in that: comprise
One first divider resistance, the one end links to each other with voltage input end, and the other end connects respectively positive input and second divider resistance of comparator module, and the other end ground connection of described the second divider resistance;
One reference circuit module, the one end connects described voltage input end, and output reference voltage is supplied with respectively negative input and pulse width modulation controlled and the protective circuit module of described comparator module;
The output of described comparator module connects a timer, and this timer output end connects the chip output with Floating drain;
One oscillator output end connects described timer and described pulse width modulation controlled and protective circuit module;
One current detector module, two input connect respectively described voltage input end and a voltage output end module;
Described pulse width modulation controlled and protective circuit module are connected with output and the described voltage output end module of an enable signal, a feedback signal and described current detector module.
2. the Switching Power Supply of integrated electrification reset function according to claim 1 is pressed chip, it is characterized in that: described current detector module is its two input of current detector formation that links to each other with current sense resistor two ends.
3. the input voltage chip of integrated electrification reset function according to claim 1; it is characterized in that: described voltage output end module comprises the transistor of two parallel connections; and two described transistorized grids connect described pulse width modulation controlled and protective circuit; its drain electrode connects the Voltage-output port; one of its source electrode connects described current detector module, a ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220299900 CN202721658U (en) | 2012-06-26 | 2012-06-26 | Switching power supply chip integrated with power-on reset function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220299900 CN202721658U (en) | 2012-06-26 | 2012-06-26 | Switching power supply chip integrated with power-on reset function |
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| Publication Number | Publication Date |
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| CN202721658U true CN202721658U (en) | 2013-02-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 201220299900 Expired - Lifetime CN202721658U (en) | 2012-06-26 | 2012-06-26 | Switching power supply chip integrated with power-on reset function |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103699026A (en) * | 2013-12-25 | 2014-04-02 | 烽火通信科技股份有限公司 | Control device and method for realizing multi-source power-on timing sequence and power-down timing sequence |
| CN104300950A (en) * | 2014-09-23 | 2015-01-21 | 青岛歌尔声学科技有限公司 | Automatic triggering starting circuit integrating reset function and HMD equipment |
-
2012
- 2012-06-26 CN CN 201220299900 patent/CN202721658U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103699026A (en) * | 2013-12-25 | 2014-04-02 | 烽火通信科技股份有限公司 | Control device and method for realizing multi-source power-on timing sequence and power-down timing sequence |
| CN103699026B (en) * | 2013-12-25 | 2016-04-13 | 烽火通信科技股份有限公司 | Realize control device and the method for many power supply electrifyings sequential and lower electric sequential |
| CN104300950A (en) * | 2014-09-23 | 2015-01-21 | 青岛歌尔声学科技有限公司 | Automatic triggering starting circuit integrating reset function and HMD equipment |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: No.16, wei14 Road, Sutong science and Technology Industrial Park, Nantong, Jiangsu Province Patentee after: Jiangsu Dior Microelectronics Co.,Ltd. Address before: 200050, Shanghai, Changning District, West Yan'an Road, No. 726, Hua Min, John Tower, building 21, room K Patentee before: DIOO MICROCIRCUITS Co.,Ltd. |
|
| CP02 | Change in the address of a patent holder | ||
| CP02 | Change in the address of a patent holder |
Address after: 6 / F, building 8, Zilang science and Technology City, Nantong Innovation Zone, 60 Chongzhou Avenue, Nantong City, Jiangsu Province 226000 Patentee after: Jiangsu Dior Microelectronics Co.,Ltd. Address before: No.16, wei14 Road, Sutong science and Technology Industrial Park, Nantong, Jiangsu Province Patentee before: Jiangsu Dior Microelectronics Co.,Ltd. |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130206 |