CN205608931U - Touch alarm circuit applied to door and window design field - Google Patents

Touch alarm circuit applied to door and window design field Download PDF

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Publication number
CN205608931U
CN205608931U CN201620339490.2U CN201620339490U CN205608931U CN 205608931 U CN205608931 U CN 205608931U CN 201620339490 U CN201620339490 U CN 201620339490U CN 205608931 U CN205608931 U CN 205608931U
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China
Prior art keywords
resistance
electric capacity
transistor
base chip
potentiometer
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Expired - Fee Related
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CN201620339490.2U
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Chinese (zh)
Inventor
王大威
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Tianjin Shuo Electronic Technology Co Ltd
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Tianjin Weishuo Technology Co ltd
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Abstract

The utility model discloses a be applied to touch alarm circuit in door and window design field, including time base chip IC, resistance R1, resistance R2, resistance R3, resistance R4, potentiometre W1, electric capacity C1, electric capacity C2, diode D1, transistor T1, potentiometre J1, the first foot of transistor T1 is connected to resistance R4's second end, transistor T1's second foot is connected ground GND, diode D1's positive pole is connected to transistor T1's third foot; the utility model discloses a time base chip IC's 1 foot ground GND is connected, the circuit of touch trigger alarm that effectively combines time base circuit chip and design installs on current door or window that do not have the theftproof function, when people maliciously destroys door or/and window, will form a trigger signal for the circuit work, finally start alarm bell reports to the police, make house owner or joint defence structure know where the theft incident appears, whole circuit has characteristics such as design scientific and reasonable, safety and stability, the practicality is strong.

Description

A kind of touch mode alarm circuit being applied to ORIENTED DOOR AND WINDOW DESIGN field
Technical field
This utility model relates to the fields such as touch sensible technology, specifically, is a kind of touch mode alarm circuit being applied to ORIENTED DOOR AND WINDOW DESIGN field.
Background technology
In the place that signs of human habitation is the most intensive, attachment is that house is more and more intensive, adjoint is building up in a large number of building, door and window are indispensable parts of solitary building, development along with door and window, such as antitheft door, the kind of burglary-resisting window is the most various, contribution greatly is played for the security of the lives and property, but these antitheft doors, burglary-resisting window is the most more arranged on New Buildings, and in outdated building thing, the door in the most multiplex past and window, these old-fashioned doors and window lack anti-theft feature, if reequiping new antitheft door, if burglary-resisting window, the biggest cost will be put into, some antitheft clear areas it are left with for this, and how in the case of not changing existing old-fashioned door and window, can effectively carry out antitheft, an actually urgent required thing.
Utility model content
The purpose of this utility model is to design a kind of touch mode alarm circuit being applied to ORIENTED DOOR AND WINDOW DESIGN field, the circuit that a kind of touch triggering effectively combining time base circuit chip and design is reported to the police, it is arranged on the existing door without anti-theft feature or window, when people's malicious sabotage door or/and during window, one will be formed and trigger signal, circuit is worked, the final alarm bell that starts is reported to the police, make house-owner or joint defence structure know thievery where occur, whole circuit have design science rationally, safety and stability, the feature such as practical.
This utility model is achieved through the following technical solutions: a kind of touch mode alarm circuit being applied to ORIENTED DOOR AND WINDOW DESIGN field, including time base chip IC, resistance R1, resistance R2, resistance R3, resistance R4, potentiometer W1, electric capacity C1, electric capacity C2, diode D1, transistor T1, potentiometer J1, first end of described resistance R1 is connected with first end of electric capacity C1, and first end of first end of resistance R1 and electric capacity C1 all with time base chip IC 6 and 7 feet be connected;Second end of described electric capacity C1 is connected with ground GND;Second end of described resistance R1 is connected with the first of potentiometer W1 the fixing end, the fixing end of the second of described potentiometer W1 is connected with the movable end of potentiometer W1, the movable end of described potentiometer W1 with time base chip IC 4 and 8 feet be connected, the movable end of described potentiometer W1 connects the negative pole of diode D1, and the both positive and negative polarity of described diode D1 is all connected on potentiometer J1;Time described 2 feet of base chip IC by resistance R3 with time base chip IC 4 feet be connected;3 feet of first end of described resistance R2 base chip IC simultaneously connect, and second end of described resistance R2 connects with first end of resistance R4 and first end of electric capacity C2 respectively, and second end of described electric capacity C2 connects ground GND;Second end of described resistance R4 connects first foot of transistor T1, and the crus secunda of described transistor T1 connects the positive pole of the 3rd foot connection diode D1 of ground GND, described transistor T1;Time described, 1 foot of base chip IC connects ground GND.
For preferably realizing this utility model, further utilize ripe time base chip to do triggering circuit base, particularly be provided with following structure: base chip when base chip IC uses NE555 time described.
For preferably realizing this utility model, it particularly is provided with following structure: described electric capacity C1 and electric capacity C2 all uses electrochemical capacitor, and first end of first end of electric capacity C1 and electric capacity C2 is all positive pole.
For preferably realizing this utility model, use following set-up mode especially: described transistor T1 is audion, and first foot of transistor T1 is base stage, and the crus secunda of transistor T1 is emitter stage, and the 3rd foot of transistor T1 is colelctor electrode.
This utility model compared with prior art, has the following advantages and beneficial effect:
(1) this utility model effectively combine time base circuit chip and design a kind of touch triggering report to the police circuit, it is arranged on the existing door without anti-theft feature or window, when people's malicious sabotage door or/and during window, one will be formed and trigger signal, circuit is worked, the final alarm bell that starts is reported to the police so that house-owner or joint defence structure know thievery where occur, whole circuit have design science rationally, safety and stability, the feature such as practical.
(2) when this utility model uses NE555, base chip constitutes triggering process circuit, can be the most stable carry out signal processing, work with this band motor type relay, thus beat alarm bell so that user or joint defence mechanism can know larceny is where to occur timely.
(3) this utility model is in use, triggering only need to be terminated at the place of the destructible of door or window, triggering signal can be generated when robber destroys door or window, whole circuit is worked, thus the work of band motor type relay, beat alarm bell so that user or joint defence mechanism can know larceny is where to occur timely, and the effect of the person that plays deterring theft.
Accompanying drawing explanation
Fig. 1 is circuit theory diagrams of the present utility model.
Detailed description of the invention
Below in conjunction with embodiment, this utility model is described in further detail, but embodiment of the present utility model is not limited to this.
Embodiment 1:
A kind of touch mode alarm circuit being applied to ORIENTED DOOR AND WINDOW DESIGN field, as shown in Figure 1, including time base chip IC, resistance R1, resistance R2, resistance R3, resistance R4, potentiometer W1, electric capacity C1, electric capacity C2, diode D1, transistor T1, potentiometer J1, first end of described resistance R1 is connected with first end of electric capacity C1, and first end of first end of resistance R1 and electric capacity C1 all with time base chip IC 6 and 7 feet be connected;Second end of described electric capacity C1 is connected with ground GND;Second end of described resistance R1 is connected with the first of potentiometer W1 the fixing end, the fixing end of the second of described potentiometer W1 is connected with the movable end of potentiometer W1, the movable end of described potentiometer W1 with time base chip IC 4 and 8 feet be connected, the movable end of described potentiometer W1 connects the negative pole of diode D1, and the both positive and negative polarity of described diode D1 is all connected on potentiometer J1;Time described 2 feet of base chip IC by resistance R3 with time base chip IC 4 feet be connected;3 feet of first end of described resistance R2 base chip IC simultaneously connect, and second end of described resistance R2 connects with first end of resistance R4 and first end of electric capacity C2 respectively, and second end of described electric capacity C2 connects ground GND;Second end of described resistance R4 connects first foot of transistor T1, and the crus secunda of described transistor T1 connects the positive pole of the 3rd foot connection diode D1 of ground GND, described transistor T1;Time described, 1 foot of base chip IC connects ground GND.
In use, by time base chip IC 2 feet with touch joint M be connected, and touch joint M is connected on the fragile harm of the door without anti-theft feature or window, when forcing open the door or leap in through the window, touch joint M to come off, one will be formed and trigger signal, trigger signal send to time base chip IC 2 feet, then time base chip IC in complete a series of Trigger Function, and ultimately form one and output signal to resistance R2, then make relay J 1 close under the effect of transistor T1, thus give one alarm signal of alarm bell being connected in relay J 1 so that alarm bell ring is reported to the police;The circuit that a kind of touch triggering effectively combining time base circuit chip and design is reported to the police, it is arranged on the existing door without anti-theft feature or window, when people's malicious sabotage door or/and during window, one will be formed and trigger signal, circuit is worked, the final alarm bell that starts is reported to the police so that house-owner or joint defence structure know thievery where occur, whole circuit have design science rationally, safety and stability, the feature such as practical.
Embodiment 2:
The present embodiment is to optimize further on the basis of above-described embodiment, for preferably realizing this utility model, ripe time base chip is further utilized to do triggering circuit base, as shown in Figure 1, it particularly is provided with following structure: base chip IC, resistance R1, resistance R2, resistance R3, resistance R4, potentiometer W1, electric capacity C1, electric capacity C2, diode D1, transistor T1, potentiometer J1 when including, first end of described resistance R1 is connected with first end of electric capacity C1, and first end of first end of resistance R1 and electric capacity C1 all with time base chip IC 6 and 7 feet be connected;Second end of described electric capacity C1 is connected with ground GND;Second end of described resistance R1 is connected with the first of potentiometer W1 the fixing end, the fixing end of the second of described potentiometer W1 is connected with the movable end of potentiometer W1, the movable end of described potentiometer W1 with time base chip IC 4 and 8 feet be connected, the movable end of described potentiometer W1 connects the negative pole of diode D1, and the both positive and negative polarity of described diode D1 is all connected on potentiometer J1;Time described 2 feet of base chip IC by resistance R3 with time base chip IC 4 feet be connected;3 feet of first end of described resistance R2 base chip IC simultaneously connect, and second end of described resistance R2 connects with first end of resistance R4 and first end of electric capacity C2 respectively, and second end of described electric capacity C2 connects ground GND;Second end of described resistance R4 connects first foot of transistor T1, and the crus secunda of described transistor T1 connects the positive pole of the 3rd foot connection diode D1 of ground GND, described transistor T1;Time described, 1 foot of base chip IC connects ground GND, base chip when base chip IC uses NE555 time described.
NE555(Timer IC) time, base chip is 8 foot time-base integrated circuits, about issued by Signetics Corporation in 1971, it is the quickest and business-like Timer IC at that time, 30 years backward are commonly used very much, and extend many application circuits, Timer based on CMOS technology version later The MC1455 of IC such as MOTOROLA is by substantial amounts of use, but the NE555 of former specification still commercially supplies normally, although new edition IC functionally has the improvement of part, but its foot bit function does not change, so the most all can be the most alternative.
NE555 is mainly characterized in that:
1. the simple resistor of a need, capacitor, can complete specific oscillation delay effect.Its reference time delay is extremely wide, can be by several microseconds to several hours as long as.
2. its operation power range is very big, can be with TTL, and the logic circuit such as CMOS coordinates, namely its output level and input triggering level, all can be with the high and low level match of these logical series circuit.
3. the supply electric current of its outfan is big, can push directly on the multiple load automatically controlled.
4. its timing precision is high, temperature stability is good, and low price.
The pin relation of NE555 and function are as follows:
Pin 1 (ground connection)-ground wire (or common ground), is typically attached to circuit common ground.
Pin 2 (trigger points)-this foot position is to trigger NE555 to make it start its time cycle.Triggering signal upper limb voltage must be more than 2/3 VCC, and lower edge must be less than 1/3 VCC.
Pin 3 (outputs)-start the output pin position of 555 when the time cycle, move to the high potential of few 1.7 volts than supply voltage.The output that terminates in cycle returns to the electronegative potential about O volt.Maximum output current when high potential about 200mA.
Pin 4 (replacement)-one low logic current potential is delivered to reset intervalometer during this foot position and make output return to an electronegative potential.It is typically connected to positive supply or ignore need not.
Pin 5 (controls)-this pin permits being changed by external voltage triggering and lock voltage limit.When timer operation is under function mode that is stable or that vibrate, and this input can be used for output frequency is altered or modified.
Pin 6 (resetting locking)-Pin 6 resets and locks and make output is low state.When this pin voltage from 1/3 VCC voltage to be displaced downwardly to 2/3 more than VCC time start this action.
Pin 7 (electric discharges)-this pin and main output connecting pin have identical current output capability, are LOW when being output as ON, are Low ESR over the ground, are HIGH when being output as OFF, are high impedance over the ground.
Pin 8 (V+)-this is the positive voltage end of 555 timer IC.The scope of supply voltage is+4.5 volts (minima) to+16 volts (maximum).
Embodiment 3:
The present embodiment is to optimize further on the basis of embodiment 1, for preferably realizing this utility model, as shown in Figure 1, it particularly is provided with following structure: base chip IC, resistance R1, resistance R2, resistance R3, resistance R4, potentiometer W1, electric capacity C1, electric capacity C2, diode D1, transistor T1, potentiometer J1 when including, first end of described resistance R1 is connected with first end of electric capacity C1, and first end of first end of resistance R1 and electric capacity C1 all with time base chip IC 6 and 7 feet be connected;Second end of described electric capacity C1 is connected with ground GND;Second end of described resistance R1 is connected with the first of potentiometer W1 the fixing end, the fixing end of the second of described potentiometer W1 is connected with the movable end of potentiometer W1, the movable end of described potentiometer W1 with time base chip IC 4 and 8 feet be connected, the movable end of described potentiometer W1 connects the negative pole of diode D1, and the both positive and negative polarity of described diode D1 is all connected on potentiometer J1;Time described 2 feet of base chip IC by resistance R3 with time base chip IC 4 feet be connected;3 feet of first end of described resistance R2 base chip IC simultaneously connect, and second end of described resistance R2 connects with first end of resistance R4 and first end of electric capacity C2 respectively, and second end of described electric capacity C2 connects ground GND;Second end of described resistance R4 connects first foot of transistor T1, and the crus secunda of described transistor T1 connects the positive pole of the 3rd foot connection diode D1 of ground GND, described transistor T1;Time described, 1 foot connection ground GND, described electric capacity C1 and electric capacity C2 of base chip IC all uses electrochemical capacitor, and first end of first end of electric capacity C1 and electric capacity C2 is all positive pole.
Electrochemical capacitor is the one of electric capacity, metal forming is positive pole (aluminum or tantalum), the oxide-film (aluminium oxide or tantalum pentoxide) being close to metal with positive pole is electrolyte, negative electrode is collectively constituted by conductive material, electrolyte (electrolyte can be liquid or solid) and other materials, because electrolyte is the major part of negative electrode, therefore electrochemical capacitor gains the name.Electrochemical capacitor is positive and negative simultaneously can not wrong.
Electrolysis condenser feature one: the capacitance of unit volume is very big, bigger than the electric capacity of other kind tens arrive hundreds times.
Electrolysis condenser feature two: specified capacity can be accomplished very big, can easily do several more than ten thousand f(of μ f but can not compare with electric double layer capacitance).
Electrolysis condenser feature three: price has overwhelming dominance than other kind, because the composition material of electrochemical capacitor is all common industrial materials, such as aluminum etc..The equipment manufacturing electrochemical capacitor is the most all common industrial equipment, can be with large-scale production, and cost compares relatively low.
Electrolysis condenser is typically by metal forming (aluminum/tantalum) as anelectrode, and the insulating oxide (aluminium oxide/tantalum pentoxide) of metal forming is as electrolyte, and electrolysis condenser is divided into aluminium electrolutic capacitor and tantalum electrolytic capacitor with the difference of its anelectrode.The negative electrode of aluminium electrolutic capacitor is made up of thin paper/thin film or the electrolytic polymer of dipped electrolyte solution (liquid electrolyte);The negative electrode of tantalum electrolytic capacitor generally uses manganese dioxide.Due to all using electrolyte as negative electrode (note and electrolyte distinguish), electrolysis condenser thus gain the name.
Embodiment 4:
The present embodiment is to optimize further on the basis of any of the above-described embodiment, for preferably realizing this utility model, as shown in Figure 1, the following set-up mode of employing especially: base chip IC, resistance R1, resistance R2, resistance R3, resistance R4, potentiometer W1, electric capacity C1, electric capacity C2, diode D1, transistor T1, potentiometer J1 when including, first end of described resistance R1 is connected with first end of electric capacity C1, and first end of first end of resistance R1 and electric capacity C1 all with time base chip IC 6 and 7 feet be connected;Second end of described electric capacity C1 is connected with ground GND;Second end of described resistance R1 is connected with the first of potentiometer W1 the fixing end, the fixing end of the second of described potentiometer W1 is connected with the movable end of potentiometer W1, the movable end of described potentiometer W1 with time base chip IC 4 and 8 feet be connected, the movable end of described potentiometer W1 connects the negative pole of diode D1, and the both positive and negative polarity of described diode D1 is all connected on potentiometer J1;Time described 2 feet of base chip IC by resistance R3 with time base chip IC 4 feet be connected;3 feet of first end of described resistance R2 base chip IC simultaneously connect, and second end of described resistance R2 connects with first end of resistance R4 and first end of electric capacity C2 respectively, and second end of described electric capacity C2 connects ground GND;Second end of described resistance R4 connects first foot of transistor T1, and the crus secunda of described transistor T1 connects the positive pole of the 3rd foot connection diode D1 of ground GND, described transistor T1;Time described, 1 foot of base chip IC connects ground GND, described transistor T1 is audion, and first foot of transistor T1 is base stage, and the crus secunda of transistor T1 is emitter stage, and the 3rd foot of transistor T1 is colelctor electrode.
When carrying out parameter and arranging, preferably using, resistance R1 is 100k, and resistance R2 is 56k, resistance R3 is 10M, and resistance R4 is 220k, and potentiometer W1 is 100k, and diode D1 is IN4004, transistor T1 is 2N3904, and electric capacity C1 is 47 μ F/16v, and electric capacity C2 is 33 μ F/16v.
The circuit that a kind of touch triggering that this utility model effectively combines time base circuit chip and designs is reported to the police, it is arranged on the existing door without anti-theft feature or window, when people's malicious sabotage door or/and during window, one will be formed and trigger signal, circuit is worked, the final alarm bell that starts is reported to the police so that house-owner or joint defence structure know thievery where occur, whole circuit have design science rationally, safety and stability, the feature such as practical.
When this utility model uses NE555, base chip constitutes triggering and processes circuit, can be the most stable carry out signal processing, work with this band motor type relay, thus beat alarm bell so that user or joint defence mechanism can know larceny is where to occur timely.
This utility model is in use, triggering only need to be terminated at the place of the destructible of door or window, triggering signal can be generated when robber destroys door or window, whole circuit is worked, thus the work of band motor type relay, beat alarm bell so that user or joint defence mechanism can know larceny is where to occur timely, and the effect of the person that plays deterring theft.
The above; it it is only preferred embodiment of the present utility model; not this utility model is done any pro forma restriction, every according to technical spirit of the present utility model, above example is made any simple modification, equivalent variations, within each falling within protection domain of the present utility model.

Claims (4)

1. the touch mode alarm circuit being applied to ORIENTED DOOR AND WINDOW DESIGN field, it is characterized in that: base chip IC, resistance R1, resistance R2, resistance R3, resistance R4, potentiometer W1, electric capacity C1, electric capacity C2, diode D1, transistor T1, potentiometer J1 when including, first end of described resistance R1 is connected with first end of electric capacity C1, and first end of first end of resistance R1 and electric capacity C1 all with time base chip IC 6 and 7 feet be connected;Second end of described electric capacity C1 is connected with ground GND;Second end of described resistance R1 is connected with the first of potentiometer W1 the fixing end, the fixing end of the second of described potentiometer W1 is connected with the movable end of potentiometer W1, the movable end of described potentiometer W1 with time base chip IC 4 and 8 feet be connected, the movable end of described potentiometer W1 connects the negative pole of diode D1, and the both positive and negative polarity of described diode D1 is all connected on potentiometer J1;Time described 2 feet of base chip IC by resistance R3 with time base chip IC 4 feet be connected;3 feet of first end of described resistance R2 base chip IC simultaneously connect, and second end of described resistance R2 connects with first end of resistance R4 and first end of electric capacity C2 respectively, and second end of described electric capacity C2 connects ground GND;Second end of described resistance R4 connects first foot of transistor T1, and the crus secunda of described transistor T1 connects the positive pole of the 3rd foot connection diode D1 of ground GND, described transistor T1;Time described, 1 foot of base chip IC connects ground GND.
A kind of touch mode alarm circuit being applied to ORIENTED DOOR AND WINDOW DESIGN field the most according to claim 1, it is characterised in that: base chip when base chip IC uses NE555 time described.
A kind of touch mode alarm circuit being applied to ORIENTED DOOR AND WINDOW DESIGN field the most according to claim 1, it is characterised in that: described electric capacity C1 and electric capacity C2 all uses electrochemical capacitor, and first end of first end of electric capacity C1 and electric capacity C2 is all positive pole.
A kind of touch mode alarm circuit being applied to ORIENTED DOOR AND WINDOW DESIGN field the most according to claim 1, it is characterized in that: described transistor T1 is audion, and first foot of transistor T1 is base stage, the crus secunda of transistor T1 is emitter stage, and the 3rd foot of transistor T1 is colelctor electrode.
CN201620339490.2U 2016-04-20 2016-04-20 Touch alarm circuit applied to door and window design field Expired - Fee Related CN205608931U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620339490.2U CN205608931U (en) 2016-04-20 2016-04-20 Touch alarm circuit applied to door and window design field

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620339490.2U CN205608931U (en) 2016-04-20 2016-04-20 Touch alarm circuit applied to door and window design field

Publications (1)

Publication Number Publication Date
CN205608931U true CN205608931U (en) 2016-09-28

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201620339490.2U Expired - Fee Related CN205608931U (en) 2016-04-20 2016-04-20 Touch alarm circuit applied to door and window design field

Country Status (1)

Country Link
CN (1) CN205608931U (en)

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Effective date of registration: 20170119

Address after: 300000 Tianjin City Huayuan Industrial Zone Rong Yuan Road No. 2 3-1203

Patentee after: Tianjin Shuo Electronic Technology Co., Ltd.

Address before: Three road 300000 Tianjin Haitai Binhai high tech Zone Branch Huayuan Industrial Area 1 building -1-1304-1 No. 1

Patentee before: Tianjin Weishuo Technology Co., Ltd.

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160928

Termination date: 20180420

CF01 Termination of patent right due to non-payment of annual fee