CN205566252U - Reset control circuit - Google Patents

Reset control circuit Download PDF

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Publication number
CN205566252U
CN205566252U CN201620345206.2U CN201620345206U CN205566252U CN 205566252 U CN205566252 U CN 205566252U CN 201620345206 U CN201620345206 U CN 201620345206U CN 205566252 U CN205566252 U CN 205566252U
Authority
CN
China
Prior art keywords
chip
pin
resistance
control circuit
key switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201620345206.2U
Other languages
Chinese (zh)
Inventor
胡立鸣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dongguan Han Yi Electronics Co., Ltd.
Original Assignee
Xiangshan Jieerde Intelligent Science and Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiangshan Jieerde Intelligent Science and Technology Ltd filed Critical Xiangshan Jieerde Intelligent Science and Technology Ltd
Priority to CN201620345206.2U priority Critical patent/CN205566252U/en
Application granted granted Critical
Publication of CN205566252U publication Critical patent/CN205566252U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model discloses a reset control circuit, including chip U1, chip U2, key switch SB, resistance R1 and electric capacity C1, chip U1 pin 1 and ground connection are connected to key switch SB one end, chip U1 pin 5 is connected to the key switch SB other end, chip U1 pin 4 and grounded capacitance C1 are connected respectively to chip U1 pin 3, ground resistance R3 is connected respectively to chip U1 pin 2, chip U2 pin 1 and chip U2 pin 2, output V1 and resistance R1 are connected respectively to chip U2 pin 7, the resistance R1 other end connect respectively VCC and resistance R2, chip U2 pin 5 and output V2 are connected respectively to the resistance R2 other end, chip U1 adopts PT8A610X, and chip U2 adopts chip 74HC125. The utility model discloses reset control circuit adopts chip PT8A610X cooperation chip 74HC125 to control, and a plurality of systems that can reset simultaneously do not adopt traditional capacitanc reset mode moreover, have avoided the problem of mentioning in the background art.

Description

A kind of reset control circuit
Technical field
This utility model relates to a kind of reset circuit, specifically a kind of reset control circuit.
Background technology
The reset circuit of prior art is connected by two electric capacity and a resistance and forms, the reset circuit of said structure has the disadvantage that owing to this reset circuit does not has reset delay, i.e. by time delay, the electric charge in electric capacity is discharged complete, if the most the electric charge in electric capacity not being discharged complete, it will necessarily affect the reset of next time, thus affects the functional reliability of this reset circuit;One system can only be resetted by the most traditional reset circuit, narrow application range.
Utility model content
The purpose of this utility model is to provide a kind of reset control circuit, with the problem solving to propose in above-mentioned background technology.
For achieving the above object, the following technical scheme of this utility model offer:
A kind of reset control circuit, including chip U1, chip U2, key switch SB, resistance R1 and electric capacity C1, described key switch SB one end connects chip U1 pin 1 ground connection, the key switch SB other end connects chip U1 pin 5, chip U1 pin 3 connects chip U1 pin 4 and ground capacity C1 respectively, chip U1 pin 2 connects earth resistance R3 respectively, chip U2 pin 1 and chip U2 pin 2, chip U2 pin 7 connects outfan V1 and resistance R1 respectively, the resistance R1 other end connects power supply VCC and resistance R2 respectively, the resistance R2 other end connects chip U2 pin 5 and outfan V2 respectively;Chip U1 uses PT8A610X, chip U2 to use chip 74HC125.
As further program of the utility model: described power supply VCC voltage is 3.3V.
As this utility model further scheme: described outfan V1 and outfan V2 connects different chips to be resetted respectively.
Compared with prior art, the beneficial effects of the utility model are: this utility model reset control circuit uses chip PT8A610X to coordinate chip 74HC125 to be controlled, can be resetted multiple system simultaneously, and do not use traditional condenser type reset mode, it is to avoid the problem mentioned in background technology.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of reset control circuit.
Detailed description of the invention
Below in conjunction with the accompanying drawing in this utility model embodiment, the technical scheme in this utility model embodiment is clearly and completely described, it is clear that described embodiment is only a part of embodiment of this utility model rather than whole embodiments.Based on the embodiment in this utility model, the every other embodiment that those of ordinary skill in the art are obtained under not making creative work premise, broadly fall into the scope of this utility model protection.
Refer to Fig. 1, in this utility model embodiment, a kind of reset control circuit, including chip U1, chip U2, key switch SB, resistance R1 and electric capacity C1, described key switch SB one end connects chip U1 pin 1 ground connection, the key switch SB other end connects chip U1 pin 5, chip U1 pin 3 connects chip U1 pin 4 and ground capacity C1 respectively, chip U1 pin 2 connects earth resistance R3 respectively, chip U2 pin 1 and chip U2 pin 2, chip U2 pin 7 connects outfan V1 and resistance R1 respectively, the resistance R1 other end connects power supply VCC and resistance R2 respectively, the resistance R2 other end connects chip U2 pin 5 and outfan V2 respectively;Chip U1 uses PT8A610X, chip U2 to use chip 74HC125;Described power supply VCC voltage is 3.3V;Described outfan V1 and outfan V2 connects different chips to be resetted respectively.
Operation principle of the present utility model is: refer to Fig. 1, when reset button switch SB presses, the 2 foot output reset signals of U1, i.e. output low level, causes two 74HCl25 conductings, and outfan V1 and the equal output low level of outfan V2 make chip reset to be resetted, under chip normal operation to be resetted, the 2 foot output high level of U1,74HCl25 ends, and outfan V1 and outfan V2 is pulled up as high level by pull-up resistor R1, R2.
It is obvious to a person skilled in the art that this utility model is not limited to the details of above-mentioned one exemplary embodiment, and in the case of without departing substantially from spirit or essential attributes of the present utility model, it is possible to realize this utility model in other specific forms.Therefore, no matter from the point of view of which point, embodiment all should be regarded as exemplary, and be nonrestrictive, scope of the present utility model is limited by claims rather than described above, it is intended that all changes fallen in the implication of equivalency and scope of claim included in this utility model.Should not be considered as limiting involved claim by any reference in claim.
In addition, it is to be understood that, although this specification is been described by according to embodiment, but the most each embodiment only comprises an independent technical scheme, this narrating mode of description is only for clarity sake, description should can also be formed, through appropriately combined, other embodiments that it will be appreciated by those skilled in the art that as an entirety, the technical scheme in each embodiment by those skilled in the art.

Claims (3)

1. a reset control circuit, including chip U1, chip U2, key switch SB, resistance R1 and electric capacity C1, it is characterized in that, described key switch SB one end connects chip U1 pin 1 ground connection, the key switch SB other end connects chip U1 pin 5, chip U1 pin 3 connects chip U1 pin 4 and ground capacity C1 respectively, chip U1 pin 2 connects earth resistance R3 respectively, chip U2 pin 1 and chip U2 pin 2, chip U2 pin 7 connects outfan V1 and resistance R1 respectively, the resistance R1 other end connects power supply VCC and resistance R2 respectively, the resistance R2 other end connects chip U2 pin 5 and outfan V2 respectively;Chip U1 uses PT8A610X, chip U2 to use chip 74HC125.
Reset control circuit the most according to claim 1, it is characterised in that described power supply VCC voltage is 3.3V.
Reset control circuit the most according to claim 1, it is characterised in that described outfan V1 and outfan V2 connects different chips to be resetted respectively.
CN201620345206.2U 2016-04-21 2016-04-21 Reset control circuit Expired - Fee Related CN205566252U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620345206.2U CN205566252U (en) 2016-04-21 2016-04-21 Reset control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620345206.2U CN205566252U (en) 2016-04-21 2016-04-21 Reset control circuit

Publications (1)

Publication Number Publication Date
CN205566252U true CN205566252U (en) 2016-09-07

Family

ID=56806103

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201620345206.2U Expired - Fee Related CN205566252U (en) 2016-04-21 2016-04-21 Reset control circuit

Country Status (1)

Country Link
CN (1) CN205566252U (en)

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
CB03 Change of inventor or designer information

Inventor after: Yang Yigen

Inventor before: Hu Liming

COR Change of bibliographic data
TR01 Transfer of patent right

Effective date of registration: 20170125

Address after: 523876 Guangdong Province, Dongguan city Changan town Xiabian Jingfu Road No. 8 two floor

Patentee after: Dongguan Han Yi Electronics Co., Ltd.

Address before: 315700 Ningbo, Xiangshan province Dan Road West Park Road, No. 112

Patentee before: Xiangshan Jie Erde intelligence Science and Technology Ltd.

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160907

Termination date: 20170421

CF01 Termination of patent right due to non-payment of annual fee