CN205563239U - Have real -time ethernet of industry and field bus's small -size PLC of integral type concurrently - Google Patents

Have real -time ethernet of industry and field bus's small -size PLC of integral type concurrently Download PDF

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Publication number
CN205563239U
CN205563239U CN201620408637.9U CN201620408637U CN205563239U CN 205563239 U CN205563239 U CN 205563239U CN 201620408637 U CN201620408637 U CN 201620408637U CN 205563239 U CN205563239 U CN 205563239U
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plc
fieldbus
real
time ethernet
industry
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文长明
文可
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Middle Industry Science Peace Science And Technology Ltd
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Middle Industry Science Peace Science And Technology Ltd
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Abstract

The utility model discloses a have real -time ethernet of industry and field bus's small -size PLC of integral type concurrently. Last 2 in the real -time ether grid side mouth of industry, 1 the field bus port of being provided with of PLC. PLC is including nuclear core plate, the IO board of ability intercommunication. 2 the real -time ethernet setting of individual industry is on nuclear core plate, and 1 field bus sets up on the IO board. The field bus port is totally 10 finding activates: 2 the finding activate is used for data communication and for the communication bus, 4 finding activate is used for the address allocation, 4 finding activates be used for for the power supply of a plurality of extension IO modules + 5V, 12V and two GND ground wires. The utility model discloses a during the design can apply to the small -size PLC's of high performance integral type research and development to the real -time ethernet of industry and field bus technique simultaneously, can extensively satisfy the application of logic control, motion control, process control's aspects such as data processing and communication networking for the small -size PLC of integral type has real -time ethernet of industry and field bus concurrently.

Description

A kind of have industry real-time ethernet and the Integral small-sized PLC of fieldbus concurrently
Technical field
This utility model relates to a kind of Integral small-sized PLC, particularly relates to one and has industry real-time ethernet concurrently Integral small-sized PLC with fieldbus.
Background technology
Programmable logic controller (PLC) (PLC) is a kind of numeral aiming at and applying in industrial settings and manufacture and design Arithmetic operation electronic system.It is with command memory and input/output interface with microprocessor for core, Infant industry automatic technology, computer technology, mechanics of communication combined together controls device.
Current state: during the body difference of Integral small-sized PLC, there is industrial real-time ethernet and scene is total Line.Indivedual types can expand to Ethernet by expanding element, and can expand to industry real-time ethernet The most less.
Utility model content
The purpose of this utility model is that providing a kind of has industry real-time ethernet and the PLC of fieldbus concurrently, This utility model can apply to high-performance Integral small-sized industry real-time ethernet and field bus technique simultaneously In the research and development of PLC.
This utility model is achieved through the following technical solutions: one has industry real-time ethernet and fieldbus concurrently Integral small-sized PLC;Industry real-time ethernet port 2, fieldbus end it is provided with on described PLC 1, mouth;Described PLC includes core board, the I O board that can be in communication with each other;2 industrial real-time ethernets are arranged On described core board, 1 fieldbus is arranged in described I O board;Described fieldbus port totally 10 Bar line: 2 lines are communication bus for data communication, 4 lines distribute for address, 4 lines be used for + 5V ,+12V that multiple extension I/O module are powered and two GND ground wires.
As the further improvement of such scheme, the power line of each extension I/O module and address wire use cascade Mode, described PLC identifies multiple extension I/O module automatically by 4 address wires.
As the further improvement of such scheme, described PLC also includes respectively to described core board and described IO The power panel that plate is powered.
As the further improvement of such scheme, described I O board is additionally provided with 2 RS232 or RS485 Or USB or INTERNET net port.
As the further improvement of such scheme, described core board uses BUS between plate to communicate with described I O board.
As the further improvement of such scheme, described core board uses microcontroller combination to realize whole The control of PLC, described microcontroller combination uses MCU Yu FPGA combination to realize.
Further, MCU Yu FPGA is integrated in a chip internal, collects in the framework of chip internal Become hard nucleus management device system MCU based on ARM or INTEL × 86CPU or MIPS CPU and FPGA logic cell.
Further, MCU Yu FPGA each accounts for a chip, uses SPI or also between two chips Row or PCI or PCIe data communication are to exchange information.
As the further improvement of such scheme, described I O board also includes input/output circuitry and input/output Terminal.
This utility model can apply to high-performance integral type industry real-time ethernet and field bus technique simultaneously In the research and development of small PLC, can extensively meet the data process of logic control, motor control, process control Application with the aspects such as networking that communicate so that Integral small-sized PLC has industry real-time ethernet concurrently and scene is total Line, and can automatically identify extension I/O module by 4 address wires.
Accompanying drawing explanation
The structural representation of the Integral small-sized PLC that Fig. 1 provides for this utility model preferred embodiment.
Fig. 2 is a kind of way of realization figure of Integral small-sized PLC in Fig. 1.
Fig. 3 is the another kind of way of realization figure of Integral small-sized PLC in Fig. 1.
Fig. 4 be in Fig. 2 Integral small-sized PLC specifically combine illustration.
Fig. 5 is that the general hardware of Integral small-sized PLC in Fig. 4 implements illustration.
Detailed description of the invention
Below in conjunction with embodiment, this utility model is further elaborated.Should be appreciated that this place The specific embodiment described, only in order to explain this utility model, does not limit this utility model.
As it is shown in figure 1, Integral small-sized PLC of the present utility model has industry real-time ethernet concurrently and scene is total Line, PLC1 includes power panel 5, core board 6, I O board 7.Power panel 5 accepts input power signal life Become the DC source of regulation electric pressure, power for the circuit on core board 6 and I O board 7.Core board 6 Can be in communication with each other with I O board 7, be BUS between the plate of communication and power supply between core board 6 and I O board 7.
On PLC1, industry real-time ethernet takies 2 ports (port namely the meaning of interface), scene Bus takies 1 port, and the most also RS232 or RS485 or USB or INTERNET net account for 2 Port.It is to say, on PLC1, be provided with 2,1 scene of 2 industrial real-time ethernet ports total 4,2 RS232 or RS485 of line cap or USB or INTERNET net port 3.RS232 or RS485 Or USB or INTERNET net accounts for 2 ports, port can be RS232 or RS485 or USB or INTERNET, 1~2 the most therein, purposes is programming port, connects host computer, connects screen.
By the industrial real-time ethernet of 2 industrial real-time ethernet ports 2, PLC1 can form arbitrarily The star network of compliant, loop network, daisy chain network, such as, with 2 mouthfuls of Powerlink ( Kind of automatization based on industrial Ethernet technology bus and standard) PLC, can set with other Powerlink Standby composition meets the star network of Powerlink specification, loop network, daisy chain network, thus realizes remote Journey I/O expansion, equipment remotely diagnoses, monitors and operates.
By the fieldbus of 1 fieldbus port 4, PLC1 can realize local I/O expansion, Ke Yi Extending a series of functional modules near field range, such as, expansion variable input/output module, analog quantity is defeated Enter/output module, counter module etc..Automatically the address of identification module, and according to this Address Autoconfiguration mould The fieldbus id number of block.The I/O module quantity that one this physical ability of PLC is loaded by fieldbus simultaneously Being limited, PLC body is by the way of fieldbus with I/O module communication simultaneously, refers to our company Patent 2015209787.2;201510863641.4;2015209787.2;201510863641.4.
Imput output circuit and input and output terminal, 1 fieldbus port 4,2 are installed in I O board 7 Individual RS232 or RS485 or USB or INTERNET net port 3 are arranged in I O board 7.2 Industry real-time ethernet port 2 is arranged on core board 6.Industrial real-time ethernet and scene for PLC Bus must is fulfilled for having property from generation to generation at APP layer (the APP layer of osi model), industry real-time ethernet APP protocol stack uses the APP protocol stack of fieldbus to develop, and they are consistent at the code of application layer, The code difference of layer is simply driven at communication apparatus.Such as industry real-time ethernet Powerlink is total with scene Line CANopen, or industry real-time ethernet Profinet and field smart node, or industry in real time with Too net Ethercat and CAN Bus open, or industry real-time ethernet SERCOS III is total with scene Line SERCOS I/II, or industry real-time ethernet MODbus-TCP and fieldbus MODbus, or work Industry real-time ethernet CCLINK IE and fieldbus CCLINK etc..
Microcontroller combination 8 (MCU+FPGA), SRAM, flash, display lamp electricity is also had on core board 6 Road.Fieldbus port 4 on core board 6 totally 10 lines: 2 lines for data communication DATA, 4 Bar line distributes ADD for address, and 4 lines are powered POWER for giving extension I/O module.Emphasis is needed to say Bright, on core board 6 microcontroller combination 8 (MCU+FPGA), the different collocation of this combination, Different effects and performance can be produced.
Combination 1 can be that MCU Yu FPGA (programmable logic cells) is integrated in a chip internal, such as figure Shown in 2, i.e. SoC ASIC or SoC FPGA, such as smartfusion2, ZYNQ7000, Altera SoC. MCU core and FPGA, be integrated in a SoC, MCU run RTOS, RTOS runs PLC The c programs such as application layer, APP application layer and equipment description, diagnosis.MCU core is also responsible for the 5 of left side Function in individual frame.Solidify IP kernel, industry real-time ethernet and the IP kernel of fieldbus on FPGA, bear Duty industry real-time ethernet communicates with the MAC of fieldbus and drives, and IP kernel is to compile with hardware description language Having MACRO in one section of program (such as VHDL, system C, VERILOG) IP kernel write (is a kind of Simplify the microcontroller IP core of a lot of uncorrelated function, only retained the function relevant with application) grand process Device, is responsible for the medium access in IP kernel, switch switching, data buffering.IP kernel on FPGA and RTOS On MCU by high-speed bus (such as AHB) communication in sheet.IP kernel on FPGA by RMII, The Media Interface Connectors such as MII access physical layer.
The framework of combination 1 is integrated with based on ARM (or INTEL × 86CPU or MIPS CPU) Hard nucleus management device system (MCU), including processor, peripheral hardware and memory interface.It is simultaneously achieved The performance of stone intellectual property (IP) and low power consumption characteristic, and the motility of FPGA.
Another kind of combination 2 is MCU and FPGA divides out, as it is shown on figure 3, each account for a chip. Between chip and chip, data communication to be used just can exchange information.MCU with FPGA divides out, individually Element, combine more rich colorful.With combination 1 difference be, combination 2 FPGA on IP kernel with MCU on RTOS is by bus communication between sheet, (such as SPI, parallel port communication, PCI, PCIe etc.)
Combination 1 use high-speed bus (such as AXI, AHB etc.) in sheet due to MCU and FPGA, Thus best performance;Combination 2 must use the method for chip and chip chamber communication, and (such as SPI, parallel port are logical News, PCI, PCIe etc.) just can ensure that MCU and FPGA exchanges data, thus performance is not as combination 1, But the scope that components and parts select can be the most extensive.
Having industry real-time ethernet Powerlink and integral type PLC of CAN Bus open concurrently it is Example, as shown in Figure 4, Cortex M3MCU core and FPGA, it is integrated in a SoC FPGA In Smartfusion2, Cortex M3 runs RTOS ecOS, ecOS upper operation PLC application layer, APP The c programs such as application layer and equipment description, diagnosis.Cortex M3MCU core is also responsible for 5 frames in left side Interior function.IP kernel, Powerlink industry real-time ethernet and CAN Bus open is solidified on FPGA IP kernel, be responsible for communicating and driving of industry real-time ethernet and fieldbus, IP kernel is to use Hardware description language MACRO Hong Chu is had in one section of program (such as VHDL, system C, VERILOG) IP kernel that speech is write Reason device, is responsible for the medium access in IP kernel, switch switching, data buffering.IP kernel on FPGA with Cortex M3 on ecOS is by high-speed bus AHB communication in sheet.IP kernel on FPGA by RMII, The Media Interface Connectors such as MII access media controller+physical layer.
The PLC corresponding with Fig. 4 in use, its hardware frame embodiment as shown in Figure 5.Fieldbus end The application of 10 extension lines of mouth 4 and extended method: use communication bus+address wire to be connected by two parts Come.Directly leading out CANopen fieldbus from the I O board of PLC, each expansion module passes through self CAN interface is articulated on CANopen fieldbus, and the power line of each expansion module and address wire use The mode of cascade.4 power lines include+5V ,+12V and two GND ground wires, and other 4 are ground Location line.
Automatically identified extension I/O module by 4 address wires, automatically identify that address process is as follows.
The extension I/O module that first, PLC are connected by address wire the 1st, sends " 0001 " to the 1st expansion Exhibition I/O module (model_0 module, the expansion module 1 in Fig. 5).Remarks: do not send ' 0000' or ' 1111' punching when being to prevent from being not connected to pin (some pin be defaulted as ' 0000' or ' 1111').
Second, model_0 module by software realize add ' 1' algorithm, constitute PLC expansion module address automatic Maker, draw addition and be 4 ' 0010' address.This addition and address are exported to second extension IO Module (model_1 module, the expansion module 2 in Fig. 5).This address cover ' if not 0000' and ' 1111' simultaneously Represent this mould successful connection.Extension I/O module M3 processor exports certain value, makes effective display lamp of this module Light, and feed back to one effective marker position of PLC core board.
The addition of the model_0 module that the address wire of the 3rd, model_1 module connects and address, enter equally Row adds ' 1' algorithm, generate expansion module address, obtain addition and address be 4 ' 0011', by this addition and address Export the 3rd extension I/O module (model_2 module, the expansion module 3 in Fig. 5).This address simultaneously If not cover ' 0000' and ' 1111' represents this mould successful connection.Extension I/O module M3 processor exports certain value, The effective display lamp making this module is lighted, and feeds back to one effective marker position of PLC core board.
4th, remaining module is the same with connected mode above with recognition principle, by that analogy.
The foregoing is only preferred embodiment of the present utility model, not in order to limit this utility model, All any amendment, equivalent and improvement etc. made within spirit of the present utility model and principle, all should Within being included in protection domain of the present utility model.

Claims (9)

1. one kind has industry real-time ethernet and the Integral small-sized PLC of fieldbus concurrently;It is characterized in that: Industry real-time ethernet port 2, fieldbus port 1 it is provided with on described PLC;Described PLC Including the core board that can be in communication with each other, I O board;2 industrial real-time ethernets are arranged on described core board, and 1 Individual fieldbus is arranged in described I O board;Described fieldbus port totally 10 lines: 2 lines are used for counting Being communication bus according to communication, 4 lines distribute for address, and 4 lines are for supplying to multiple extension I/O module + the 5V ,+12V of electricity and two GND ground wires.
Have industry real-time ethernet and the Integral small-sized PLC of fieldbus the most as claimed in claim 1 concurrently, It is characterized in that: the power line of each extension I/O module and address wire use the mode of cascade, described PLC Automatically multiple extension I/O module is identified by 4 address wires.
Have industry real-time ethernet and the Integral small-sized PLC of fieldbus the most as claimed in claim 1 concurrently, It is characterized in that: described PLC also includes the power panel powered described core board with described I O board respectively.
Have industry real-time ethernet and the Integral small-sized PLC of fieldbus the most as claimed in claim 1 concurrently, It is characterized in that: be additionally provided with 2 in described I O board selected from RS232, RS485, USB, INTERNET In net port.
Have industry real-time ethernet and the Integral small-sized PLC of fieldbus the most as claimed in claim 1 concurrently, It is characterized in that: described core board uses BUS between plate to communicate with described I O board.
Have industry real-time ethernet and the Integral small-sized PLC of fieldbus the most as claimed in claim 1 concurrently, It is characterized in that: described core board uses microcontroller combination to realize the control to whole PLC, described micro-control Device processed combination uses MCU Yu FPGA combination to realize.
Have industry real-time ethernet and the Integral small-sized PLC of fieldbus the most as claimed in claim 6 concurrently, It is characterized in that: MCU Yu FPGA is integrated in a chip internal, integrated in the framework of chip internal Hard nucleus management device system MCU of based on ARM or INTEL × 86CPU or MIPS CPU and FPGA logic cell.
Have industry real-time ethernet and the Integral small-sized PLC of fieldbus the most as claimed in claim 6 concurrently, It is characterized in that: MCU Yu FPGA each accounts for, with a chip, using SPI or parallel between two chips Or PCI or PCIe data communication are to exchange information.
Have industry real-time ethernet and the Integral small-sized PLC of fieldbus the most as claimed in claim 1 concurrently, It is characterized in that: described I O board also includes input/output circuitry and input/output terminal.
CN201620408637.9U 2016-05-05 2016-05-05 Have real -time ethernet of industry and field bus's small -size PLC of integral type concurrently Active CN205563239U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109696878A (en) * 2019-01-03 2019-04-30 中电智能科技有限公司 Controller based on multiple buffer
CN109725568A (en) * 2018-12-20 2019-05-07 武汉船用电力推进装置研究所(中国船舶重工集团公司第七一二研究所) A kind of controller expansion bus device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109725568A (en) * 2018-12-20 2019-05-07 武汉船用电力推进装置研究所(中国船舶重工集团公司第七一二研究所) A kind of controller expansion bus device
CN109696878A (en) * 2019-01-03 2019-04-30 中电智能科技有限公司 Controller based on multiple buffer
CN109696878B (en) * 2019-01-03 2020-10-02 中电智能科技有限公司 Controller based on multiple buffer zones

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