CN205508783U - Test seat and testing arrangement - Google Patents

Abstract

The utility model provides a test seat and testing arrangement, the test stationary ladle is drawn together: the basement is located in proper order isolation layer and electrically conductive frame in the basement, and encircle the lead frame of basement, wherein, be provided with a plurality of soldering lug on the lead frame, the first portion soldering lug through first lead wire with chip electric connection, the second portion soldering lug passes through the second lead wire and is connected with the basement electricity, third lead wire and chip electric connection are passed through in the basement, third part soldering lug passes through the fourth lead wire and electrically conducts that the frame is electric to be connected, electrically conductive frame is through the 5th lead wire and chip electric connection, be connected with the electricity of electrically conductive frame through electrically conductive frame and chip and soldering lug, make the soldering lug of the same quantity can connect more chip fin, avoided in the test seat soldering lug quantity to treat pin quantity limit in the test chip, and include the step that the testing arrangement of this test seat had left out the encapsulation, and then shorten measuring time, sparingly measure the cost.

Description

Test bench and test device

Technical field

This utility model relates to technical field of manufacturing semiconductors, particularly to a kind of test bench and test dress Put.

Background technology

In the research and development and large-scale production process of semiconductor chip, it is required to all kinds of performances to chip Testing, the test of chip typically requires and uses corresponding test base station (tester) and test board (DUT Plate), such as the test board etc. of functional test (function test, FT).FT test is inspection The requisite link that the function of chip is the most intact.Generally connect on test board and have for putting Putting the test bench (socket) of chip to be tested, the external test signal that test base station provides is by test The pin of test bench delivered to by plate, and then tests chip to be measured.

Chip test base is the critical component in test device.Test bench is for by chip positioning and complete Becoming electric signal and the transmission of electric current between test board and chip, its function quality directly affects chip The reliability of test and accuracy.Along with the speed of service of chip provides and electronic product size day by day Reducing, the requirement to test bench performance provides the most day by day.

Therefore, how a kind of demand that disclosure satisfy that chip pin quantity is provided, and need not encapsulation, Thus save the measurement time and measure the test bench of cost and test board is that those skilled in the art urgently solve A technical problem certainly.

Utility model content

The purpose of this utility model is to provide a kind of test bench and test device, to solve existing survey Examination seat cannot meet the demand of chip pin quantity, and test device needs to be packaged, and needs to spend Substantial amounts of time and the problem of expense.

For solving above-mentioned technical problem, this utility model provides a kind of test bench, including: substrate, depend on Secondary described suprabasil sealing coat and the conductive pane of being positioned at, and the lead frame around described substrate；Wherein, Being provided with several weld tabs on described lead frame, Part I weld tabs is by the first lead-in wire and described chip Electrical connection, Part II weld tabs is electrically connected with described substrate by the second lead-in wire, and described substrate passes through the Three lead-in wires electrically connect with described chip, and Part III weld tabs is electrically connected with described conductive pane by the 4th lead-in wire Connecing, described conductive pane is electrically connected with described chip by the 5th lead-in wire.

Preferably, described conductive pane is around described chip.

Preferably, it is provided with sealing coat between described chip and described substrate.

Preferably, the quantity of described Part II weld tabs is one.

Preferably, described Part II weld tabs ground connection.

Preferably, the quantity of described conductive pane is more than or equal to 1, different described conductive pane and described core Pin electrical connections different on sheet.

Preferably, different described conductive pane electrically connects from different described Part III weld tabs.

Preferably, the quantity of described Part III weld tabs is identical with the quantity of described conductive pane, described in lead Electricity frame and described Part III weld tabs one_to_one corresponding.

It is furthermore preferred that the quantity of described conductive pane is 2, the first conductive pane is for providing described chip In-line power signal, the second conductive pane is for providing the peripheral power supply signal of described chip.

Preferably, described weld tabs is uniformly distributed on described lead frame.

Preferably, described substrate is a conductive plate.

Preferably, described sealing coat is glue-line.

Preferably, described conductive pane is metal frame.

Preferably, described conductive pane is copper frame.

Preferably, the width of described conductive pane is 0.5mm～1mm.

Accordingly, a kind of test device that this utility model also provides for, including test base station, it is positioned at institute Stating the test board on test base station, and be positioned at the test bench on described test board, described test bench is adopted Use above-mentioned test bench.

Compared with prior art, test bench provided by the utility model and test device, by surveying Arranging conductive pane in examination seat, conductive pane is electrically connected with chip by the 5th lead-in wire, and Part III weld tabs leads to Cross the 4th lead-in wire to electrically connect with described conductive pane, so that the weld tabs of equal number can connect more Chip pin, it is to avoid in test bench, weld tabs quantity is to number of pins quantitative limitation in chip to be tested, And the test device including this test bench eliminates the step of encapsulation, and then shortens the measurement time, Save and measure cost；And without designing the hardware of new degradation and functional test, further Save measurement cost.

Accompanying drawing explanation

Fig. 1 is the top view of existing dual inline type test board.

Fig. 2 is the top view of the test bench that this utility model one embodiment is provided.

Fig. 3 is the profile of the test bench that this utility model one embodiment is provided.

Detailed description of the invention

The test bench used in prior art is typically provided with 48 weld tabs, the most common dual-in-line Test bench in formula test board, the top view of described dual inline type test board is as it is shown in figure 1, described survey Test plate (panel) includes that substrate 1, described substrate 1 edge are arranged below in the middle of the pin that two rows are parallel, described substrate 1 Position is provided with a test bench 2, and described test bench 2 is provided with 48 weld tabs 3, and described weld tabs 3 passes through Weld tabs lead-in wire is connected with described pin, enterprising by chip 4 to be tested is arranged at described test bench 2 Row test.For chip testing need pin (pin) less than 48 time, above-mentioned test board can be expired Foot requirement, if the pin that chip testing needs is more than 48, it is necessary to other test board, but Be test board encapsulation and test needs take more time and expense.

A kind of test bench this utility model provided below in conjunction with the drawings and specific embodiments and test dress Put further description.According to following explanation and claims, advantage of the present utility model and spy Levy and will be apparent from.It should be noted that, accompanying drawing all use the form simplified very much and all use non-accurately Ratio, only in order to purpose convenient, aid illustration this utility model embodiment lucidly.

Refer to the vertical view of the test bench that Fig. 2 and Fig. 3, Fig. 2 are provided by this utility model one embodiment Figure, the profile of the test bench that Fig. 3 is provided by this utility model one embodiment.Described test bench is used In test chip, as shown in Figure 2 and Figure 3, described test bench includes substrate 10, is positioned at described substrate Sealing coat 20 on 10, is positioned at the conductive pane 30 on described sealing coat 20, and around described substrate The lead frame 40 of 10；Wherein, described lead frame 40 is provided with several weld tabs 41, Part I Weld tabs 41 is electrically connected with described chip 50 by the first lead-in wire 61, and Part II weld tabs 41 passes through the Two lead-in wires 62 electrically connect with described substrate 10, and described substrate 10 is by the 3rd lead-in wire 63 and described core Sheet 50 electrically connects, and Part III weld tabs 41 is electrically connected with described conductive pane 30 by the 4th lead-in wire 64, Described conductive pane 30 is electrically connected with described chip 50 by the 5th lead-in wire 65.

In the present embodiment, described conductive pane 30 is around described chip 50.In other embodiments, described Conductive pane 30 can also be positioned at certain side of described chip 50, does not affect described conductive pane 30 with described The electrical connection of chip 50.Arrange between described chip 50 and described substrate 10 and also have sealing coat 20, it is used for isolating described chip 50 and described substrate 10.

Described Part I weld tabs 41 is electrically connected with described chip 50 by the first lead-in wire 61, be used for Described chip 50 provides external test signal.The quantity of described two part weld tabs 41 is one, i.e. institute Several pins stated on chip 50 are electrically connected with described substrate 10 by the 3rd lead-in wire 63, described base The end 10, is electrically connected with some weld tabs 41 on described lead frame 40 by the second lead-in wire 62, this weldering Sheet ground connection, for providing ground signalling to described chip 50.

The quantity of described conductive pane 30 is more than or equal to 1, different described conductive pane 30 and described core Pin electrical connections different on sheet 50, different described conductive pane 30 and different described Part III Weld tabs 41 electrically connects.The quantity of described Part III weld tabs 41 is identical with the quantity of described conductive pane 30, Described conductive pane 30 and described Part III weld tabs 41 one_to_one corresponding, say, that lead described in each Electricity frame 30 electrically connects with a described Part III weld tabs 41.Described Part III weld tabs 41 for Described chip 50 provides power supply signal.

In the present embodiment, the quantity of described conductive pane 30 is 2, and the first conductive pane 31 is used for providing The in-line power signal VCC1 of described chip 50, the second conductive pane 32 is used for providing described chip 50 Peripheral power supply signal VCC2.Described conductive pane 30 is metal frame, and the material of two metal frames is permissible Identical, it is also possible to differ, in the present embodiment, two metal frames are copper frame.Described conductive pane 30 Width be 0.5mm～1mm, such as, 0.5mm, 0.6mm, 0.7mm, 0.8mm, 0.9mm, 1mm, preferred width is 0.8mm.

Preferably, described substrate 10 is a conductive plate, and Part II weld tabs 41 is by the second lead-in wire 62 Electrically connecting with described substrate 10, described substrate 10 is electrically connected with described chip 50 by the 3rd lead-in wire 63 Connect, so that described chip 50 electrically connects with Part II weld tabs 41；Described sealing coat 20 is glue Layer, is used for isolating described substrate 10 and described conductive pane 30；Described weld tabs 41 is gold-plated copper sheet, Described first lead-in wire the 61, second lead-in wire the 62, the 3rd lead-in wire the 63, the 4th lead-in wire 64 and the 5th lead-in wire 65 Material can be identical, it is also possible to differ, in the present embodiment, described five lead-in wire materials identical, Distinguishing lead-in wire primarily to the connection distinguished between different structure, described lead-in wire is gold wire, with It is easy to well connect described weld tabs 41, conductive pane 30, substrate 10 and chip 50.Described some welderings Sheet 41 is uniformly distributed on described lead frame 10.It should be noted that Fig. 2 only denotes limited The weld tabs 41 of quantity and chip pin, the quantity of actual weld tabs and pin is not limited by Fig. 2.

It is understood that in the present embodiment, all be connected with chip 50 weld tabs 41, conductive pane 30 or substrate 10, it is all to be connected with the pin in described chip 50.By arranging in test bench Conductive pane 30, conductive pane 30 is electrically connected with chip 30 by the 5th lead-in wire 65, Part III weld tabs 41 are electrically connected with described conductive pane 30 by the 4th lead-in wire 64, so that the weld tabs of equal number More chip pin can be connected, it is to avoid in test bench, weld tabs quantity is to pin in chip to be tested Count quantitative limitation, and the test device including this test bench eliminates the step of encapsulation, and then contracting The short measurement time, save and measure cost；And survey with function without designing new degradation (BI) The hardware of examination (FT), saves measurement cost further.

Accordingly, this utility model also provides for a kind of test device, including test base station, is positioned at described Test board on test base station, and it is positioned at the test bench on described test board, described test bench uses Above-mentioned test bench.

Test bench provided by the utility model and test device, by arranging conductive pane in test bench, Conductive pane is electrically connected with chip by the 5th lead-in wire, and Part III weld tabs is led with described by the 4th lead-in wire Electricity frame electrical connection, so that the weld tabs of equal number can connect more chip pin, it is to avoid In test bench, weld tabs quantity is to number of pins quantitative limitation in chip to be tested, and includes this test bench Test device eliminate the step of encapsulation, and then shorten the measurement time, save and measure cost；And Without designing the hardware of new degradation and functional test, save measurement cost further.

Foregoing description is only the description to this utility model preferred embodiment, not to this utility model model Any restriction enclosed, the those of ordinary skill in this utility model field is according to appointing that the disclosure above content is done What change, modification, belong to the protection domain of claims.

Claims (16)

1. a test bench, is used for testing chip, it is characterised in that including: substrate, successively position In described suprabasil sealing coat and conductive pane, and the lead frame around described substrate；Wherein, institute Stating and be provided with several weld tabs on lead frame, Part I weld tabs is by the first lead-in wire and described chip electricity Connecting, Part II weld tabs is electrically connected with described substrate by the second lead-in wire, and described substrate passes through the 3rd Lead-in wire electrically connects with described chip, and Part III weld tabs is electrically connected with described conductive pane by the 4th lead-in wire, Described conductive pane is electrically connected with described chip by the 5th lead-in wire.

2. test bench as claimed in claim 1, it is characterised in that described conductive pane is around described core Sheet.

3. test bench as claimed in claim 2, it is characterised in that described chip and described substrate it Between be provided with sealing coat.

4. test bench as claimed in claim 1, it is characterised in that the number of described Part II weld tabs Amount is one.

5. test bench as claimed in claim 4, it is characterised in that described Part II weld tabs connects Ground.

6. test bench as claimed in claim 1, it is characterised in that the quantity of described conductive pane is more than Equal to 1, the pin electrical connection that different described conductive pane is different from described chip.

7. test bench as claimed in claim 6, it is characterised in that different described conductive pane with not Same described Part III weld tabs electrical connection.

8. test bench as claimed in claim 7, it is characterised in that the number of described Part III weld tabs Measure identical with the quantity of described conductive pane, described conductive pane and described Part III weld tabs one_to_one corresponding.

9. test bench as claimed in claim 8, it is characterised in that the quantity of described conductive pane is 2 Individual, the first conductive pane is for providing the in-line power signal of described chip, and the second conductive pane is used for providing The peripheral power supply signal of described chip.

10. test bench as claimed in claim 1, it is characterised in that described weld tabs is at described lead-in wire It is uniformly distributed on frame.

11. test benches as claimed in claim 1, it is characterised in that described substrate is a conductive plate.

12. test benches as claimed in claim 1, it is characterised in that described sealing coat is glue-line.

13. test benches as claimed in claim 1, it is characterised in that described conductive pane is metal frame.

14. test benches as claimed in claim 13, it is characterised in that described conductive pane is copper frame.

15. test benches as claimed in claim 14, it is characterised in that the width of described conductive pane is 0.5mm～1mm.

16. 1 kinds of test devices, including test base station, are positioned at the test board on described test base station, And it being positioned at the test bench on described test board, it is characterised in that described test bench is claim Test bench according to any one of 1～15.