CN205375261U - Band gap reference circuit that height warm purgation distributes and concentrates - Google Patents
Band gap reference circuit that height warm purgation distributes and concentrates Download PDFInfo
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- CN205375261U CN205375261U CN201620040789.8U CN201620040789U CN205375261U CN 205375261 U CN205375261 U CN 205375261U CN 201620040789 U CN201620040789 U CN 201620040789U CN 205375261 U CN205375261 U CN 205375261U
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- reference circuit
- gap reference
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Abstract
The utility model discloses a band gap reference circuit that height warm purgation distributes and concentrates, including band gap reference circuit, thermodetector and gating logic modules, the band gap reference circuit is used for exporting band gap reference voltage vBGR, thermodetector is used for detecting the temperature of the band gap environment that the reference circuit is located to output the first signal gives gating logic modules when of survey temperature value is more than or equal to the threshold value, and gating logic modules is given to the output second signal when of survey temperature value is lighter than the threshold value, the gating logic modules be used for: receive the first signal, delivering to the band gap reference circuit with first adjustment sign indicating number, when receiving the second signal, deliver to the band gap reference circuit with the the second adjustment sign indicating number. The utility model discloses find adjustment sign indicating number and the adjustment sign indicating number under the low temperature under the high temperature that every band gap reference circuit corresponds, according to the adjustment sign indicating number that external temperature value dynamic selection is suitable to reach the mesh that band gap voltage output value all distributes and concentrates very much at the height warm purgation near the command.
Description
[technical field]
This utility model relates to technical field of integrated circuits, particularly to a kind of band-gap reference circuit.
[background technology]
Current band-gap reference circuit adopts traditional voltage-type structure mostly, by design ensure band-gap reference output voltage with temperature, technique and supply voltage change within limits.The ultimate principle of its work is as it is shown in figure 1, include operational amplifier controls, three diodes (D1, D2, D3) and be serially connected in two resistance R2, R3 on two diodes (D2, D3), three metal-oxide-semiconductors.Receive and have band-gap reference circuit to pass through a positive temperature coefficient voltage and a negative temperature coefficient voltage addition, and then obtain the voltage of a zero-temperature coefficient.
And in head end test, first measure the magnitude of voltage of band-gap reference under high temperature, according to the deviation between measured value and desired value, choose corresponding code and adjust output voltage values under high temperature.Adjusting code is laser fuse output.
Along with the increase of the reduction of technology feature size and technological process complexity, band-gap reference circuit output voltage values variation with temperature amount can be relatively big, and on a wafer, the temperature characterisitic that different chip list reveals is also different.If or adjusted trim method with traditional band-gap circuit and traditional front end, would arise that problem as shown in Figure 2.
What Fig. 2 center line b represented is the curve that ideally band-gap circuit output voltage varies with temperature.Line a is the aim curve that in design and simulation, band gap output voltage varies with temperature；Line c1-c2 is then the curve that in actual test, band gap output voltage varies with temperature, in positive temperature coefficient.If by conventional front-end trim method, then can only adjust near desired value by output voltage under high temperature, the band gap voltage of all chips is at high temperature distributed to be concentrated very much, and the value of band gap voltage is disperseed very much at low temperatures.
[utility model content]
The purpose of this utility model is in that to provide the band-gap reference circuit being distributed concentration under a kind of high/low temperature, to solve above-mentioned technical problem.
To achieve these goals, this utility model adopts the following technical scheme that
The band-gap reference circuit of concentration it is distributed, including band-gap reference circuit, temperature detector and gate logic module under a kind of high/low temperature；
Described band-gap reference circuit is used for exporting bandgap voltage reference vBGR；
Described temperature detector is for detecting the temperature of band-gap reference circuit local environment, and exports the first signal when measured temperature value is more than or equal to threshold value to gate logic module, exports secondary signal when measured temperature value is less than threshold value to gate logic module；
Described gate logic module is used for: when receiving the first signal, adjusts code by first and delivers to band-gap reference circuit；When receiving secondary signal, adjust code by second and deliver to band-gap reference circuit.
Further, described band-gap reference circuit includes operational amplifier controls, diode D1, diode D2, diode D3, resistance R2, resistance R3, PMOS PMOS1, PMOS PMOS2 and PMOS PMOS3；
The drain electrode of PMOS PMOS1, PMOS PMOS2 and PMOS PMOS3 all connects power supply；The grid of PMOS PMOS1, PMOS PMOS2 and PMOS PMOS3 connects and the outfan of concatenation operation amplifier controls altogether；The source electrode of PMOS PMOS1 connects the positive pole of diode D1, the minus earth of diode D1；The positive pole of diode D2, the minus earth of diode D2 is connected after the source electrode series resistor R2 of PMOS PMOS2；The positive pole of diode D3, the minus earth of diode D3 is connected after the source electrode series resistor R3 of PMOS PMOS3；
The positive input of operational amplifier controls connects the source electrode of PMOS PMOS1, and the reverse input end of operational amplifier controls connects the source electrode of PMOS PMOS2；The source electrode output bandgap voltage reference vBGR of PMOS PMOS3.
Further, gate logic module, when receiving the first signal, adjusts code by first and delivers to the resistance R3 of band-gap reference circuit；When receiving secondary signal, adjust code by second and deliver to the resistance R3 of band-gap reference circuit.
Further, first adjusts code and second adjusts code all for adjusting the value of resistance R3, and bandgap voltage reference vBGR is close to desired value in control.
Further, described threshold value is 50 DEG C.
Further, the first adjustment code is adjustment code when 90 DEG C；Second adjustment code is adjustment code when-10 DEG C.
Further, the preparation method of the first adjustment code and the second adjustment code is as follows:
At 90 DEG C, scanning adjusts code, measures the output voltage of band-gap reference circuit simultaneously, finds one group first to adjust code so that the bandgap voltage reference value of band-gap reference circuit output is closest to desired value；
Scan all of adjustment codes at-10 DEG C, measure the bandgap voltage reference output of band-gap reference circuit output simultaneously, find one group second to adjust code so that the bandgap voltage reference value of band-gap reference circuit output is closest to desired value.
Further, the first adjustment code and the second adjustment code export to band-gap reference circuit each through laser fuse.
Relative to prior art, this utility model has following effective: this utility model finds the adjustment code adjusted under code and low temperature under the high temperature that each band-gap reference circuit is corresponding, suitable adjustment code is dynamically selected according to band-gap reference circuit external temperature value, all it is distributed around concentrating very much in desired value reaching band gap voltage output valve under high/low temperature, thus ensureing that the core capabilities parameter of dram chip reaches the requirement of system.
[accompanying drawing explanation]
Fig. 1 is the structural representation of existing band-gap reference circuit；
Fig. 2 is the curve synoptic diagram that band-gap circuit output voltage varies with temperature；
Fig. 3 is the structural representation of the band-gap reference circuit being distributed concentration under a kind of high/low temperature of this utility model.
[detailed description of the invention]
Refer to shown in Fig. 3, the band-gap reference circuit of concentration it is distributed under a kind of high/low temperature of this utility model, the band-gap reference circuit common with shown in Fig. 1 is the difference is that, this utility model newly added a temperature detector and a gate logic module in common band-gap reference circuit.The height of the output signal according to temperature detector, gate logic module selects the code that adjusts adjusting under code or low temperature under high temperature is delivered to the resistance R3 in band-gap reference circuit.
Band-gap reference circuit includes operational amplifier controls, diode D1, diode D2, diode D3, resistance R2, resistance R3, PMOS PMOS1, PMOS PMOS2 and PMOS PMOS3.The drain electrode of PMOS PMOS1, PMOS PMOS2 and PMOS PMOS3 all connects power supply；The grid of PMOS PMOS1, PMOS PMOS2 and PMOS PMOS3 connects and the outfan of concatenation operation amplifier controls altogether；The source electrode of PMOS PMOS1 connects the positive pole of diode D1, the minus earth of diode D1；The positive pole of diode D2, the minus earth of diode D2 is connected after the source electrode series resistor R2 of PMOS PMOS2；The positive pole of diode D3, the minus earth of diode D3 is connected after the source electrode series resistor R3 of PMOS PMOS3；The positive input of operational amplifier controls connects the source electrode of PMOS PMOS1, and the reverse input end of operational amplifier controls connects the source electrode of PMOS PMOS2.The source electrode output bandgap voltage reference vBGR of PMOS PMOS3.
Temperature detector is for the temperature residing for automatic detection chip, when temperature is more than or equal to 50 degree, temperature detector output signal Sel_ht is high, and Sel_ht signal is delivered in gate logic module, the code that adjusts during by 90 degree delivers to the resistance R3 in band-gap reference circuit, goes to adjust the value of resistance R3；Go to adjust the value of resistance R3, control bandgap voltage reference vBGR close to desired value；
When temperature is lower than 50 degree, temperature detector output signal Sel_ht is low, and adjustment code when now gate logic module is spent-10 delivers to resistance R3, goes to adjust the value of resistance R3, controls bandgap voltage reference vBGR close to desired value.
The preparation method adjusting adjustment code when code and-10 is spent when 90 degree is as follows:
First go down to scan at high temperature (90 degree) and adjust code, measure band-gap reference output voltage vBGR simultaneously, one group is found to adjust code so that measured value and the desired value (1.23V) of band-gap reference output voltage vBGR are closest, then just have found the adjustment code under 90 degree.
Secondly go to scan all of adjustment code at low temperature (-10 degree), measure bandgap voltage reference output vBGR simultaneously, find one group of adjustment so that the measured value of band-gap reference output voltage vBGR is closest with desired value (1.23v), then just have found the adjustment code of-10 degree.
The adjustment code adjusting code and-10 degree of 90 degree all will be exported by laser fuse.
Of the present utility model being advantageous in that can find the adjustment code under the high temperature that each chip is corresponding and the adjustment code under low temperature, suitable adjustment code is dynamically selected according to external temperature value, all it is distributed around concentrating very much in desired value reaching band gap voltage output valve under high/low temperature, thus ensureing that the core capabilities parameter of dram chip reaches the requirement of system.
Claims (7)
1. it is distributed the band-gap reference circuit of concentration under a high/low temperature, it is characterised in that include band-gap reference circuit, temperature detector and gate logic module；
Described band-gap reference circuit is used for exporting bandgap voltage reference vBGR；
Described temperature detector is for detecting the temperature of band-gap reference circuit local environment, and exports the first signal when measured temperature value is more than or equal to threshold value to gate logic module, exports secondary signal when measured temperature value is less than threshold value to gate logic module；
Described gate logic module is used for: when receiving the first signal, adjusts code by first and delivers to band-gap reference circuit；When receiving secondary signal, adjust code by second and deliver to band-gap reference circuit.
2. under a kind of high/low temperature according to claim 1, it is distributed the band-gap reference circuit of concentration, it is characterized in that, described band-gap reference circuit includes operational amplifier controls, diode D1, diode D2, diode D3, resistance R2, resistance R3, PMOS PMOS1, PMOS PMOS2 and PMOS PMOS3；
The drain electrode of PMOS PMOS1, PMOS PMOS2 and PMOS PMOS3 all connects power supply；The grid of PMOS PMOS1, PMOS PMOS2 and PMOS PMOS3 connects and the outfan of concatenation operation amplifier controls altogether；The source electrode of PMOS PMOS1 connects the positive pole of diode D1, the minus earth of diode D1；The positive pole of diode D2, the minus earth of diode D2 is connected after the source electrode series resistor R2 of PMOS PMOS2；The positive pole of diode D3, the minus earth of diode D3 is connected after the source electrode series resistor R3 of PMOS PMOS3；
The positive input of operational amplifier controls connects the source electrode of PMOS PMOS1, and the reverse input end of operational amplifier controls connects the source electrode of PMOS PMOS2；The source electrode output bandgap voltage reference vBGR of PMOS PMOS3.
3. it is distributed the band-gap reference circuit of concentration under a kind of high/low temperature according to claim 2, it is characterised in that gate logic module, when receiving the first signal, adjusts code by first and delivers to the resistance R3 of band-gap reference circuit；When receiving secondary signal, adjust code by second and deliver to the resistance R3 of band-gap reference circuit.
4. it is distributed the band-gap reference circuit of concentration under a kind of high/low temperature according to claim 3, it is characterised in that first adjusts code and second adjusts code all for adjusting the value of resistance R3, and bandgap voltage reference vBGR is close to desired value in control.
5. it is distributed the band-gap reference circuit of concentration under a kind of high/low temperature according to claim 1, it is characterised in that described threshold value is 50 DEG C.
6. it is distributed the band-gap reference circuit of concentration under a kind of high/low temperature according to claim 1, it is characterised in that the first adjustment code is adjustment code when 90 DEG C；Second adjustment code is adjustment code when-10 DEG C.
7. it is distributed the band-gap reference circuit of concentration under a kind of high/low temperature according to claim 1, it is characterised in that the first adjustment code and second adjusts code and exports to band-gap reference circuit each through laser fuse.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620040789.8U CN205375261U (en) | 2016-01-15 | 2016-01-15 | Band gap reference circuit that height warm purgation distributes and concentrates |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620040789.8U CN205375261U (en) | 2016-01-15 | 2016-01-15 | Band gap reference circuit that height warm purgation distributes and concentrates |
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| Publication Number | Publication Date |
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| CN205375261U true CN205375261U (en) | 2016-07-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620040789.8U Expired - Fee Related CN205375261U (en) | 2016-01-15 | 2016-01-15 | Band gap reference circuit that height warm purgation distributes and concentrates |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105487589A (en) * | 2016-01-15 | 2016-04-13 | 西安紫光国芯半导体有限公司 | Bandgap reference circuit distributed in concentrated mode at high temperature and low temperature |
-
2016
- 2016-01-15 CN CN201620040789.8U patent/CN205375261U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105487589A (en) * | 2016-01-15 | 2016-04-13 | 西安紫光国芯半导体有限公司 | Bandgap reference circuit distributed in concentrated mode at high temperature and low temperature |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160706 Termination date: 20180115 |