CN104063004B - The self-adaptative adjustment circuit of constant-current supply, method and chip - Google Patents
The self-adaptative adjustment circuit of constant-current supply, method and chip Download PDFInfo
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Abstract
The present invention is applicable to Energy control field, provides a kind of self-adaptative adjustment circuit of constant-current supply, method and chip.The embodiment of the present invention comprises correcting current module by employing, the self-adaptative adjustment circuit of the constant-current supply of digital load adjusting module and one or more current detection module, achieve and current detecting correspondingly export one or more decision level signal is carried out to constant-current power supply circuit, then can by the output current of correcting current module according to one or more decision level signal calibration constant-current supply, and according to one or more decision level signal, digital load automatic regulating module can also judge whether the output current of constant-current supply reaches matching current value, and according to the object that the frequency of operation of judged result adjustment digital load matches with the output current of the frequency of operation and constant-current supply that reach digital load, also reduce the power consumption of circuit simultaneously.
Description
Technical field
The invention belongs to Energy control field, particularly relate to the self-adaptative adjustment circuit of constant-current supply, method and chip.
Background technology
At present, constant-current supply (i.e. shunt power supply) is generally applied to chip internal as power supply.For the powering mode of shunt power supply, steady current is mainly adopted to power, the power consumption fluctuation produced when can shield chip operation like this, and then reduce interference, also can prevent assailant from doing power consumption analysis to chip simultaneously, reduce the risk suffering security attack, therefore, shunt power supply is widely used in non-contact card class chip and security classes chip.
But because shunt power supply adopts the steady current of external power source to carry out powering, and its inside carries out voltage-regulation by by-pass current mode, so it certainly exists the waste of power consumption.So, in order to reduce power wastage, then need matching chip power consumption and constant current configuration; In addition, due to the impact of chip technology deviation, generally also need comparatively careful correcting current could realize coupling, and when temperature is different, digital load also can correspondingly change, and this just needs the higher testing mechanism of precision could correspondingly realize mating accurately.Therefore, prior art existence is difficult to carry out current detecting to constant-current supply and exports corresponding testing result to realize automatically regulating digital load to configure with matching current, in chip testing process alignment current arrangements, and according to the duty of chip, dynamic adjustments is carried out to save the problem of power consumption to current arrangements.
Summary of the invention
The object of the present invention is to provide a kind of self-adaptative adjustment circuit of constant-current supply, be intended to solve being difficult to carry out current detecting to constant-current supply and exporting corresponding testing result to realize automatically regulating digital load to configure with matching current of prior art existence, in chip testing process alignment current arrangements, and according to the duty of chip, dynamic adjustments is carried out to save the problem of power consumption to current arrangements.
The present invention realizes like this, a kind of self-adaptative adjustment circuit of constant-current supply, be connected with constant-current supply, comprise correcting current module and digital load adjusting module, constant-current supply described in described correcting current model calling, described digital load adjusting module is connected with digital load and described constant-current supply, and described digital load connects described constant-current supply;
Described self-adaptative adjustment circuit also comprises one or more current detection module, and described one or more current detection module is connected with described correcting current module and described digital load adjusting module;
Described one or more current detection module carries out detection to the redundant current in described constant-current supply and correspondingly exports one or more decision level signal to described correcting current module and described digital load automatic regulating module;
When needs carry out detection calibration to constant-current supply, the output current of described correcting current module constant-current supply according to described one or more decision level signal calibration;
When described constant-current supply is powered to described digital load, described digital load pre-sets the output current of described constant-current supply by described digital load adjusting module, then adjusts the frequency of operation of described digital load according to described one or more decision level signal.
Another object of the present invention is also to provide a kind of chip, and described chip comprises the self-adaptative adjustment circuit of described constant-current supply and described constant-current supply.
Another object of the present invention is also the electric current and the load matched method of adjustment that provide a kind of constant-current supply, and described electric current and load matched method of adjustment comprise the following steps:
Detection is carried out to the redundant current in constant-current supply and correspondingly exports one or more decision level signal;
When needs carry out detection calibration to constant-current supply, the output current of constant-current supply according to described one or more decision level signal calibration;
When described constant-current supply is to digital load supplying, pre-set the output current of described constant-current supply, then adjust the frequency of operation of described digital load according to described one or more decision level signal.
The present invention comprises correcting current module by employing, the self-adaptative adjustment circuit of the constant-current supply of digital load adjusting module and one or more current detection module, achieve and current detecting correspondingly export one or more decision level signal is carried out to constant-current power supply circuit, then can by the output current of correcting current module constant-current supply according to described one or more decision level signal calibration, and according to described one or more decision level signal, described digital load adjusting module can also judge whether described output current reaches matching current value, and the object that the frequency of operation adjusting described digital load according to judged result matches with the frequency of operation and described output current that reach digital load, also reduce the power consumption of circuit simultaneously, thus solve being difficult to carry out current detecting to constant-current supply and exporting corresponding testing result to realize automatically regulating digital load to configure with matching current of prior art existence, in chip testing process alignment current arrangements, and according to the duty of chip, dynamic adjustments is carried out to save the problem of power consumption to current arrangements.
Accompanying drawing explanation
Fig. 1 is the function structure chart of the self-adaptative adjustment circuit of the constant-current supply that first embodiment of the invention provides;
Fig. 2 is the cut-away view of the constant-current supply involved by first embodiment of the invention;
Fig. 3 is a kind of exemplary circuit structural drawing of the current detection module in the self-adaptative adjustment circuit of the constant-current supply that first embodiment of the invention provides;
Fig. 4 is the another kind of exemplary circuit structural drawing of the current detection module in the self-adaptative adjustment circuit of the constant-current supply that first embodiment of the invention provides;
Fig. 5 is another exemplary circuit structural drawing of the current detection module in the self-adaptative adjustment circuit of the constant-current supply that first embodiment of the invention provides;
Fig. 6 is the example circuit structural drawing of the self-adaptative adjustment circuit of constant-current supply involved by first embodiment of the invention;
Fig. 7 is the example circuit structural drawing of the self-adaptative adjustment circuit of constant-current supply involved by first embodiment of the invention;
Fig. 8 is the another kind of cut-away view of the constant-current supply involved by first embodiment of the invention;
Fig. 9 is a kind of exemplary circuit structural drawing of the current detection module in the self-adaptative adjustment circuit of the constant-current supply that first embodiment of the invention provides;
Figure 10 is the another kind of exemplary circuit structural drawing of the current detection module in the self-adaptative adjustment circuit of the constant-current supply that first embodiment of the invention provides;
Figure 11 is another exemplary circuit structural drawing of the current detection module in the self-adaptative adjustment circuit of the constant-current supply that first embodiment of the invention provides;
Figure 12 is the electric current of the constant-current supply that second embodiment of the invention provides and the realization flow figure of load matched method of adjustment.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
The embodiment of the present invention comprises correcting current module by employing, the self-adaptative adjustment circuit of the constant-current supply of digital load adjusting module and one or more current detection module, achieve and current detecting correspondingly export one or more decision level signal is carried out to constant-current power supply circuit, then can by the output current of correcting current module according to one or more decision level signal calibration constant-current supply, and according to one or more decision level signal, digital load automatic regulating module can also judge whether the output current of constant-current supply reaches matching current value, and according to the object that the frequency of operation of judged result adjustment digital load matches with the output current of the frequency of operation and constant-current supply that reach digital load, also reduce the power consumption of circuit simultaneously.
embodiment one:
With the example that is applied as in the chips, the self-adaptative adjustment circuit of constant-current supply provided by the invention is described below:
Fig. 1 shows the modular structure of the self-adaptative adjustment circuit of the constant-current supply that first embodiment of the invention provides, and for convenience of explanation, illustrate only part related to the present embodiment, details are as follows:
The chip that the embodiment of the present invention provides comprises constant-current supply 100 and self-adaptative adjustment circuit 200.Self-adaptative adjustment circuit 200 is connected with constant-current supply 100, self-adaptative adjustment circuit 200 comprises correcting current module 210 and digital load adjusting module 220, correcting current module 210 connects constant-current supply 100, digital load adjusting module 220 is connected with digital load 300 and constant-current supply 200, and digital load 300 connects constant-current supply 100.
Self-adaptative adjustment circuit 200 also comprises one or more current detection module, one or more current detection module is connected with correcting current module 210 and digital load adjusting module 220, and when the quantity of current detection module is multiple, the reference current of each current detection module is different.
One or more current detection module carries out detection to the redundant current in constant-current supply 100 and correspondingly exports one or more decision level signal to correcting current module 210 and digital load adjusting module 220.Wherein, redundant current is the remainder of its output current is used for the power tube that redundant current is released by constant-current supply 100 On current by its inside, can know whether the output current of constant-current supply 100 meets testing standard or whether match with the frequency of operation of digital load 300 by detecting redundant current.
When needs carry out detection calibration to constant-current supply 100, correcting current module 210 is according to the output current of described one or more decision level signal calibration constant-current supply 200.
When constant-current supply 100 pairs of digital loads 300 are powered, digital load 300 pre-sets the output current of constant-current supply 100 by digital load adjusting module 220, then adjusts the frequency of operation of digital load 300 according to described one or more decision level signal.
In embodiments of the present invention, start work when correcting current module 210 is and calibrates constant-current supply 100 in needs are to chip testing, it comprises leakage current judging unit 211 and correcting current unit 212.Leakage current judging unit 211 is connected with one or more current detection module, receive one or more decision level signals that one or more current detection module exports, logical process is carried out to one or more decision level signal and judges whether meet testing standard current value by the output current of constant-current supply 100 (namely whether redundant current is excessive, too small or moderate), and correspondingly export decision signal to correcting current unit 212 according to judged result, correcting current unit 212 regulates to the adjustable current source in constant-current supply 100 object reaching calibration current configuration according to this decision signal.
Digital load adjusting module 220 mates to reach the object of saving power consumption with the output current of constant-current supply 100 to the frequency of operation of digital load 300 according to different duties in chip operation process.Digital load adjusting module 220 comprises matching judgment unit 221, digital load control module 222 and electric current preset unit 223.Electric current preset unit 223 first pre-sets the output current of constant-current supply 100 according to the steering order of digital load 300, then receive by matching judgment unit 221 one or more decision level signals that one or more current detection module 230 exports, logical process is carried out to one or more decision level signal and judges whether the output current of constant-current supply 100 reaches matching current value, and correspondingly adjusted the frequency of operation of digital load 300 according to judged result by digital load control module 222, match to make the output current of the frequency of operation of digital load 300 and constant-current supply 100.
Fig. 2 shows the common circuit structure of constant-current supply 100, adjustable current source Iref wherein and PMOS PM1 determines total output current of constant-current supply 100 as main devices, I1 in Fig. 2 is exactly above-mentioned redundant current, and can realize by adjustment adjustable current source Iref the object that aforesaid calibration current configured or pre-set the output current of continuous current 100.Wherein, the electric current I o that PMOS PM1 flows through obtains by the electric current I r of adjustable current source Iref_shunt is carried out mirror image, so Io=K*Ir, K is positive count, and Io=I1+I2, I2 is the working current of the load R of chip, so I1 just can detect for correcting current module 210 and digital load 220 as redundant current, voltage VDD is the voltage of the first end of load R, it provides operating voltage for digital load 300, amplifier U1 is used for controlling redundant current I1 that PMOS PM2 releases to ground to reach the object of regulation voltage VDD according to voltage VDD.
In embodiments of the present invention, the quantity of current detection module determines the quantity of current detecting gear, if namely current detection module quantity is one, then current detection module provides a reference current value for comparing with the output current of constant-current supply 100, and correspondingly exports a decision level signal to digital load adjusting module 220; If need to carry out multilevel iudge more accurately by multiple reference current value to the output current of constant-current supply, then the quantity of current detection module should be multiple, and the reference current that provides of each current detection module is different, this reference current value be by the current mirror in current detection module according to certain mirror image pipe number than determining.
As shown in Figure 3, it illustrates wherein a kind of internal circuit configuration of current detection module, current detection module comprises the first PMOS PM3, the first NMOS tube NM0, the first phase inverter INV1, the second phase inverter INV2 and the second NMOS tube NM1;
Grid and the source electrode of the first PMOS PM3 are connected the grid of the PMOS PM2 in constant-current supply 100 and the output terminal (being namely in like manner connected to the VDD in Fig. 2) of constant-current supply 100 respectively, the drain electrode of the first PMOS PM3 and the drain electrode of the second NMOS tube NM1 are connected to the input end of the first phase inverter INV1 altogether, the output terminal of the first phase inverter INV1 connects the input end of the second phase inverter INV2, the output terminal simultaneous connection word adjustment of load module 220 of the second phase inverter INV2 and leakage current judge module 211, the grid of the first NMOS tube NM0 and drain electrode are connected to reference current source IREF(altogether, and it provides reference current Iref1), the source ground of the first NMOS tube NM0, the grid of the second NMOS tube NM1 connects the grid of the first NMOS tube NM0, the source ground of the second NMOS tube NM1.
As shown in Figure 4, it illustrates the another kind of internal circuit configuration of current detection module, current detection module comprises the first PMOS PM3, the first NMOS tube NM0, the first phase inverter INV1, the second phase inverter INV2 and multiple NMOS tube;
Grid and the source electrode of the first PMOS PM3 are connected the grid of the PMOS PM2 in constant-current supply 100 and the output terminal (being namely in like manner connected to the VDD in Fig. 2) of constant-current supply 100 respectively, the drain electrode of the first PMOS PM3 connects the input end of the first phase inverter INV1, the output terminal of the first phase inverter INV1 connects the input end of the second phase inverter INV2, the output terminal simultaneous connection word adjustment of load module 220 of the second phase inverter INV2 and leakage current judge module 211, the grid of the first NMOS tube NM0 is connected to reference current source IREF altogether with drain electrode, the source ground of the first NMOS tube NM0, the drain electrode of the NMOS tube NM1 be connected with the first PMOS PM3 in multiple NMOS tube connects the drain electrode of the first PMOS PM3, in multiple NMOS tube, the grid of all NMOS tube (NM1 ~ NMn) is connected to the grid of the first NMOS tube NM0 altogether, connect successively with the form of the drain electrode of the source electrode of NMOS tube NM1 connection NMOS tube NM2 from NMOS tube NM1 in multiple NMOS tube, in multiple NMOS tube, the substrate of all NMOS tube and the source electrode of NMOS tube NMn are connected to ground altogether.
As shown in Figure 5, it illustrates another internal circuit configuration of current detection module, current detection module comprises the first PMOS PM3, the first NMOS tube NM0, the first phase inverter INV1, the second phase inverter INV2 and multiple NMOS tube;
Grid and the source electrode of the first PMOS PM3 are connected the grid of the PMOS PM2 in constant-current supply 100 and the output terminal (being namely in like manner connected to the VDD in Fig. 2) of constant-current supply 100 respectively, the drain electrode of the first PMOS PM3 connects the input end of the first phase inverter INV1, the output terminal of the first phase inverter INV1 connects the input end of the second phase inverter INV2, the output terminal simultaneous connection word adjustment of load module 220 of the second phase inverter INV2 and leakage current judge module 211, the grid of the first NMOS tube NM0 is connected to reference current source IREF altogether with drain electrode, the source ground of the first NMOS tube NM0, drain electrode and the source electrode of all NMOS tube (NM1 ~ NMn) in multiple NMOS tube are connected drain electrode and the ground of the first PMOS PM3 respectively, the grid of all NMOS tube (NM1 ~ NMn) in multiple NMOS tube is connected to reference current source IREF altogether.
In three kinds of inner structures of above-mentioned current detection module, in the structure shown in Fig. 3, first PMOS PM3 obtains electric current I 3 from the PMOS PM1 mirror image constant-current supply 100, so I3=h*I1, and the electric current that the first NMOS tube NM0 flows through is the reference current Iref1 introduced from reference current source IREF, then the electric current that NMOS tube NM1 flows through is exactly aforesaid reference current I4; If mirror image pipe number is than being exactly NMOS tube NM1 and the ratio of the quantity of the first NMOS tube NM0, i.e. 1:1, so, the pass of reference current I4 and reference current Iref1 is I4=Iref1.
In the structure shown in Fig. 4, first PMOS PM3 obtains electric current I 3 from the PMOS PM1 mirror image constant-current supply 100, so I3=h*I1, and the electric current that the first NMOS tube NM0 flows through is the reference current Iref1 introduced from reference current source IREF, then the electric current that multiple NMOS tube (NM1 ~ NMn) flows through is exactly aforesaid reference current I4; Mirror image pipe number ratio is exactly multiple NMOS tube (NM1 ~ NMn) and the ratio of the quantity of the first NMOS tube NM0, suppose that the quantity of multiple NMOS tube (NM1 ~ NMn) be n(n is positive integer), then mirror image pipe number is than being n:1, so, the pass of reference current I4 and reference current Iref1 is I4=1/n*Iref1.
In the structure shown in Fig. 5, first PMOS PM3 obtains electric current I 3 from the PMOS PM1 mirror image constant-current supply 100, so I3=h*I1, and the electric current that the first NMOS tube NM0 flows through is the reference current Iref1 introduced from reference current source IREF, the electric current that then NMOS tube NM1 ~ NMn flows through is exactly aforesaid reference current I4, i.e. the electric current that NMOS tube NM1 ~ NMn flows through is equal; Mirror image pipe number ratio is exactly multiple NMOS tube (NM1 ~ NMn) and the ratio of the quantity of the first NMOS tube NM0, suppose that the quantity of multiple NMOS tube (NM1 ~ NMn) be n(n is positive integer), then mirror image pipe number is than being n:1, and so, the pass of reference current I4 and reference current Iref1 is I4=n*Iref1.
In sum, the quantity of current detecting gear is determined by the quantity of selected current detection module, and the size of each reference current is determined by one or more NMOS tube (NM1 ~ NMn) and the ratio of the quantity of NMOS tube NM2, just can make multiple current gear to the output current of constant-current supply 100 to judge, and export the decision level signal (i.e. the output of phase inverter INV2) identical with the quantity of current detecting gear to correcting current module 210 and digital load adjusting module 220 by current detection module 230, so that correcting current module 210 calibrates the current arrangements of constant-current supply 100 more exactly in test process, also be convenient to digital load adjusting module 220 can realize accurately adjusting the frequency of operation of digital load 300, match to make the current arrangements of the frequency of operation of digital load 300 and constant-current supply 100.
Below in conjunction with instantiation, above-mentioned current detection module is described further:
Suppose that current detecting gear is 2 grades, namely the quantity of current detection module is 2, as shown in Figure 6, the inner structure of current detection module 231 is same as shown in Figure 3, the inner structure of current detection module 232 is same as shown in Figure 4, and the quantity of multiple NMOS tube (NM1 ~ NMn) is 2(and NMOS tube NM1 and NMOS tube NM2), so the reference current I41=Iref1 in current detection module 231, the reference current I4 in current detection module 232
2=1/2*Iref1, in addition, also suppose that the decision level signal that the second phase inverter INV2 in current detection module 231 exports is ID1, the decision level signal that the second phase inverter INV2 in current detection module 232 exports is ID2.
Electric current I 3<I4 in current detection module 231
1time, ID1 is 0;
Electric current I 3>I4 in current detection module 231
1time, ID1 is 1;
Electric current I 3<I4 in current detection module 232
2time, ID2 is 0;
Electric current I 3>I4 in current detection module 232
2time, ID2 is 1.
In detection calibration process, correcting current module 210 judges after will carrying out logical process to ID1 and ID2 whether the output current of constant-current supply 100 meets testing standard current value (namely judging that redundant current is excessive, too small or moderate), if I3<I4
2(due to I4
1>I4
2, then I3<I4
1), then ID1=0, ID2=0, now shows that redundant current I1 is too small, and then learn that the output current of constant-current supply 100 is less than testing standard current value, correcting current module 210 can according to the adjustable current source Iref in current increment value adjustment constant-current supply 100 to improve current arrangements; If I3<I4
1and I3>I4
2, then ID1=0, ID2=1, now shows that redundant current I1 is moderate, and then learns that the output current of constant-current supply 100 meets testing standard current value, and correcting current module 210 does not adjust adjustable current source Iref; If I3>I4
2and I3>I4
1then ID1=1, ID2=1, now show that redundant current I1 is excessive, and then learn that the output current of constant-current supply 100 is greater than testing standard current value, correcting current module 210 is understood according to the adjustable current source Iref in current step-down value adjustment constant-current supply 100 to reduce current arrangements, and current step-down value is greater than aforesaid current increment value, so can make the lower power consumption of load R in whole calibration process.
When chip normally works, judge the output current of constant-current supply 100 and the relation of matching current value after digital load adjusting module 220 couples of ID1 and ID2 carry out logical process, and the frequency of operation automatically adjusting digital load 300 according to judged result is to mate the current arrangements of constant-current supply 100.If I3<I4
2(due to I4
1>I4
2, then I3<I4
1), then ID1=0, ID2=0, now shows that redundant current I1 is too small, and then learns that the output current of constant-current supply 100 is less than matching current value, and digital load adjusting module 220 can reduce the frequency of operation of digital load 300 to mate the output current of constant-current supply 100; If I3<I4
1and I3>I4
2then ID1=0, ID2=1, now show that redundant current I1 is moderate, and then learn that the output current of constant-current supply 100 meets matching current value, now the frequency of operation of digital load 300 is mated with the output current of constant-current supply 100, and digital load adjusting module 220 does not adjust the frequency of operation of digital load 300; If I3>I4
2and I3>I4
1, then ID1=1, ID2=1, now shows that redundant current I1 is excessive, and then learns that the output current of constant-current supply 100 is greater than matching current value, and digital load adjusting module 220 can improve the frequency of operation of digital load 300 to mate the output current of constant-current supply 100.
Suppose that current detecting gear is 2 grades, namely the quantity of current detection module is 2, as shown in Figure 7, the inner structure of current detection module 231 is same as shown in Figure 3, the inner structure of current detection module 232 is same as shown in Figure 5, and the quantity of multiple NMOS tube (NM1 ~ NMn) is 2(and NMOS tube NM1 and NMOS tube NM2), so the reference current I4 in current detection module 231
1=Iref1, the reference current I4 in current detection module 232
2=2*Iref1, in addition, also suppose that the decision level signal that the phase inverter INV2 in current detection module 231 exports is ID1, the decision level signal that the phase inverter INV2 in current detection module 232 exports is ID2.
Electric current I 3<I4 in current detection module 231
1time, ID1 is 0;
Electric current I 3>I4 in current detection module 231
1time, ID1 is 1;
Electric current I 3<I4 in current detection module 232
2time, ID2 is 0;
Electric current I 3>I4 in current detection module 232
2time, ID2 is 1.
In detection calibration process, correcting current module 210 judges after will carrying out logical process to ID1 and ID2 whether the output current of constant-current supply 100 meets testing standard current value (namely judging that redundant current is excessive, too small or moderate), if I3<I4
1(due to I4
1<I4
2, then I3<I4
2), then ID1=0, ID2=0, now shows that redundant current I1 is too small, and then learn that the output current of constant-current supply 100 is less than testing standard current value, correcting current module 210 can according to the adjustable current source Iref in current increment value adjustment constant-current supply 100 to improve current arrangements; If I3<I4
2and I3>I4
1, then ID1=1, ID2=0, now shows that redundant current I1 is moderate, and then learns that the output current of constant-current supply 100 meets testing standard current value, and correcting current module 210 does not adjust adjustable current source Iref; If I3>I4
1and I3>I4
2then ID1=1, ID2=1, now show that redundant current I1 is excessive, and then learn that the output current of constant-current supply 100 is greater than testing standard current value, correcting current module 210 is understood according to the adjustable current source Iref in current step-down value adjustment constant-current supply 100 to reduce current arrangements, and current step-down value is greater than aforesaid current increment value, so can make the lower power consumption of load R in whole calibration process.
When chip normally works, judge the output current of constant-current supply 100 and the relation of matching current value after digital load adjusting module 220 couples of ID1 and ID2 carry out logical process, and the frequency of operation automatically adjusting digital load 300 according to judged result is to mate the current arrangements of constant-current supply 100.If I3<I4
1(due to I4
1<I4
2, then I3<I4
2), then ID1=0, ID2=0, now shows that redundant current I1 is too small, and then learns that the output current of constant-current supply 100 is less than matching current value, and digital load adjusting module 220 can reduce the frequency of operation of digital load 300 to mate the output current of constant-current supply 100; If I3<I4
2and I3>I4
1then ID1=1, ID2=0, now show that redundant current I1 is moderate, and then learn that the output current of constant-current supply 100 meets matching current value, now the frequency of operation of digital load 300 is mated with the output current of constant-current supply 100, and digital load adjusting module 220 does not adjust the frequency of operation of digital load 300; If I3>I4
1and I3>I4
2, then ID1=1, ID2=1, now shows that redundant current I1 is excessive, and then learns that the output current of constant-current supply 100 is greater than matching current value, and digital load adjusting module 220 can improve the frequency of operation of digital load 300 to mate the output current of constant-current supply 100.
In addition, if the PMOS PM2 shown in Fig. 2 is changed to NMOS tube NM(as shown in Figure 8), in three kinds of internal circuit configurations of then aforesaid current detection module, the first PMOS PM3 in current detection module shown in Fig. 3 then needs to replace with the second NMOS tube Q1, as shown in Figure 9, current detection module comprises the second NMOS tube Q1, the second PMOS P0, the first phase inverter INV1, the second phase inverter INV2, the 3rd phase inverter INV3 and the 3rd PMOS P1;
The grid of the second NMOS tube Q1 connects the grid of the NMOS tube NM in constant-current supply 100, the drain electrode of the second NMOS tube Q1 and the drain electrode of the 3rd PMOS P1 are connected to the input end of the first phase inverter INV1 altogether, second NMOS tube Q1 source ground, the output terminal of the first phase inverter INV1 connects the input end of the second phase inverter INV2, the output terminal of the second phase inverter INV2 connects the input end of the 3rd phase inverter INV3, the output terminal simultaneous connection word adjustment of load module 220 of the 3rd phase inverter INV3 and leakage current judge module 211, the source electrode of the second PMOS P0 and the source electrode of the 3rd PMOS P1 are connected to the output terminal (being namely in like manner connected to the VDD in Fig. 8) of constant-current supply 100 altogether, the grid of the second PMOS P0 and the grid of drain electrode and the 3rd PMOS P1 are connected to reference current source IREF(altogether, and it provides reference current Iref1).
In like manner, the first PMOS PM3 in current detection module shown in Fig. 4 then needs to replace with the second NMOS tube Q1, as shown in Figure 10, current detection module comprises the second NMOS tube Q1, the second PMOS P0, the first phase inverter INV1, the second phase inverter INV2, the 3rd phase inverter INV3 and multiple PMOS;
The grid of the second NMOS tube Q1 connects the grid of the NMOS tube NM in constant-current supply 100, the drain electrode of the second NMOS tube Q1 connects the input end of the first phase inverter INV1, the source ground of the second NMOS tube Q1, the output terminal of the first phase inverter INV1 connects the input end of the second phase inverter INV2, the output terminal of the second phase inverter INV2 connects the input end of the 3rd phase inverter INV3, the output terminal simultaneous connection word adjustment of load module 220 of the 3rd phase inverter INV3 and leakage current judge module 211, in the source electrode of the PMOS Pn in the source electrode of the second PMOS P0 and multiple PMOS and multiple PMOS, the substrate of all PMOS (P1 ~ Pn) is connected to the output terminal (being namely in like manner connected to the VDD in Fig. 8) of constant-current supply 100 altogether, the grid of the second PMOS P0 and drain electrode are connected to reference current source IREF altogether with the grid of all PMOS (P1 ~ Pn) in multiple PMOS, the drain electrode of the PMOS P1 be connected with the second NMOS tube Q1 in multiple PMOS connects the drain electrode of the second NMOS tube Q1, from PMOS P1, PMOS Pn is connected to successively with the form of the drain electrode of the source electrode of PMOS P1 connection PMOS P2 in multiple PMOS.
In like manner, the first PMOS PM3 in current detection module shown in Fig. 5 then needs to replace with the second NMOS tube Q1, as shown in figure 11, current detection module comprises the second NMOS tube Q1, the second PMOS P0, the first phase inverter INV1, the second phase inverter INV2, the 3rd phase inverter INV3 and multiple PMOS;
The grid of the second NMOS tube Q1 connects the grid of the NMOS tube NM in constant-current supply 100, the drain electrode of the second NMOS tube Q1 connects the input end of the first phase inverter INV1, the source ground of the second NMOS tube Q1, the output terminal of the first phase inverter INV1 connects the input end of the second phase inverter INV2, the output terminal of the second phase inverter INV2 connects the input end of the 3rd phase inverter INV3, the output terminal simultaneous connection word adjustment of load module 220 of the 3rd phase inverter INV3 and leakage current judge module 211, the grid of the second PMOS P0 and drain electrode are connected to reference current source IREF altogether with the grid of all PMOS (P1 ~ Pn) in multiple PMOS, in the source electrode of the second PMOS P0 and multiple PMOS, the source electrode of all PMOS (P1 ~ Pn) is connected to the output terminal (being namely in like manner connected to the VDD in Fig. 8) of constant-current supply 100 altogether, in multiple PMOS, the drain electrode of all PMOS (P1 ~ Pn) is connected to the input end of the first phase inverter INV1 altogether.
The principle of work of the current detection module shown in Fig. 9, Figure 10 and Figure 11 and identical shown in Fig. 3, Fig. 4 and Fig. 5, therefore repeat no more.
embodiment two:
Figure 12 shows the electric current of the constant-current supply that second embodiment of the invention provides and the realization flow of load matched method of adjustment, and for convenience of explanation, illustrate only part related to the present embodiment, details are as follows:
In step sl, detection carried out to the redundant current in constant-current supply and correspondingly export one or more decision level signal.
In step s 2, when needs carry out detection calibration to constant-current supply, according to the output current of one or more decision level signal calibration constant-current supply.
Wherein, specifically comprise the following steps according to the step of the output current of one or more decision level signal calibration constant-current supply:
Receive one or more decision level signal;
Judge whether the output current of constant-current supply meets testing standard current value and correspondingly export decision signal according to judged result after logical process is carried out to one or more decision level signal;
According to decision signal, the adjustable current source in constant-current supply is regulated.
In step s3, when described constant-current supply is to digital load supplying, pre-set the output current of constant-current supply, then adjust the frequency of operation of digital load according to one or more decision level signal.
Wherein, specifically comprise the following steps according to the step of the frequency of operation of one or more decision level signal adjustment digital load:
Receive one or more decision level signal;
Logical process is carried out to one or more decision level signal and judges whether the output current of constant-current supply reaches matching current value;
The frequency of operation of digital load is correspondingly adjusted according to judged result.
The embodiment of the present invention comprises correcting current module by employing, the self-adaptative adjustment circuit of the constant-current supply of digital load adjusting module and one or more current detection module, achieve and current detecting correspondingly export one or more decision level signal is carried out to constant-current power supply circuit, then can by the output current of correcting current module according to one or more decision level signal calibration constant-current supply, and according to one or more decision level signal, digital load automatic regulating module can also judge whether the output current of constant-current supply reaches matching current value, and according to the object that the frequency of operation of judged result adjustment digital load matches with the output current of the frequency of operation and constant-current supply that reach digital load, also reduce the power consumption of circuit simultaneously, thus solve cannot carrying out current detecting to constant-current supply and exporting corresponding testing result to realize automatically regulating digital load to configure with matching current of prior art existence, in chip testing process alignment current arrangements, and regulate current arrangements to save the problem of power consumption according to the duty of chip.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (11)
1. the self-adaptative adjustment circuit of a constant-current supply, be connected with constant-current supply, it is characterized in that, described self-adaptative adjustment circuit comprises correcting current module and digital load adjusting module, constant-current supply described in described correcting current model calling, described digital load adjusting module is connected with digital load and described constant-current supply, and described digital load connects described constant-current supply;
Described self-adaptative adjustment circuit also comprises one or more current detection module, and described one or more current detection module is connected with described correcting current module and described digital load adjusting module;
Described one or more current detection module carries out detection to the redundant current in described constant-current supply and correspondingly exports one or more decision level signal to described correcting current module and described digital load adjusting module;
When needs carry out detection calibration to constant-current supply, the output current of described correcting current module constant-current supply according to described one or more decision level signal calibration;
When described constant-current supply is powered to described digital load, described digital load pre-sets the output current of described constant-current supply by described digital load adjusting module, then adjusts the frequency of operation of described digital load according to described one or more decision level signal;
Described redundant current is the remainder of its output current is used for the power tube that redundant current is released by described constant-current supply On current by its inside.
2. self-adaptative adjustment circuit as claimed in claim 1, it is characterized in that, described redundant current is released to ground by the PMOS PM2 in described constant-current supply; Described correcting current module comprises leakage current judging unit, and described leakage current judging unit is connected with described one or more current detection module;
Described current detection module comprises the first PMOS PM3, the first NMOS tube NM0, the first phase inverter INV1, the second phase inverter INV2 and the second NMOS tube NM1;
Grid and the source electrode of described first PMOS PM3 are connected the grid of the PMOS PM2 in described constant-current supply and the output terminal of described constant-current supply respectively, the drain electrode of described first PMOS PM3 and the drain electrode of described second NMOS tube NM1 are connected to the input end of described first phase inverter INV1 altogether, the output terminal of described first phase inverter INV1 connects the input end of described second phase inverter INV2, the output terminal of described second phase inverter INV2 connects described digital load adjusting module and described leakage current judging unit simultaneously, the grid of described first NMOS tube NM0 is connected to reference current source altogether with drain electrode, the source ground of described first NMOS tube NM0, the grid of described second NMOS tube NM1 connects the grid of described first NMOS tube NM0, the source ground of described second NMOS tube NM1.
3. self-adaptative adjustment circuit as claimed in claim 1, it is characterized in that, described redundant current is released to ground by the PMOS PM2 in described constant-current supply; Described correcting current module comprises leakage current judging unit, and described leakage current judging unit is connected with described one or more current detection module;
Current detection module comprises the first PMOS PM3, the first NMOS tube NM0, the first phase inverter INV1, the second phase inverter INV2 and multiple NMOS tube; Multiple NMOS tube is n NMOS tube;
Grid and the source electrode of described first PMOS PM3 are connected the grid of the PMOS PM2 in described constant-current supply and the output terminal of described constant-current supply respectively, the drain electrode of described first PMOS PM3 connects the input end of described first phase inverter INV1, the output terminal of described first phase inverter INV1 connects the input end of described second phase inverter INV2, the output terminal of described second phase inverter INV2 connects described digital load adjusting module and described leakage current judging unit simultaneously, the grid of described first NMOS tube NM0 is connected to reference current source altogether with drain electrode, the source ground of described first NMOS tube NM0, the drain electrode of the NMOS tube NM1 be connected with described first PMOS PM3 in described multiple NMOS tube connects the drain electrode of described first PMOS PM3, in described multiple NMOS tube, the grid of all NMOS tube is connected to the grid of described first NMOS tube NM0 altogether, connect successively with the form of the drain electrode of the NMOS tube NM2 in the described multiple NMOS tube of the source electrode of described NMOS tube NM1 connection from described NMOS tube NM1 in described multiple NMOS tube, the source electrode of the NMOS tube NMn in described multiple NMOS tube in the substrate of all NMOS tube and described multiple NMOS tube is connected to ground altogether.
4. self-adaptative adjustment circuit as claimed in claim 1, it is characterized in that, described redundant current is released to ground by the PMOS PM2 in described constant-current supply; Described correcting current module comprises leakage current judging unit, and described leakage current judging unit is connected with described one or more current detection module;
Current detection module comprises the first PMOS PM3, the first NMOS tube NM0, the first phase inverter INV1, the second phase inverter INV2 and multiple NMOS tube;
Grid and the source electrode of described first PMOS PM3 are connected the grid of the PMOS PM2 in described constant-current supply and the output terminal of described constant-current supply respectively, the drain electrode of described first PMOS PM3 connects the input end of described first phase inverter INV1, the output terminal of described first phase inverter INV1 connects the input end of described second phase inverter INV2, the output terminal of described second phase inverter INV2 connects described digital load adjusting module and described leakage current judging unit simultaneously, the grid of described first NMOS tube NM0 is connected to reference current source altogether with drain electrode, the source ground of described first NMOS tube NM0, drain electrode and the source electrode of all NMOS tube in described multiple NMOS tube are connected drain electrode and the ground of described first PMOS PM3 respectively, the grid of all NMOS tube in described multiple NMOS tube is connected to reference current source altogether.
5. self-adaptative adjustment circuit as claimed in claim 1, it is characterized in that, described redundant current is released to ground by the NMOS tube NM in described constant-current supply; Described correcting current module comprises leakage current judging unit, and described leakage current judging unit is connected with described one or more current detection module;
Described current detection module comprises the second NMOS tube Q1, the second PMOS P0, the first phase inverter INV1, the second phase inverter INV2, the 3rd phase inverter INV3 and the 3rd PMOS P1;
The grid of described second NMOS tube Q1 connects the grid of the NMOS tube NM in described constant-current supply, the drain electrode of described second NMOS tube Q1 and the drain electrode of described 3rd PMOS P1 are connected to the input end of described first phase inverter INV1 altogether, described second NMOS tube Q1 source ground, the output terminal of described first phase inverter INV1 connects the input end of described second phase inverter INV2, the output terminal of described second phase inverter INV2 connects the input end of described 3rd phase inverter INV3, the output terminal of described 3rd phase inverter INV3 connects described digital load adjusting module and described leakage current judging unit simultaneously, the source electrode of described second PMOS P0 and the source electrode of described 3rd PMOS P1 are connected to the output terminal of described constant-current supply altogether, grid and the drain electrode of described second PMOS P0 are connected to reference current source altogether with the grid of described 3rd PMOS P1.
6. self-adaptative adjustment circuit as claimed in claim 1, it is characterized in that, described redundant current is released to ground by the NMOS tube NM in described constant-current supply; Described correcting current module comprises leakage current judging unit, and described leakage current judging unit is connected with described one or more current detection module;
Described current detection module comprises the second NMOS tube Q1, the second PMOS P0, the first phase inverter INV1, the second phase inverter INV2, the 3rd phase inverter INV3 and multiple PMOS; Multiple PMOS is n PMOS;
The grid of described second NMOS tube Q1 connects the grid of the NMOS tube NM in described constant-current supply, the drain electrode of described second NMOS tube Q1 connects the input end of described first phase inverter INV1, the source ground of described second NMOS tube Q1, the output terminal of described first phase inverter INV1 connects the input end of described second phase inverter INV2, the output terminal of described second phase inverter INV2 connects the input end of described 3rd phase inverter INV3, the output terminal of described 3rd phase inverter INV3 connects described digital load adjusting module and described leakage current judging unit simultaneously, in the source electrode of the PMOS Pn in the source electrode of described second PMOS P0 and described multiple PMOS and described multiple PMOS, the substrate of all PMOS is connected to the output terminal of described constant-current supply altogether, the grid of described second PMOS P0 and drain electrode are connected to reference current source altogether with the grid of all PMOS in described multiple PMOS, the drain electrode of the PMOS P1 be connected with described second NMOS tube Q1 in described multiple PMOS connects the drain electrode of described second NMOS tube Q1, from described PMOS P1, be connected to the PMOS Pn in described multiple PMOS successively with the form of the drain electrode of the PMOS P2 in the described multiple PMOS of the source electrode of described PMOS P1 connection in described multiple PMOS.
7. self-adaptative adjustment circuit as claimed in claim 1, it is characterized in that, described redundant current is released to ground by the NMOS tube NM in described constant-current supply; Described correcting current module comprises leakage current judging unit, and described leakage current judging unit is connected with described one or more current detection module;
Described current detection module comprises the second NMOS tube Q1, the second PMOS P0, the first phase inverter INV1, the second phase inverter INV2, the 3rd phase inverter INV3 and multiple PMOS;
The grid of described second NMOS tube Q1 connects the grid of the 3rd NMOS tube NM in described constant-current supply, the drain electrode of described second NMOS tube Q1 connects the input end of described first phase inverter INV1, the source ground of described second NMOS tube Q1, the output terminal of described first phase inverter INV1 connects the input end of described second phase inverter INV2, the output terminal of described second phase inverter INV2 connects the input end of described 3rd phase inverter INV3, the output terminal of described 3rd phase inverter INV3 connects described digital load adjusting module and described leakage current judging unit simultaneously, the grid of described second PMOS P0 and drain electrode are connected to reference current source altogether with the grid of all PMOS in described multiple PMOS, in the source electrode of described second PMOS P0 and described multiple PMOS, the source electrode of all PMOS is connected to the output terminal of described constant-current supply altogether, in described multiple PMOS, the drain electrode of all PMOS is connected to the input end of described first phase inverter INV1 altogether.
8. a chip, comprises constant-current supply, it is characterized in that, described chip also comprises the self-adaptative adjustment circuit of the constant-current supply as described in any one of Claims 1-4.
9. the electric current of constant-current supply and a load matched method of adjustment, it is characterized in that, described electric current and load matched method of adjustment comprise the following steps:
Detection is carried out to the redundant current in constant-current supply and correspondingly exports one or more decision level signal;
When needs carry out detection calibration to constant-current supply, the output current of constant-current supply according to described one or more decision level signal calibration;
When described constant-current supply is to digital load supplying, pre-set the output current of described constant-current supply, then adjust the frequency of operation of described digital load according to described one or more decision level signal;
Described redundant current is the remainder of its output current is used for the power tube that redundant current is released by described constant-current supply On current by its inside.
10. electric current as claimed in claim 9 and load matched method of adjustment, it is characterized in that, the step of the described output current according to described one or more decision level signal calibration constant-current supply specifically comprises the following steps:
Receive one or more decision level signal;
Judge whether the output current of constant-current supply meets testing standard current value and correspondingly export decision signal according to judged result after logical process is carried out to described one or more decision level signal;
According to described decision signal, the adjustable current source in constant-current supply is regulated.
11. electric current as claimed in claim 9 and load matched methods of adjustment, is characterized in that, the step of the described frequency of operation according to one or more decision level signal adjustment digital load specifically comprises the following steps:
Receive one or more decision level signal;
Logical process is carried out to described one or more decision level signal and judges whether the output current of constant-current supply reaches matching current value;
The frequency of operation of described digital load is correspondingly adjusted according to judged result.
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| CN104698425B (en) * | 2015-03-27 | 2019-03-05 | 国家电网公司 | A kind of load automatic matching method of electric energy meter direct current even-order harmonic test |
| US10031541B1 (en) * | 2017-07-05 | 2018-07-24 | Infineon Technologies Ag | Current sensing for linear voltage regulator |
| CN108168385B (en) * | 2018-03-20 | 2023-07-07 | 中国工程物理研究院化工材料研究所 | Heavy current constant current tester with load automatic matching function |
| CN110646658B (en) * | 2018-06-27 | 2022-07-01 | 联合汽车电子有限公司 | DC-DC power supply module output current calibration system and calibration method |
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