CN205374677U

CN205374677U - SoC reliability examination device

Info

Publication number: CN205374677U
Application number: CN201521004328.7U
Authority: CN
Inventors: 赵元富; 刘亚丽; 于立新; 彭和平; 庄伟�; 任永正
Original assignee: Beijing Microelectronic Technology Institute; Mxtronics Corp
Current assignee: Beijing Microelectronic Technology Institute; Mxtronics Corp
Priority date: 2015-12-07
Filing date: 2015-12-07
Publication date: 2016-07-06
Anticipated expiration: 2025-12-07

Abstract

The utility model provides a soC reliability examination device, adopts whole board to examine the mode, puts into high lowtemperature cabinet with whole breadboard, makes soC normally work, furthest examination soC reliability, and soC running state can be monitored at any time in the communication of using communication interface to realize soC and host computer. This soC reliability checking system has realized the reliability of highly reliable soC under adverse circumstances and has judged, provides reliable data index for using to and the experimental solution of complete soC reliability examination.

Description

A kind of SoC Reliability Check device

Technical field

This utility model relates to a kind of SoC Reliability Check device, gives practicable checking device particular for the SoC being applied to adverse circumstances, namely adopts high-low temperature chamber and outer monitoring to carry out the testing program of imposite examination.

Background technology

SoC (SystemOnChip), it is whole system to be integrated on single (or a few) chip, thus completing the integrated circuit of whole system function.The SoC applied environment used in onboard system is severe, and service time is long, it is necessary to its reliability is carried out comprehensively, the examination of system.Traditional ageing life test can not simulate SoC actual application environment, it is impossible to effectively evaluates SoC service life, carries out exploring innovation to the examination environment of SoC, at utmost simulation limit applied environment, the reliability of ability accurate evaluation device.

Utility model content

Technology of the present utility model solves problem: overcome the deficiencies in the prior art, a kind of SoC Reliability Check device is proposed, SoC adverse circumstances adaptability is judged, is examined the integrity of guarantee test by high-low temperature chamber imposite, provide reliable data and index for device application.

Technical solution of the present utility model is: a kind of SoC Reliability Check device, including: circuit board to be tested, PC, high-low temperature chamber, power supply；

Circuit board to be tested, including: electric pressure converter, reset chip, program storage, communication interface, crystal oscillator, SoC circuit to be measured；

SoC circuit to be measured connects reset chip, program storage, communication interface and crystal oscillator, forms series circuit；

Power supply connects the electric pressure converter of circuit board to be tested, powers to circuit board to be tested；Electric pressure converter, converts the running voltage of circuit board to be tested to by supply voltage, powers to reset chip, program storage, communication interface, crystal oscillator, SoC circuit to be measured；

Circuit board to be tested is placed in high-low temperature chamber；

PC connects SoC circuit to be measured by communication interface, opens debugging software, testing results program, and Debugging interface shows " in SoC Reliability Check ".

Described circuit under test is SoC circuit to be measured.

The range of temperature of described high-low temperature chamber is-55 DEG C～125 DEG C.

Described communication interface is DSU debugging interface.

This utility model compared with prior art provides the benefit that:

(1) this utility model adopts imposite examination patterns, whole bread board is put in high-low temperature chamber, test procedure selects the program that power consumption is maximum, SoC is made to operate at full capacity, farthest examination SoC reliability, use communication interface to realize the communication of SoC and PC, SoC running status can be monitored at any time.

(2) this utility model SoC to be measured circuit is the circuit of integrated whole system function, and applied environment is severe, and service time is long, and its reliability can be carried out comprehensively by this assay device, the examination of system.

(3) range of temperature of this utility model high-low temperature chamber is-55 DEG C～125 DEG C, can the temperature conditions of comprehensive simulated SoC circuit to be measured, farthest examination SoC reliability.

(4) this utility model communication interface is DSU debugging interface, when examination, SoC circuit to be measured can be debugged, and flexible operation is convenient.

Accompanying drawing explanation

Fig. 1 is this utility model device block diagram.

Fig. 2 is the structured flowchart of this utility model circuit board to be tested.

Detailed description of the invention

A kind of SoC Reliability Check device, adopt imposite examination patterns, whole bread board is put in high-low temperature chamber, make SoC normal operation, farthest examination SoC reliability, such as make SoC normal operation by the program in program storage, use communication interface to realize the communication of SoC and host computer, SoC running status can be monitored at any time.This SoC Reliability Check system, it is achieved that highly reliable SoC reliability decision in the presence of a harsh environment, provides reliable data target and the solution of complete SoC Reliability Check Test for application.

As it is shown in figure 1, a kind of SoC Reliability Check device, including circuit board to be tested shown in power supply, Fig. 2, high-low temperature chamber and PC.

Power supply adopts 0V～25V voltage source, and the fixing 5V voltage of output gives circuit board to be tested.

Circuit board to be tested includes electric pressure converter, reset chip, communication interface, crystal oscillator, SoC circuit to be measured, it is also possible to add program storage.Communication interface can adopt debugging interface DSU, is used for and PERCOM peripheral communication.

SoC circuit to be measured connects reset chip, program storage, communication interface and crystal oscillator.Power supply connects the electric pressure converter of circuit board to be tested, powers to circuit board to be tested；Electric pressure converter, converts the running voltage of circuit board to be tested to by supply voltage, powers to reset chip, program storage, communication interface, crystal oscillator, SoC circuit to be measured.

Owing to SoC circuit to be measured is two-supply circuit, it is preferable that scheme is: IO voltage 3.3V, core voltage 1.8V；Maximum operation frequency 100MHz, operating temperature range is-55 DEG C～125 DEG C, on sheet, SoC circuit is operated frequency debugging by integrated debugging supporter (DSU), it is made to be operated in operating frequency, reset chip is Low level effective to the reset signal that SoC circuit sends, so all peripheral components all select general corps level or higher level device on circuit board to be tested, running voltage is 3.3V.

Preferred version: electric pressure converter adopts two kinds, input is 5V voltage, exports respectively 3.3V and 1.8V, it is ensured that the power supply of circuit board to be tested；Reset chip is output as 200ns low level, it is provided that to SoC circuit to be measured and program storage；Program storage includes storing test program in PROM and SRAM, FLASH, it is ensured that power down is not lost, and after powering on, test program is moved from PROM in SRAM and performed, and performs speed fast；Communication interface is the debugging interface of SoC circuit to be measured, can debug flexibly after being connected with PC, monitors the running status of SoC circuit to be measured at any time；Crystal oscillator adopts 20～100MHz, it is ensured that the operating frequency of SoC circuit to be measured is within the scope of 20～100MHz.

The range of temperature of high-low temperature chamber is-55 DEG C～125 DEG C, it is possible to set environment temperature, and every 10 DEG C is one grade, it is ensured that the operating temperature of circuit board to be tested.

PC connects SoC circuit to be measured by communication interface, opens Debugging interface.

Circuit board to be tested is placed in high-low temperature chamber, design temperature-55 DEG C, connect whole device as shown in Figure 1, test program selects the program that SoC circuit power consumption to be measured is maximum, program in program storage is inputted SoC circuit, Debugging interface shows " in SoC Reliability Check ", preferably every 4 hour record Debugging interface display whether unchanged, show normally if program runs 2000 hours Debugging interface, then the examination of this temperature reliability is passed through, the temperature of follow-up adjustment high-low temperature chamber, every less preferred rising 10 DEG C, until 125 DEG C, improve 10 DEG C every time and be temperature capacity according to SoC circuit and state is determined, under normal working frequency, raise 10 DEG C through repetition test every time, can both protect SoC circuit, save the thermometric time；If Debugging interface show and makes mistakes in program is run, namely SOC cannot bear temperature normal operation now, then SoC circuit reliability to be measured is examined and do not passed through.

This Reliability Check device uses in the Reliability Check of onboard system SoC, the reliability of SoC has been carried out great checking, it is ensured that the reliability application of onboard system.

Claims

1. a SoC Reliability Check device, it is characterised in that: include circuit board to be tested, PC, high-low temperature chamber, power supply；

Circuit board to be tested, including: electric pressure converter, reset chip, communication interface, crystal oscillator, SoC circuit to be measured；

SoC circuit to be measured connects reset chip, communication interface and crystal oscillator；

Power supply connects the electric pressure converter of circuit board to be tested, powers to circuit board to be tested；Electric pressure converter, converts the running voltage of circuit board to be tested to by the supply voltage of power supply, powers to reset chip, communication interface, crystal oscillator, SoC circuit to be measured；

Circuit board to be tested is placed in high-low temperature chamber；

PC connects SoC circuit to be measured by communication interface.

2. a kind of SoC Reliability Check device according to claim 1, it is characterised in that: the range of temperature of described high-low temperature chamber is-55 DEG C～125 DEG C.

3. a kind of SoC Reliability Check device according to claim 1, it is characterised in that: described communication interface is DSU debugging interface.