CN205187842U - MEMS chip package structure - Google Patents

MEMS chip package structure Download PDF

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Publication number
CN205187842U
CN205187842U CN201520906871.XU CN201520906871U CN205187842U CN 205187842 U CN205187842 U CN 205187842U CN 201520906871 U CN201520906871 U CN 201520906871U CN 205187842 U CN205187842 U CN 205187842U
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CN
China
Prior art keywords
mems chip
cover plate
seal circle
bonded seal
sealing ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201520906871.XU
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Chinese (zh)
Inventor
万里兮
马力
付俊
翟玲玲
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Huatian Technology Kunshan Electronics Co Ltd
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Huatian Technology Kunshan Electronics Co Ltd
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Priority to CN201520906871.XU priority Critical patent/CN205187842U/en
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Publication of CN205187842U publication Critical patent/CN205187842U/en
Expired - Fee Related legal-status Critical Current
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Abstract

The utility model discloses a MEMS chip package structure, this packaging structure include has dimpling point connection portion and sealing washer connecting portion by the MEMS chip on the MEMS chip function face, dimpling point connection portion links to each other with the weld pad electrical property of MEMS chip, apron, the preparation of its first surface have dimpling point and a sealing washer, should the apron correspond the dimpling point connection portion and the sealing washer connecting portion bonded of position through dimpling point and sealing washer and MEMS chip, and the bonded sealing washer is around the functional areas of MEMS chip, and edge extension to the edge of MEMS chip outside the sealing washer to have first distance with the MEMS edge, dimpling point is embedded in the sealing washer, and the sealing washer between have an isolation clearance. The utility model discloses the sealing washer is by near edge extension to chip edge of chip functional areas to with the structure that the dimpling point that is located it is kept apart, increase the cohere area of sealing washer with MEMS chip and apron, thereby strengthened the cohesion, guarantee the sealability, and improved anti atmospheric pressure ability, increase the reliability.

Description

MEMS chip encapsulating structure
Technical field
The utility model relates to chip encapsulation technology field, particularly relates to a kind of MEMS chip encapsulating structure.
Background technology
MEMS (Micro-Electro-MechanicalSystems) chip-packaging structure, structure general at present and preparation method adopt glass or silicon as cover plate, after cover plate and MEMS chip bonding, then grind at the MEMS chip back side, carve silicon, make circuit, the packaging technologies such as long tin ball.The most processing procedure of the method is all in MEMS chip, inevitably cause the problems such as stress accumulation, in order to reduce the impact of stress on MEMS chip, usual employing first makes the cover plate that a surface has micro convex point, micro convex point connection metal circuit, metallic circuit extends to another surface of cover plate by the via on cover plate, and like this by the bonding of the weld pad of micro convex point and MEMS chip, another chip electrically can being guided to cover plate is surperficial.But so design, need around chip functions district, separately establish sealing ring to ensure the air-tightness in chip functions district, in prior art, usually the micro convex point at sealing ring and edge is separated certain distance, concrete width is formulated according to MEMS chip size, or is filled with underfill between sealing ring and micro convex point.But the bonding of this structure is further improved, to meet the sealing to sealing ring, anti-air pressure ability, the requirements at the higher level that cohesiveness and reliability propose.
Summary of the invention
In order to solve the problems of the technologies described above, the utility model proposes a kind of MEMS chip encapsulating structure, by the width of sealing ring is increased, add the Bonding area of sealing ring and MEMS chip and cover plate, thus strengthen cohesion, ensure that sealability, and improve anti-air pressure ability, add reliability.
The technical solution of the utility model is achieved in that
A kind of MEMS chip encapsulating structure, comprising:
MEMS chip, the functional surfaces of described MEMS chip has functional areas and is positioned at some weld pads of functional areas periphery, and described weld pad and functional areas are electrical connected; The functional surfaces of described MEMS chip is manufactured with micro convex point connecting portion and sealing ring connecting portion, described micro convex point connecting portion and described weld pad are electrical connected;
Cover plate, described cover plate has first surface and second surface corresponding thereto, described first surface is manufactured with micro convex point and sealing ring, described cover plate, by the micro convex point connecting portion of described micro convex point and sealing ring and described MEMS chip correspondence position and sealing ring connecting portion bonding, forms bonding salient point and bonded seal circle;
This bonded seal circle sealing ring is around the functional areas of described MEMS chip, and bonded seal circle outward flange extends and the edge of close described MEMS chip, and with border one first distance of described MEMS chip, and described bonding salient point and described weld pad are embedded in described bonded seal circle, and and there is an external series gap between described bonded seal circle.
Further, the position of the corresponding MEMS chip functional areas of first surface of described cover plate forms a cavity, and described cavity is positioned at described bonded seal circle.
Further, described bonded seal circle is identical with the material of bonding salient point, is metal material, and the height of described bonded seal circle is identical with the height of described bonding salient point.
Further, described bonded seal circle is annulus or fillet side's ring or the polygon ring of fillet or erose annular.
Further, described first distance range is 1 ~ 1000 μm.
Further, the width range of described external series gap is 10 ~ 50 μm.
Further, also comprise,
Via, through described cover plate;
Insulating barrier, is layed in first surface and the second surface of described sidewalls and cover plate;
Metal wiring layer, is layed on described insulating barrier, and connects by described via the pad that bonding micro convex point on described cover plate first surface and second surface preset soldered ball position;
Protective layer, on the metal wiring layer on the metal wiring layer being formed at described cover plate second surface and in described via; Described protective layer is formed with some weld parts of the described metal wiring layer of electrical connection.
Further, the second surface of described cover plate is formed with some grooves.
The beneficial effects of the utility model are: the utility model provides a kind of MEMS chip encapsulating structure, wherein, the functional surfaces of MEMS chip is connected with the bonding of the first surface of cover plate and is realized by bonded seal circle and some bonding salient points, bonded seal circle sealing ring is around the functional areas of MEMS chip, functional unit for functional areas provides the working space of sealing, the electrical connection of bonding salient point causes the metal wiring layer of cover plate first surface and the weld pad of MEMS chip, with the electrical second surface being caused cover plate by via of the weld pad by MEMS chip.Especially, the outward flange of bonded seal circle extends and near the edge of MEMS chip, and to be separated by one first distance with the edge of MEMS chip; Bonding salient point, via and the metal wiring layer causing cover plate first surface are all embedded in bonded seal circle, and an and external series gap of being separated by between bonded seal circle.Like this, the width of sealing ring obtains increase, adds the Bonding area of sealing ring and MEMS chip and cover plate, thus strengthens cohesion, ensure that sealability, and improves anti-air pressure ability, increases reliability.Preferably, MEMS wafer class encapsulation structure cover plate first surface is provided with cavity, and during the functional surfaces bonding of cover plate first surface and MEMS chip, cavity and MEMS chip functional areas form confined space; The second surface of cover plate is carved with some grooves, when can alleviate cover plate and MEMS chip bonding, due to the cover plate stress that cavity causes, to cut down angularity, improves the bonding effect of cover plate and MEMS chip.And this some groove, welding stress when cover plate and circuit board (function substrate) bonding can also be alleviated, to improve the package reliability of MEMS chip.
Accompanying drawing explanation
Fig. 1 is the utility model one embodiment MEMS chip wafer level packaging structure profile;
Fig. 2 is MEMS chip profile perspective in the utility model;
Fig. 3 is the top view of the utility model cover plate first surface;
Fig. 4 be in Fig. 3 A-A to profile perspective;
Fig. 5 is B place structure for amplifying schematic diagram in Fig. 4;
Fig. 6 is another embodiment MEMS chip wafer level packaging structure profile of the utility model;
By reference to the accompanying drawings, make the following instructions:
1-MEMS chip 101-functional areas
102-weld pad 2-cover plate
201-first surface 202-second surface
203-cavity 204-via
205-groove 3-micro convex point connecting portion
4-sealing ring connecting portion 5-micro convex point
6-sealing ring 7-bonding salient point
8-bonded seal circle 9-first distance
10-external series gap 11-insulating barrier
12-metal wiring layer 13-protective layer
14-weld part
Detailed description of the invention
For enabling the technical solution of the utility model more understandable, below in conjunction with accompanying drawing, detailed description of the invention of the present utility model is described in detail.For convenience of description, in the structure of embodiment accompanying drawing, each part does not press normal rates convergent-divergent, therefore does not represent the actual relative size of each structure in embodiment.Wherein said structure or face above or upside, comprise the middle situation also having other layers.
As shown in Figure 1, Figure 2, shown in Fig. 3, Fig. 4 and Fig. 5, a kind of MEMS chip encapsulating structure, comprising:
One MEMS chip 1, the functional surfaces of described MEMS chip has functional areas 101 and is positioned at some weld pads 102 of functional areas periphery, and described weld pad and functional areas are electrical connected, as chip functions district and the extraneous window be communicated with; The functional surfaces of described MEMS chip is manufactured with micro convex point connecting portion 3 and sealing ring connecting portion 4, as shown in Figure 2, the weld pad of this micro convex point connecting portion and MEMS chip is electrical connected, and in the present embodiment, the device of these functional areas can be cantilever beam structure.
One cover plate 2, described cover plate has first surface 201 and second surface corresponding thereto 202, described first surface is manufactured with micro convex point 5 and sealing ring 6, described cover plate, by the micro convex point connecting portion of described micro convex point and sealing ring and described MEMS chip correspondence position and sealing ring connecting portion bonding, forms bonding salient point 7 and bonded seal circle 8;
This bonded seal circle sealing ring is around the functional areas of described MEMS chip, and bonded seal circle outward flange extends and the edge of close described MEMS chip, and with the border one first of described MEMS chip distance 9, and described bonding salient point and described weld pad are embedded in described bonded seal circle, and and have an external series gap 10 between described bonded seal circle;
One via 204, through described cover plate; In the present embodiment, the shape of via is straight hole.The bonding salient point of cover plate first surface is electrically guided on the soldered ball of second surface by straight hole by metallic circuit.The weld pad electrical communication of bonding salient point and MEMS chip, thus by the second surface electrically guiding to cover plate of MEMS chip.
One insulating barrier 11, is layed in first surface and the second surface of described sidewalls and cover plate; Insulating barrier is used for isolating the silicon in MEMS chip, and prevent short circuit, the material of insulating barrier can be Inorganic Non-metallic Materials, as silica, can be also insulating polymeric material, as photoresist etc.
One metal wiring layer 12, is layed on described insulating barrier, and connects by described via the pad that bonding micro convex point on described cover plate first surface and second surface preset soldered ball position;
One protective layer 13, on the metal wiring layer on the metal wiring layer being formed at described cover plate second surface and in described via; Described protective layer is formed with some weld parts 14 of the described metal wiring layer of electrical connection.Weld part can be soldered ball, and as tin ball, can be solder micro convex point, or be directly UBM, or be copper post, in the present embodiment, weld part be soldered ball.The protective layer of the upper surface covering of metal wiring layer, its material can be high molecular polymer, silica, silicon nitride etc., plays insulation and protection metallic circuit.
In said structure, the functional surfaces of MEMS chip is connected with the bonding of the first surface of cover plate and is realized by bonded seal circle and some bonding salient points, bonded seal circle sealing ring is around the functional areas of MEMS chip, functional unit for functional areas provides the working space of sealing, the electrical connection of bonding salient point causes the metal wiring layer of cover plate first surface and the weld pad of MEMS chip, with the electrical second surface being caused cover plate by via of the weld pad by MEMS chip.Especially, the outward flange of bonded seal circle extends and near the edge of MEMS chip, and to be separated by one first distance with the edge of MEMS chip; Bonding salient point, via and the metal wiring layer causing cover plate first surface are all embedded in bonded seal circle, and an and external series gap of being separated by between bonded seal circle.Like this, the width of sealing ring obtains increase, adds the Bonding area of sealing ring and MEMS chip and cover plate, thus strengthens cohesion, ensure that sealability, and improves anti-air pressure ability, increases reliability.
Preferably, the position of the corresponding MEMS chip functional areas of first surface of described cover plate forms a cavity 203, and described cavity is positioned at described bonded seal circle.Like this, by forming cavity on the surface at cover plate one, after this cavity bonding, cover on the top of the functional areas of MEMS chip, the device for MEMS chip functional areas provides working space and/or working environment.
Preferably, described bonded seal circle is identical with the material of bonding salient point, is metal material, and the height of described bonded seal circle is identical with the height of described bonding salient point.This metal material can single-layer metal, as copper; Can also be multiple layer metal, as the combination of at least two kinds of titanium, copper, nickel, gold, tin, silver, there is certain intensity.
Preferably, described bonded seal circle is annulus or fillet side's ring or the polygon ring of fillet or erose annular, and the width at sealing ring diverse location place is identical or different.
Preferably, described first distance range is 1 ~ 1000 μm; When forming single packaged chip to avoid wafer-level packaging cutting, cutting sealing circle, increases cutting burden, and stress etc.
Preferably, the width range of described external series gap is 10 ~ 50 μm, to avoid electrical communication.
Preferably, as shown in Figure 6, the second surface of described cover plate is formed with some grooves 205.Like this, by carving some grooves on the second surface of cover plate, when can alleviate cover plate and MEMS chip bonding, due to the cover plate stress that cavity causes, to cut down angularity, improve the bonding effect of cover plate and MEMS chip.And this some groove, welding stress when cover plate and circuit board (function substrate) bonding can also be alleviated, to improve the package reliability of MEMS chip.Some grooves of cover plate first surface, its shape of cross section type without particular/special requirement, its shape comprise in square, triangle, polygon, circle, ellipse, rhombus and irregular figure one or more.More excellent, the circumscribed circle diameter scope of described groove cross section shape is 2 ~ 5 μm; The degree of depth of described groove is 1 ~ 10 μm.The overall area occupied of some described grooves is greater than 1/3 of described lid surface area.Due to the One's name is legion of groove, the position in nonmetallic line and non-conduction hole can be distributed in, effectively to disperse cover plate upper stress.
Preferably, the material of cover plate is silicon materials, and thermal coefficient of expansion is low, good heat conduction effect, and processing procedure cost is low.
The wafer-level packaging method of the utility model embodiment MEMS chip, comprises the following steps:
A. provide the wafer that has some MEMS chip, the functional surfaces of described MEMS chip has functional areas and is positioned at some weld pads of functional areas periphery, and described weld pad and described functional areas are electrical connected, and as shown in Figure 2, have Cutting Road between adjacent MEMS chip;
B. see Fig. 3, Fig. 4 and Fig. 5, provide a cover plate, described cover plate has some unit of corresponding some MEMS chip, and each unit is manufactured with via, and described sidewalls and cover plate first surface and second surface are covered with insulating barrier; Surface of insulating layer is covered with metal wiring layer, and the first surface of cover plate is electrically caused second surface by described via by described metal wiring layer, and described via internal pore is by metal or polymer-filled;
The position of C. presetting sealing ring on each unit of cover plate forms a quoit identical with metal wiring layer material, has the gap that is greater than the Cutting Road of wafer between adjacent metal circle; Metal wiring layer on described via, described first surface is positioned at described quoit, and and have an external series gap between described quoit;
D. the position growing metal presetting micro convex point on the metal wiring layer of first surface forms micro convex point, and on quoit, growing metal forms sealing ring;
E., the micro convex point connecting portion of corresponding micro convex point and the sealing ring connecting portion of corresponding sealing ring are set respectively on wafer;
F. pass through the bonding of micro convex point and sealing ring and micro convex point connecting portion and sealing ring connecting portion, form bonding salient point and bonded seal circle, by described cover plate together with described wafer bonding.
G. cut cover plate and wafer, form single MEMS wafer class encapsulation structure.
Preferably, described micro convex point and described sealing ring are formed by electroplating or changing plating mode.
Preferably, the insulating barrier of cover plate second surface makes the first metallic circuit, first metallic circuit extends to bottom via from the second surface of cover plate, cover at the first metallic circuit and via inwall or fill protective layer, and the protective layer presetting the position of micro convex point at the first metallic circuit does opening; Do thinning at the back side of cover plate second surface, and the metallic circuit exposed bottom via, form first surface, insulating barrier is covered at first surface, the first metallic circuit bottom insulating layer exposing via, and making the second metallic circuit and sealing ring Seed Layer on the insulating layer, the second metallic circuit connects the first metallic circuit of insulating layer exposing; Long micro convex point on the second metallic circuit, simultaneously long sealing ring in sealing ring Seed Layer, this micro convex point and sealing ring have identical setting height.
To sum up, the utility model provides a kind of MEMS chip wafer level packaging structure and preparation method thereof, by the width of sealing ring is increased, add the Bonding area of sealing ring and MEMS chip and cover plate, thus strengthen cohesion, ensure that sealability, and improve anti-air pressure ability, add reliability.Preferably, the second surface of cover plate is carved with some grooves, when can alleviate cover plate and MEMS chip bonding, due to the cover plate stress that cavity causes, to cut down angularity, improves the bonding effect of cover plate and MEMS chip.And this some groove, welding stress when cover plate and circuit board (function substrate) bonding can also be alleviated, to improve the package reliability of MEMS chip.
Above embodiment is with reference to accompanying drawing, is described in detail to preferred embodiment of the present utility model.Novel wafer level MEMS wafer class encapsulation structure described in the utility model is applicable to the encapsulation of all MEMS chip.Those skilled in the art is by carrying out amendment on various forms or change to above-described embodiment; or applied to the encapsulating structure of different MEMS chip; but when not deviating from essence of the present utility model, all drop within protection domain of the present utility model.

Claims (8)

1. a MEMS chip encapsulating structure, is characterized in that: comprising:
MEMS chip (1), the functional surfaces of described MEMS chip has functional areas (101) and is positioned at some weld pads (102) of functional areas periphery, and described weld pad and functional areas are electrical connected; The functional surfaces of described MEMS chip is manufactured with micro convex point connecting portion (3) and sealing ring connecting portion (4), described micro convex point connecting portion and described weld pad are electrical connected;
Cover plate (2), described cover plate has first surface (201) and second surface corresponding thereto (202), described first surface is manufactured with micro convex point (5) and sealing ring (6), described cover plate, by the micro convex point connecting portion of described micro convex point and sealing ring and described MEMS chip correspondence position and sealing ring connecting portion bonding, forms bonding salient point (7) and bonded seal circle (8);
This bonded seal circle sealing ring is around the functional areas of described MEMS chip, and bonded seal circle outward flange extends and the edge of close described MEMS chip, and with the border one first of described MEMS chip distance (9), and described bonding salient point and described weld pad are embedded in described bonded seal circle, and and there is an external series gap (10) between described bonded seal circle.
2. MEMS chip encapsulating structure according to claim 1, is characterized in that: the position of the corresponding MEMS chip functional areas of first surface of described cover plate forms a cavity (203), and described cavity is positioned at described bonded seal circle.
3. MEMS chip encapsulating structure according to claim 1, is characterized in that: described bonded seal circle is identical with the material of bonding salient point, is metal material, and the height of described bonded seal circle is identical with the height of described bonding salient point.
4. MEMS chip encapsulating structure according to claim 1, is characterized in that: described bonded seal circle is annulus or fillet side's ring or the polygon ring of fillet or erose annular.
5. MEMS chip encapsulating structure according to claim 1, is characterized in that: described first distance range is 1 ~ 1000 μm.
6. MEMS chip encapsulating structure according to claim 1, is characterized in that: the width range of described external series gap is 10 ~ 50 μm.
7. MEMS chip encapsulating structure according to claim 1, is characterized in that: also comprise,
Via (204), through described cover plate;
Insulating barrier (11), is layed in first surface and the second surface of described sidewalls and cover plate;
Metal wiring layer (12), is layed on described insulating barrier, and connects by described via the pad that bonding micro convex point on described cover plate first surface and second surface preset soldered ball position;
Protective layer (13), on the metal wiring layer on the metal wiring layer being formed at described cover plate second surface and in described via; Described protective layer is formed with some weld parts (14) of the described metal wiring layer of electrical connection.
8. MEMS chip encapsulating structure according to claim 1, is characterized in that: the second surface of described cover plate is formed with some grooves (205).
CN201520906871.XU 2015-11-13 2015-11-13 MEMS chip package structure Expired - Fee Related CN205187842U (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105439073A (en) * 2015-11-13 2016-03-30 华天科技(昆山)电子有限公司 MEMS (Micro-Electro-Mechanical Systems) chip packaging structure and wafer level packaging method
CN105977235A (en) * 2016-06-30 2016-09-28 中国电子科技集团公司第十三研究所 Novel three-dimensional microwave multi-chip module structure
CN110132453A (en) * 2019-05-28 2019-08-16 无锡莱顿电子有限公司 A kind of pressure sensor bonding method
CN111298854A (en) * 2020-02-27 2020-06-19 西人马联合测控(泉州)科技有限公司 Chip forming method and wafer

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105439073A (en) * 2015-11-13 2016-03-30 华天科技(昆山)电子有限公司 MEMS (Micro-Electro-Mechanical Systems) chip packaging structure and wafer level packaging method
CN105439073B (en) * 2015-11-13 2017-10-24 华天科技(昆山)电子有限公司 MEMS chip encapsulating structure and wafer-level packaging method
CN105977235A (en) * 2016-06-30 2016-09-28 中国电子科技集团公司第十三研究所 Novel three-dimensional microwave multi-chip module structure
CN105977235B (en) * 2016-06-30 2019-04-09 中国电子科技集团公司第十三研究所 A kind of novel three-dimensional Microwave Multichip Module structure
CN110132453A (en) * 2019-05-28 2019-08-16 无锡莱顿电子有限公司 A kind of pressure sensor bonding method
CN111298854A (en) * 2020-02-27 2020-06-19 西人马联合测控(泉州)科技有限公司 Chip forming method and wafer
CN111298854B (en) * 2020-02-27 2021-08-06 西人马联合测控(泉州)科技有限公司 Chip forming method and wafer

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Granted publication date: 20160427

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