CN205050841U - Three -dimensional three -dimensional high density film lamination electric capacity - Google Patents
Three -dimensional three -dimensional high density film lamination electric capacity Download PDFInfo
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- CN205050841U CN205050841U CN201520732193.XU CN201520732193U CN205050841U CN 205050841 U CN205050841 U CN 205050841U CN 201520732193 U CN201520732193 U CN 201520732193U CN 205050841 U CN205050841 U CN 205050841U
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Abstract
The utility model discloses a three -dimensional three -dimensional high density film lamination electric capacity, including a substrate, insulating film, multilayer electric capacity functional layer film, insulating layer, insulating passivation layer, metallic interconnect layer, plate electrode, multilayer electric capacity functional layer film coats and is stamped an insulating passivation layer, and the plate electrode is connected with each current conducting plate film of condenser respectively. The utility model discloses a simple process, not needing many times, the photoetching can form multilayer electric capacity thin film device, unrestricted to the film number of piles, under the ideal state, as long as the condenser size enough greatly, the electric capacity functional layer film number of piles can be for arbitrary limited number, and the cost is not showing and increases, adjustable each film makes it have more at vertical spatial distribution, and low -capacitance ware size can greatly contract, the device is by the preparation of semiconductor films technology, environment tolerance, reliability height.
Description
Technical field
The utility model relates to a kind of three-dimensional capacitor, refers more particularly to a kind of 3 D stereo high-density film deposited capacitances.
Background technology
In prior art, the three-dimensional capacitance in US publication US6689643A has individual layer capacitive function film structure, and is formed by the form of groove.Three-dimensional capacitance adopts the form of formation one group of separate capacitors to realize, this group capacitor shares same bottom electrode, the region of the top electrodes of these separate capacitors is integral multiples of other electrode zones, and they can join together to manufacture the capacitor of various scope like this.
Have employed multi-layer film structure in addition in prior art, do not have the manufacture process of fluted three-dimensional capacitance.The aluminium of use high selectivity etch capabilities and ruthenium electrode are for the manufacture of plural layers electric capacity, and this can reduce the treatment step manufacturing thin-film multilayer electric capacity, and conductive layer is deposited by the mode of chemical vapour deposition (CVD), and metal level passes through sputtering sedimentation.This process be that a little first all layers deposit, this process can be easy to transfer to triangular web or bunch instrument to deposit all layers, and this can reduce the probability of defect or environmental pollution.Owing to can be manufactured by multiple deposition process, and can be formed in two or three-dimensional substrate on, the versatility of this process thinks that this multi-layer capacity for future integrated is one and well selects.
In addition, Chinese patent CN103348443A discloses a kind of density three-dimensional integrated capacitor, this capacitor comprises four layers of conductive plate, respectively at the first and second electrodes that isolated primary importance and the second place expose, the third electrode exposed in isolated 3rd position and the 4th position respectively and the 4th electrode.Can find out, this three-dimensional integrated point easily adopts multilayer film to add the mode of groove, but this integrated some container complex process, need repeatedly photoetching can form multi-layer capacity film device.
Utility model content
The purpose of this utility model is the three-dimensional high-density capacitance structure providing the features such as a kind of size is little, structure is simple, capacitance density is large.
A kind of 3 D stereo high-density film lamination electric capacity, comprises a substrate, insulation film, multi-layer capacity functional layer film, insulating barrier, insulating passivation layer, metal connecting layer, battery lead plate;
The upper surface of described substrate is etched with conical pit, and longitudinal extension expands the surface of described substrate, and the upper surface of described conical pit deposits described insulation film; Have described multi-layer capacity functional layer film at the disposed thereon of described insulation film, described multi-layer capacity functional layer film by the conductive plate film of multilayer and dielectric layer film from bottom to top successively superposition form; Described insulating barrier is had, in the multi-layer capacity functional layer film that described insulating passivation layer exposes after being deposited on and making surface of insulating layer planarization by chemical grinding technique at the disposed thereon of described multi-layer capacity function film;
Described metal connecting layer is deposited on the conductive plate film that the perforate after chemical wet etching of described insulating passivation layer exposes, and described battery lead plate is connected with described conductive plate film; Described battery lead plate is cross-linked described metal connecting layer.
Preferably, described dielectric layer thin film deposition is in described conductive plate film gap, and adjacent conductive plate film and middle dielectric layer film form capacitor.
Preferably, described substrate material is semi-conducting material.
Preferably, described substrate material is silicon.
Preferably, described substrate material is glass or pottery.
Preferably, along with the degree of depth D of described conical pit increases, the surface area of described conductive plate film increases.
Preferably, the slope of described conical pit is θ with cone end horizontal surface angle, and along with the reduction of θ, described conductive plate film exposure size L in the horizontal direction increases.
Compared with other class three-dimensional capacitors, advantage of the present utility model is that technique is simple, does not need repeatedly photoetching can form multi-layer capacity film device; Unrestricted to the film number of plies, ideally, as long as capacitor sizes is enough large, the capacitive function layer film number of plies can be arbitrary finite number, and cost does not significantly increase; Adjustable each film makes them many in longitudinal space distribution, greatly can reduce capacitor sizes; Device is made by SEMICONDUCTING THIN FILM TECHNOLOGY, and environmental resistance, reliability are high.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the utility model embodiment technology, be briefly described to the accompanying drawing used required in the description of embodiment technology below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the sectional view of the utility model components and parts;
Fig. 2 is each scale diagrams of substrate surface conical pit;
Fig. 3 is cylinder type 3 D stereo capacity cell schematic diagram of the present utility model;
Fig. 4 is side's body 3 D stereo capacity cell schematic diagram of the present utility model.
Embodiment
Below with reference to the accompanying drawings and in conjunction with the embodiments, describe the utility model in detail.
The utility model provides a kind of 3 D stereo high-density film lamination electric capacity, comprises a substrate, insulation film, multi-layer capacity functional layer film, insulating barrier, insulating passivation layer, metal connecting layer, battery lead plate.Described multi-layer capacity functional layer film is coated with an insulating passivation layer, and described battery lead plate respectively conductive plate film each with capacitor is connected.
As shown in Figure 1, described substrate 10 upper surface is etched with conical pit, and longitudinal extension expands substrate surface.Conical pit upper surface deposits insulation film 20.Multi-layer capacity functional layer film is had at described insulation film 20 disposed thereon, described multi-layer capacity functional layer film comprises conductive plate film and dielectric layer film, wherein conductive plate film is 30a, 30b, 30c, 30d ... dielectric layer film 40a is had at conductive plate film gap deposition, 40b, 40c ...Wherein conductive plate film 30a, 30b and dielectric layer film 40a form the first capacitor, and by that analogy, other conductive plate films and dielectric layer film form second, third respectively ... in other capacitors.
There is insulating barrier 50 at described multi-layer capacity functional layer film disposed thereon, make surface planarisation by chemical grinding technique (CMP) and after exposing multi-layer capacity functional layer film, then deposit insulating passivation layer 60.
Correspond to underlying conductive plate film position place at described insulating passivation layer 60 and etch through hole, and plated metal articulamentum 70.Finally make electric pole plate 80 to be connected with each conductive plate film.Battery lead plate 80 can be cross-linked metal connecting layer 70, thus the connection in series-parallel realized between each capacitor layers connects.Be connected in parallel the total capacitance that can improve device, be connected in series the voltage withstand class that can improve device.
As shown in Figure 2, each critical size of substrate surface conical pit is: degree of depth D, slope and cone end horizontal surface angle theta, perforate size (not marking in the drawings) etc. on conical pit.Wherein perforate size is determined by photoetching process, and D and θ is determined by etching technics.The silicon chip being (111) face as effects on surface carries out potassium hydroxide etching, and it is 54.7 ° that θ is typically worth.
Large etching depth D, can increase the surface area of capacitor conductive plate; Little angle theta can increase conductive plate exposure size L in the horizontal direction thus increase process tolerance.By the object regulating the thickness of D, θ and multi-layer capacity functional layer film just can reach regulating capacitor various performance parameters.
The utility model is to the profile no requirement (NR) of device, as long as cross section is taper, and has certain gradient.Its profile (vertical view) can be the arbitrary shapes such as circle, square, polygon; Fig. 3 is cylinder type 3 D stereo capacity cell schematic diagram, and Fig. 4 side of being body 3 D stereo capacity cell schematic diagram.
The preparation method of a kind of 3 D stereo high-density film lamination electric capacity of the present utility model, comprises the following steps:
S1. surface cleaning is carried out to described substrate;
S2. described substrate is formed conical pit by wet method or dry etch process;
S3. on the substrate etched, described insulation film, multi-layer capacity functional layer film is deposited successively;
S4. at described multi-layer capacity functional layer film disposed thereon one layer insulating, then carry out chemical grinding and make surface planarisation and expose multi-layer capacity functional layer film;
S5. the multi-layer capacity functional layer film disposed thereon one deck insulating passivation layer exposed, plated metal articulamentum after underlying conductive plate film is exposed in chemical wet etching perforate;
S6. at described metal connecting layer place growth electrode.
In step s3, by conductive plate film and the dielectric layer film multi-layer capacity of superposition formation successively functional layer film from below to up, described dielectric layer thin film deposition is in described conductive plate film gap, and adjacent conductive plate film and middle dielectric layer film form capacitor.
The degree of depth of described conical pit is D, and the slope of described conical pit is θ with cone end horizontal surface angle, and described D and θ is regulated by etching technics.
The perforate size of described conical pit is determined by photoetching process.
Described electrode Ke Yonghou road ball bonding connects or directly paster encapsulation.
The foregoing is only preferred embodiment of the present utility model, be not limited to the utility model, for a person skilled in the art, the utility model can have various modifications and variations.All within spirit of the present utility model and principle, any amendment done, equivalent replacement, improvement etc., all should be included within protection range of the present utility model.
Claims (7)
1. a 3 D stereo high-density film lamination electric capacity, is characterized in that: comprise a substrate, insulation film, multi-layer capacity functional layer film, insulating barrier, insulating passivation layer, metal connecting layer, battery lead plate;
The upper surface of described substrate is etched with conical pit, and longitudinal extension expands the surface of described substrate, and the upper surface of described conical pit deposits described insulation film; Have described multi-layer capacity functional layer film at the disposed thereon of described insulation film, described multi-layer capacity functional layer film by the conductive plate film of multilayer and dielectric layer film from bottom to top successively superposition form; Described insulating barrier is had, in the multi-layer capacity functional layer film that described insulating passivation layer exposes after being deposited on and making surface of insulating layer planarization by chemical grinding technique at the disposed thereon of described multi-layer capacity function film;
Described metal connecting layer is deposited on the conductive plate film that the perforate after chemical wet etching of described insulating passivation layer exposes, and described battery lead plate is connected with described conductive plate film; Described battery lead plate is cross-linked described metal connecting layer.
2. a kind of 3 D stereo high-density film lamination electric capacity according to claim 1, is characterized in that, described dielectric layer thin film deposition is in described conductive plate film gap, and adjacent conductive plate film and middle dielectric layer film form capacitor.
3. a kind of 3 D stereo high-density film lamination electric capacity according to claim 1, it is characterized in that, described substrate material is semi-conducting material.
4. a kind of 3 D stereo high-density film lamination electric capacity according to claim 3, it is characterized in that, described substrate material is silicon.
5. a kind of 3 D stereo high-density film lamination electric capacity according to claim 1, it is characterized in that, described substrate material is glass or pottery.
6. a kind of 3 D stereo high-density film lamination electric capacity according to claim 1, is characterized in that, along with the degree of depth D of described conical pit increases, the surface area of described conductive plate film increases.
7. a kind of 3 D stereo high-density film lamination electric capacity according to claim 1, is characterized in that, the slope of described conical pit is θ with cone end horizontal surface angle, and along with the reduction of θ, described conductive plate film exposure size L in the horizontal direction increases.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201520732193.XU CN205050841U (en) | 2015-09-21 | 2015-09-21 | Three -dimensional three -dimensional high density film lamination electric capacity |
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| CN201520732193.XU CN205050841U (en) | 2015-09-21 | 2015-09-21 | Three -dimensional three -dimensional high density film lamination electric capacity |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105118869A (en) * | 2015-09-21 | 2015-12-02 | 江苏多维科技有限公司 | Three-dimensional stereo high-density film multi-layer capacitor and preparation method thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105118869A (en) * | 2015-09-21 | 2015-12-02 | 江苏多维科技有限公司 | Three-dimensional stereo high-density film multi-layer capacitor and preparation method thereof |
| CN105118869B (en) * | 2015-09-21 | 2018-10-16 | 江苏多维科技有限公司 | A kind of 3 D stereo high-density film lamination capacitance and preparation method thereof |
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