CN204967774U - Sinusoidal drive signal source - Google Patents

Sinusoidal drive signal source Download PDF

Info

Publication number
CN204967774U
CN204967774U CN201520658496.1U CN201520658496U CN204967774U CN 204967774 U CN204967774 U CN 204967774U CN 201520658496 U CN201520658496 U CN 201520658496U CN 204967774 U CN204967774 U CN 204967774U
Authority
CN
China
Prior art keywords
pin
chip
model
dds
signal source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201520658496.1U
Other languages
Chinese (zh)
Inventor
周岩
孙爱鸣
张俊波
谢俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nanjing Post and Telecommunication University
Nanjing University of Posts and Telecommunications
Original Assignee
Nanjing Post and Telecommunication University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanjing Post and Telecommunication University filed Critical Nanjing Post and Telecommunication University
Priority to CN201520658496.1U priority Critical patent/CN204967774U/en
Application granted granted Critical
Publication of CN204967774U publication Critical patent/CN204967774U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)

Abstract

The utility model discloses a sinusoidal drive signal source, include that the model is STC89C52's singlechip, the model is AD9834's DDS chip, the crystal oscillator that the model is AD5620's DAC chip, first resistance, second resistance, 75MHz, wherein, the 42nd foot of singlechip, 43 feet, 44 feet are connected with the 7th foot, 6 feet, 5 feet of DAC chip respectively, the 35th foot of singlechip, 36 feet, 37 feet are connected with the 15th foot, 14 feet, 13 feet of DDS chip respectively, 75MHz's crystal oscillator and the 8th foot of DDS chip are connected, the one end of first resistance and the 1st foot of DDS chip are connected, and the 4th foot of the other end and DAC chip is connected, the one end of second resistance and the 19th foot of DDS chip are connected, other end ground connection. The utility model discloses a combination of singlechip, DAC chip, DDS chip, frequency, amplitude adjustable of realizing sinusoidal drive signal.

Description

A kind of sinusoidal excitation signal source
Technical field
The utility model relates to a kind of sinusoidal excitation signal source.
Background technology
There is the problems such as the sine signal source operating frequency produced is not high, resolution is lower, the accuracy of waveform of output is poor in the signal source generating means of traditional discrete device composition.And the wave form output adopting direct digital signal synthesizing (DDS) technology to produce has the plurality of advantages such as wider frequency range, relatively high precision, the less distortion factor, faster conversion speed.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of sinusoidal excitation signal source, by the combination of single-chip microcomputer, DAC chip, DDS chip, realizes the frequency of sinusoidal excitation signal, the adjustable of amplitude.
The utility model is for solving the problems of the technologies described above by the following technical solutions:
The utility model provides a kind of sinusoidal excitation signal source, comprise single-chip microcomputer that model is STC89C52, the crystal oscillator of DAC chip that DDS chip that model is AD9834, model are AD5620, the first resistance, the second resistance, 75MHz, wherein, the 42nd pin of single-chip microcomputer, 43 pin, 44 pin are connected with the 7th pin of DAC chip, 6 pin, 5 pin respectively; 35th pin of single-chip microcomputer, 36 pin, 37 pin are connected with the 15th pin of DDS chip, 14 pin, 13 pin respectively; The crystal oscillator of 75MHz is connected with the 8th pin of DDS chip; One end of first resistance is connected with the 1st pin of DDS chip, and the other end is connected with the 4th pin of DAC chip; One end of second resistance is connected with the 19th pin of DDS chip, other end ground connection.
As further prioritization scheme of the present utility model, the 5th pin of single-chip microcomputer, 7 pin are connected with host computer, for communicating with host computer.
As further prioritization scheme of the present utility model, single-chip microcomputer is connected with DAC chip by three-wire system SPI serial ports.
As further prioritization scheme of the present utility model, single-chip microcomputer is connected with DDS chip by three-wire system SPI serial ports.
As further prioritization scheme of the present utility model, the 38th pin of single-chip microcomputer connects+5V power supply.
The utility model adopts above technical scheme compared with prior art, adopt the technical solution of the utility model, the all continuously adjustable sinusoidal excitation signal of frequency, amplitude can be obtained, the output of signal have wider frequency range, higher precision, the less distortion factor, etc. plurality of advantages.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model.
Embodiment
Be described below in detail execution mode of the present utility model, the example of described execution mode is shown in the drawings, and wherein same or similar label represents same or similar element or has element that is identical or similar functions from start to finish.Being exemplary below by the execution mode be described with reference to the drawings, only for explaining the utility model, and can not being interpreted as restriction of the present utility model.
Those skilled in the art of the present technique are understandable that, the correlation module related in the utility model and the function of realization thereof are the devices of hardware after improvement and formation thereof, device or system carry computer software programs conventional in prior art or pertinent protocols just can realize, and are not improve computer software programs of the prior art or pertinent protocols.Such as, the computer hardware system after improvement still can realize the specific function of this hardware system by loading existing operation system of software.Therefore, be understandable that, innovation of the present utility model is the improvement of hardware module in prior art and connects syntagmatic, but not be only in hardware module for realizing the improvement of software or the agreement of carrying about function.
Those skilled in the art of the present technique are understandable that, the correlation module mentioned in the utility model is the one or more hardware device for performing in step in operation, method, flow process described in the application, measure, scheme.Described hardware device for required object and specialized designs and manufacture, or also can adopt the known device in all-purpose computer or other known hardware devices.Described all-purpose computer activates or reconstructs with having storage procedure Selection within it.
Those skilled in the art of the present technique are appreciated that unless expressly stated, and singulative used herein " ", " one ", " described " and " being somebody's turn to do " also can comprise plural form.Should be further understood that, the wording used in specification of the present utility model " comprises " and refers to there is described feature, integer, step, operation, element and/or assembly, but does not get rid of and exist or add other features one or more, integer, step, operation, element, assembly and/or their group.Should be appreciated that, when we claim element to be " connected " or " coupling " to another element time, it can be directly connected or coupled to other elements, or also can there is intermediary element.In addition, " connection " used herein or " coupling " can comprise wireless connections or couple.Wording "and/or" used herein comprises one or more arbitrary unit listing item be associated and all combinations.
Those skilled in the art of the present technique are appreciated that unless otherwise defined, and all terms used herein (comprising technical term and scientific terminology) have the meaning identical with the general understanding of the those of ordinary skill in field belonging to the utility model.Should also be understood that those terms defined in such as general dictionary should be understood to have the meaning consistent with the meaning in the context of prior art, unless and define as here, can not explain by idealized or too formal implication.
Below in conjunction with accompanying drawing, the technical solution of the utility model is described in further detail:
The utility model provides a kind of sinusoidal excitation signal source, as shown in Figure 1, comprise single-chip microcomputer that model is STC89C52, the crystal oscillator of DAC chip that DDS chip that model is AD9834, model are AD5620, the first resistance Rset, second resistance R, 75MHz, wherein, the 42nd pin of single-chip microcomputer, 43 pin, 44 pin are connected with the 7th pin of DAC chip, 6 pin, 5 pin respectively; 35th pin of single-chip microcomputer, 36 pin, 37 pin are connected with the 15th pin of DDS chip, 14 pin, 13 pin respectively; The crystal oscillator of 75MHz is connected with the 8th pin of DDS chip; One end of first resistance Rset is connected with the 1st pin of DDS chip, and the other end is connected with the 4th pin of DAC chip; One end of second resistance R is connected with the 19th pin of DDS chip, other end ground connection.
Further, the 5th pin of single-chip microcomputer, 7 pin are connected with host computer, for communicating with host computer.User can by the combination control DDS of host computer and single-chip microcomputer and DAC chip, to obtain with the frequency of certain direct current biasing, amplitude is adjustable sine wave, therefore amplifies and DC-offset correction by subsequent process circuit.
Single-chip microcomputer adopts three-wire system SPI serial ports to be connected with AD9834 and AD5620.Single-chip microcomputer write control word controls output frequency and type of waveform, can obtain the sine wave that output frequency is adjustable.Wherein the phase accumulator figure place N of AD9834 inside is 28, and external reference clock signal fmclk is 75MHz.Phase accumulator Y is not generally integer, is an approximation in most cases.The sine wave that frequency is 30kHz as obtained, the value of phase accumulator Y is approximately 107374, and hexadecimal number is 0X1A36E.Because frequency register is 28 bit wides, LSB and MSB of write frequency register 0 can be replaced.After AD9834 control register write control word, output pin IOUT(the 19th pin) sine wave signal of just exportable 30kHz.In theory, the sine wave freuqency resolution that AD9834 exports can reach 0.28Hz.AD5620 is that one 12 single pass low-power consumption export DAC chip, the reference voltage of its built-in 1.25V.Single-chip microcomputer STC89C52 connects AD5620 by three-wire system serial ports, produces control information and controls its generation output voltage VDAC.The output voltage VDAC of AD5620 is input in AD9834 by FSADJUST port, and the amplitude realizing sine wave output shape is adjustable.
The above; be only the embodiment in the utility model; but protection range of the present utility model is not limited thereto; any people being familiar with this technology is in the technical scope disclosed by the utility model; the conversion or replacement expected can be understood; all should be encompassed in and of the present utility modelly comprise within scope, therefore, protection range of the present utility model should be as the criterion with the protection range of claims.

Claims (5)

1. a sinusoidal excitation signal source, it is characterized in that, comprise single-chip microcomputer that model is STC89C52, the crystal oscillator of DAC chip that DDS chip that model is AD9834, model are AD5620, the first resistance, the second resistance, 75MHz, wherein, the 42nd pin of single-chip microcomputer, 43 pin, 44 pin are connected with the 7th pin of DAC chip, 6 pin, 5 pin respectively; 35th pin of single-chip microcomputer, 36 pin, 37 pin are connected with the 15th pin of DDS chip, 14 pin, 13 pin respectively; The crystal oscillator of 75MHz is connected with the 8th pin of DDS chip; One end of first resistance is connected with the 1st pin of DDS chip, and the other end is connected with the 4th pin of DAC chip; One end of second resistance is connected with the 19th pin of DDS chip, other end ground connection.
2. a kind of sinusoidal excitation signal source according to claim 1, is characterized in that, the 5th pin of single-chip microcomputer, 7 pin are connected with host computer, for communicating with host computer.
3. a kind of sinusoidal excitation signal source according to claim 1, is characterized in that, single-chip microcomputer is connected with DAC chip by three-wire system SPI serial ports.
4. a kind of sinusoidal excitation signal source according to claim 1, is characterized in that, single-chip microcomputer is connected with DDS chip by three-wire system SPI serial ports.
5. a kind of sinusoidal excitation signal source according to claim 1, is characterized in that, the 38th pin of single-chip microcomputer connects+5V power supply.
CN201520658496.1U 2015-08-28 2015-08-28 Sinusoidal drive signal source Expired - Fee Related CN204967774U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520658496.1U CN204967774U (en) 2015-08-28 2015-08-28 Sinusoidal drive signal source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520658496.1U CN204967774U (en) 2015-08-28 2015-08-28 Sinusoidal drive signal source

Publications (1)

Publication Number Publication Date
CN204967774U true CN204967774U (en) 2016-01-13

Family

ID=55062811

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201520658496.1U Expired - Fee Related CN204967774U (en) 2015-08-28 2015-08-28 Sinusoidal drive signal source

Country Status (1)

Country Link
CN (1) CN204967774U (en)

Similar Documents

Publication Publication Date Title
Maier et al. Comparative analysis and practical implementation of the ESP32 microcontroller module for the internet of things
CN103645665B (en) A kind of programmable signal generator and signal generating method thereof
CN108983640B (en) Electric linear steering engine control system and method based on LabVIEW
CN203117688U (en) Multifunctional signal generator based on ARM and DDS technologies
CN202026300U (en) Direct digital synthesizer and synchronous phase discrimination circuit device for direct digital synthesizer
CN204967774U (en) Sinusoidal drive signal source
CN206922765U (en) Touch order vectors modulation signal generator
CN202872763U (en) Wireless remote control encoding chip and application circuit thereof
CN109739122A (en) A kind of half wave excitation fast lock phase method
CN105511353A (en) Low-frequency signal generator and signal debugging method
CN203117727U (en) Multifunctional controller
CN206524751U (en) A kind of high-frequency digital Switching Power Supply based on FPGA
CN205121246U (en) FPGA -based DDS signal generator
CN204993279U (en) Waveform generator
CN204270071U (en) A kind of any wave generator based on cpld
CN115047798B (en) High-precision frequency signal source
CN203327029U (en) Rotary voltage transformation signal conversion equipment applied to inertial navigation system
CN104238404B (en) Modular Industry Control board
CN203632687U (en) Switching circuit for communication encryption
Sharp et al. Comparative analysis and practical implementation of the ESP32 microcontroller module for the Internet of Things
CN203457124U (en) Low-frequency function signal generator
CN104104363A (en) Function signal generator
Shi et al. Design and implementation of signal generator based on AD9850
CN209896433U (en) Butterfly laser drive circuit
CN202003209U (en) Digital power-supply control system based on FPGA (Field-Programmable Gate Array)

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
EE01 Entry into force of recordation of patent licensing contract

Assignee: Jiangsu Nanyou IOT Technology Park Ltd.

Assignor: Nanjing Post & Telecommunication Univ.

Contract record no.: 2016320000221

Denomination of utility model: Sinusoidal drive signal source

Granted publication date: 20160113

License type: Common License

Record date: 20161129

LICC Enforcement, change and cancellation of record of contracts on the licence for exploitation of a patent or utility model
EC01 Cancellation of recordation of patent licensing contract

Assignee: Jiangsu Nanyou IOT Technology Park Ltd.

Assignor: Nanjing Post & Telecommunication Univ.

Contract record no.: 2016320000221

Date of cancellation: 20180116

EC01 Cancellation of recordation of patent licensing contract
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160113

Termination date: 20180828

CF01 Termination of patent right due to non-payment of annual fee