CN204927243U - Gallium nitride heterojunction field effect transistor - Google Patents
Gallium nitride heterojunction field effect transistor Download PDFInfo
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- CN204927243U CN204927243U CN201520678062.8U CN201520678062U CN204927243U CN 204927243 U CN204927243 U CN 204927243U CN 201520678062 U CN201520678062 U CN 201520678062U CN 204927243 U CN204927243 U CN 204927243U
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- gallium nitride
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- heterojunction field
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- nitride heterojunction
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Abstract
The utility model is suitable for an electronic components field provides a gallium nitride heterojunction field effect transistor, include: a substrate. The dielectric layer sets up on the substrate, the grid sets up on the dielectric layer, and stress liner thin layer, the parcel is in the outside of grid. The utility model discloses can effectively improve gallium nitride heterojunction field effect transistor's electricity performance, thereby effective control threshold voltage or move threshold voltage to the positive direction and realize enhancement mode gallium nitride device promptly reduces the parasitic resistance of device simultaneously.
Description
Technical field
The utility model relates to electronic devices and components field, particularly relates to a kind of gallium nitride heterojunction field-effect transistor.
Background technology
The advantages of third generation wide bandgap semiconductor gallium nitride (GaN) material, as large in energy gap, breakdown electric field is high, thermal conductivity is high, electron mobility is high, dielectric constant is little, native electronic is low, high temperature resistant and capability of resistance to radiation strong, thus can be widely used in the fields such as automotive electronics, Aero-Space, communication, electric power.Usual gallium nitride device is the HFET formed based on aluminum-gallium-nitrogen/gallium nitride heterojunction, by the power electric component as key, is applied in power electronics conversion system.
But the unstable and problem that cannot be effectively controlled of current HFET ubiquity threshold voltage, the dead resistance of this transistor device is higher causes easy consumption power simultaneously.
Therefore, a kind of novel HFET of exploitation is needed badly effectively to control threshold voltage and to reduce the dead resistance of device.
Utility model content
In view of this, the object of the utility model embodiment is to provide a kind of gallium nitride heterojunction field-effect transistor and forming method thereof, is intended to solve in prior art the problem that effectively cannot control threshold voltage and the higher problem of dead resistance.
The utility model embodiment is achieved in that a kind of gallium nitride heterojunction field-effect transistor, comprising:
Substrate;
Dielectric layer, is arranged on described substrate;
Grid, is arranged on described dielectric layer; And
Stress liner thin layer, is wrapped in the outside of described grid.
Preferably, the material of described dielectric layer comprises gallium nitride, the material of described stress liner film comprise in silicon nitride, oxide, diamond-like materials one or more.
Preferably, described gallium nitride heterojunction field-effect transistor also comprises:
Source electrode and drain electrode;
Wherein, introduce compression stress at the raceway groove of described grid, pulling force is introduced in the region between described grid and described source electrode or described drain electrode.
Preferably, the size of described compression stress is 400-600MPa, and the size of described pulling force is 200-300MPa.
Preferably, described stress liner thin layer is wrapped in the outside of described grid and jointly forms convex shape, and described dielectric layer overlaps in described substrate.
The utility model by introducing stress liner structure in the structure of gallium nitride heterojunction field-effect transistor, compression stress is introduced at grid groove, pulling force is introduced in region between grid and source/drain, by the piezoelectric effect of gallium nitride material itself, effective control threshold voltage or threshold voltage is moved to positive direction thus realizes enhancement type gallium nitride device, reduces the dead resistance of device simultaneously.
Accompanying drawing explanation
Fig. 1 is the formation method flow diagram of gallium nitride heterojunction field-effect transistor in the utility model one execution mode;
Fig. 2 is gallium nitride heterojunction field-effect transistor structure schematic diagram in the utility model one execution mode;
Fig. 3 makes stress liner film to form the exemplary plot of gallium nitride heterojunction field-effect transistor by diamond-like materials in the utility model one execution mode;
Fig. 4 (a) is for there being and not having the transfer characteristic curve figure of gallium nitride heterojunction field-effect transistor of stress liner in the utility model one execution mode;
Fig. 4 (b) is for there being and not having the output characteristic curve figure of gallium nitride heterojunction field-effect transistor of stress liner in the utility model one execution mode;
Fig. 4 (c) is for there being and not having the dead resistance curve chart of gallium nitride heterojunction field-effect transistor of stress liner in the utility model one execution mode; And
Fig. 4 (d) is for there being and not having the mutual conductance peak curve figure of gallium nitride heterojunction field-effect transistor of stress liner in the utility model one execution mode.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
The utility model embodiment provides a kind of formation method of gallium nitride heterojunction field-effect transistor, mainly comprises the steps:
S11, formation substrate;
S12, form dielectric layer in described substrate;
S13, on described dielectric layer, form grid;
S14, be wrapped in stress liner film in the outside of described grid.
The formation method of a kind of gallium nitride heterojunction field-effect transistor provided by the utility model, by introducing stress liner structure in the structure of gallium nitride heterojunction field-effect transistor, compression stress is introduced at grid groove, pulling force is introduced in region between grid and source/drain, by the piezoelectric effect of gallium nitride material itself, effective control threshold voltage or threshold voltage is moved to positive direction thus realizes enhancement type gallium nitride device, reduces the dead resistance of device simultaneously.
Be described in detail to the formation method of a kind of gallium nitride heterojunction field-effect transistor provided by the utility model below.
Referring to Fig. 1, is the formation method flow diagram of gallium nitride heterojunction field-effect transistor in the utility model one execution mode.
In step s 11, substrate is formed.
In the present embodiment, this substrate is mainly formed by semi-conducting material.
In step s 12, dielectric layer is formed in described substrate.
In the present embodiment, described dielectric layer overlaps in described substrate, and also namely dielectric layer overlaps completely with substrate.In the present embodiment, the material of described dielectric layer comprises gallium nitride.
In step s 13, described dielectric layer forms grid.
In the present embodiment, described on described dielectric layer, form the step S13 of grid after, described formation method also comprises:
Compression stress is introduced at grid groove;
Pulling force is introduced at grid and source electrode or the region between draining.
In the present embodiment, the size of described compression stress is 400-600MPa, and the size of described pulling force is 200-300MPa.
In the present embodiment, grid groove introduces the carrier concentration that effectively can reduce grid groove of compression stress, realize threshold voltage to move to positive direction, region between grid and source electrode (or drain electrode) is introduced pulling force and can be improved carrier concentration, and then reduces the dead resistance of device.
In step S14, be wrapped in stress liner film in the outside of described grid.
In the present embodiment, described stress liner thin layer is wrapped in the outside of described grid and jointly forms convex shape, the material of described stress liner film comprise in silicon nitride, oxide, diamond-like materials one or more.
In the present embodiment, the step S14 that the described outside at described grid is wrapped in stress liner film specifically comprises:
Utilize atomic layer deposition method, magnetron sputtering method, plasma enhanced chemical vapor deposition method or filtered cathodic vacuum arc method, deposit one deck stress liner film at the outer surface of described grid.
The formation method of a kind of gallium nitride heterojunction field-effect transistor provided by the utility model, by introducing stress liner structure in the structure of gallium nitride heterojunction field-effect transistor, compression stress is introduced at grid groove, pulling force is introduced in region between grid and source/drain, by the piezoelectric effect of gallium nitride material itself, effective control threshold voltage or threshold voltage is moved to positive direction thus realizes enhancement type gallium nitride device, reduces the dead resistance of device simultaneously.
The utility model embodiment also provides a kind of gallium nitride heterojunction field-effect transistor, mainly comprises:
Substrate;
Dielectric layer, is arranged on described substrate;
Grid, is arranged on described dielectric layer; And
Stress liner thin layer, is wrapped in the outside of described grid.
A kind of gallium nitride heterojunction field-effect transistor provided by the utility model, by introducing stress liner structure in the structure of gallium nitride heterojunction field-effect transistor, compression stress is introduced at grid groove, pulling force is introduced in region between grid and source/drain, by the piezoelectric effect of gallium nitride material itself, effective control threshold voltage or threshold voltage is moved to positive direction thus realizes enhancement type gallium nitride device, reduces the dead resistance of device simultaneously.
Refer to Fig. 2, be depicted as the structural representation of gallium nitride heterojunction field-effect transistor in the utility model one execution mode.
In the present embodiment, gallium nitride heterojunction field-effect transistor comprises substrate, dielectric layer, grid, stress liner thin layer, source electrode and drain electrode.
In the present embodiment, dielectric layer is arranged on described substrate, and preferably, described dielectric layer overlaps in described substrate, and also namely dielectric layer overlaps completely with substrate.In the present embodiment, the material of described dielectric layer comprises gallium nitride and compound thereof, comprises two-layer as shown in Figure 2, and namely one deck is gallium nitride, and another layer is the compound of gallium nitride.
Grid, is arranged on described dielectric layer.
In the present embodiment, introduce compression stress at the raceway groove of described grid, pulling force is introduced in the region between described grid and described source electrode or described drain electrode.In the present embodiment, the size of described compression stress is 400-600MPa, and the size of described pulling force is 200-300MPa.
In the present embodiment, grid groove introduces the carrier concentration that effectively can reduce grid groove of compression stress, realize threshold voltage to move to positive direction, region between grid and source electrode (or drain electrode) is introduced pulling force and can be improved carrier concentration, and then reduces the dead resistance of device.
Stress liner thin layer, is wrapped in the outside of described grid.
In the present embodiment, the material of described stress liner film comprises one or more in silicon nitride, oxide, diamond-like materials.
In the present embodiment, described stress liner thin layer is wrapped in the outside of described grid and jointly forms convex shape, and described dielectric layer overlaps in described substrate.
In the present embodiment, be wrapped in stress liner film in the outside of described grid specifically to comprise:
Utilize atomic layer deposition method, magnetron sputtering method, plasma enhanced chemical vapor deposition method or filtered cathodic vacuum arc method, deposit one deck stress liner film at the outer surface of described grid.
Below using diamond-like materials as the raw material making stress liner film for example is described, as shown in Figure 3.
Refer to Fig. 3, be depicted as in the utility model one execution mode and make stress liner film to form the exemplary plot of gallium nitride heterojunction field-effect transistor by diamond-like materials.
As shown in Figure 3, stress liner film is made to form gallium nitride heterojunction field-effect transistor by diamond-like materials.The compression stress of diamond like carbon stress liner own is in the scope of 1-2GPa, by coating technique (such as filtered cathodic vacuum arc) in surface deposition a layer thickness of device in the even diamond like carbon film of 30-50nm, and and material below diamond like carbon film have good adhesiveness.Due to, there is the diamond like carbon film of compression stress at 1-2GPa own, can lattice power transmission be passed through, compression stress be passed to the raceway groove below grid, so just greatly reduce carrier concentration herein, realize threshold voltage and move to positive direction thus realize enhancement type gallium nitride device.Due to the reciprocity of power, diamond like carbon film can introduce pulling force between grid and source and drain, improves carrier concentration, effectively can reduce the dead resistance of device.As shown in Figure 3, diamond like carbon film can introduce the compression stress of 400-600MPa at grid groove, introduce the pulling force of 200-300MPa, due to the effect of diamond like carbon stress liner beyond grid, the analog result of introduction means compression stress/pulling force, grid size is 100nm.
Refer to Fig. 4 (a), be depicted as in the utility model one execution mode the transfer characteristic curve figure of the gallium nitride heterojunction field-effect transistor having and do not have stress liner.
As shown in Fig. 4 (a), compare with there is no the gallium nitride heterojunction field-effect transistor of stress liner, the forward that the gallium nitride heterojunction field-effect transistor with stress liner can realize threshold voltage moves 1 volt, brings up to 120mS/mm at the mutual conductance peak values of 5 volts of drain electrodes from 86mS/mm.
Refer to Fig. 4 (b), be depicted as in the utility model one execution mode the output characteristic curve figure of the gallium nitride heterojunction field-effect transistor having and do not have stress liner.
As shown in Fig. 4 (b), and do not have the gallium nitride heterojunction field-effect transistor of stress liner to compare, the gallium nitride heterojunction field-effect transistor output current with stress liner improves 22% under same bias condition.
Refer to Fig. 4 (c), be depicted as in the utility model one execution mode the dead resistance curve chart of the gallium nitride heterojunction field-effect transistor having and do not have stress liner.
As shown in Fig. 4 (c), compare with there is no the gallium nitride heterojunction field-effect transistor of stress liner, the gallium nitride heterojunction field-effect transistor with stress liner can realize dead resistance and reduce by 14%, along with the further reduction of grid size, the electric property of device can be more superior.
Refer to Fig. 4 (d), be depicted as in the utility model one execution mode the mutual conductance peak curve figure of the gallium nitride heterojunction field-effect transistor having and do not have stress liner.
As shown in Fig. 4 (d), and do not have the gallium nitride heterojunction field-effect transistor of stress liner to compare, the gallium nitride heterojunction field-effect transistor with stress liner can improve 22% at its mutual conductance peak value of below grid size 500nm.
A kind of gallium nitride heterojunction field-effect transistor provided by the utility model, by introducing stress liner structure in the structure of gallium nitride heterojunction field-effect transistor, compression stress is introduced at grid groove, pulling force is introduced in region between grid and source/drain, by the piezoelectric effect of gallium nitride material itself, effective control threshold voltage or threshold voltage is moved to positive direction thus realizes enhancement type gallium nitride device, reduces the dead resistance of device simultaneously.
In the utility model embodiment, the technical scheme that the utility model provides, by introducing stress liner structure in the structure of gallium nitride heterojunction field-effect transistor, compression stress is introduced at grid groove, pulling force is introduced in region between grid and source/drain, by the piezoelectric effect of gallium nitride material itself, effectively control threshold voltage or threshold voltage moved to positive direction thus realizes enhancement type gallium nitride device, reducing the dead resistance of device simultaneously.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all do within spirit of the present utility model and principle any amendment, equivalent to replace and improvement etc., all should be included within protection range of the present utility model.
Claims (5)
1. a gallium nitride heterojunction field-effect transistor, is characterized in that, described gallium nitride heterojunction field-effect transistor comprises:
Substrate;
Dielectric layer, is arranged on described substrate;
Grid, is arranged on described dielectric layer; And
Stress liner thin layer, is wrapped in the outside of described grid.
2. gallium nitride heterojunction field-effect transistor as claimed in claim 1, it is characterized in that, the material of described dielectric layer comprises gallium nitride, the material of described stress liner film comprise in silicon nitride, oxide, diamond-like materials one or more.
3. gallium nitride heterojunction field-effect transistor as claimed in claim 2, it is characterized in that, described gallium nitride heterojunction field-effect transistor also comprises:
Source electrode and drain electrode;
Wherein, introduce compression stress at the raceway groove of described grid, pulling force is introduced in the region between described grid and described source electrode or described drain electrode.
4. gallium nitride heterojunction field-effect transistor as claimed in claim 3, it is characterized in that, the size of described compression stress is 400-600MPa, and the size of described pulling force is 200-300MPa.
5. gallium nitride heterojunction field-effect transistor as claimed in claim 1, is characterized in that, described stress liner thin layer is wrapped in the outside of described grid and jointly forms convex shape, and described dielectric layer overlaps in described substrate.
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| CN105118785A (en) * | 2015-09-02 | 2015-12-02 | 深圳大学 | Gallium nitride heterojunction field effect transistor and forming method thereof |
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Effective date of registration: 20210323 Address after: No.16, Keji Third Road, circular economy industrial park, Yongji economic and Technological Development Zone, Yongji City, Yuncheng City, Shanxi Province 044000 Patentee after: Shanxi Ganneng Semiconductor Technology Co.,Ltd. Address before: 518060 No. 3688 Nanhai Road, Shenzhen, Guangdong, Nanshan District Patentee before: SHENZHEN University |
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Effective date of registration: 20211009 Address after: 335400 in the park, No. 1, chemical Avenue, Huayuan street, Guixi City, Yingtan City, Jiangxi Province (the former site of Liuguo chemical industry) Patentee after: Guixi crossing Photoelectric Technology Co.,Ltd. Address before: No.16, Keji Third Road, circular economy industrial park, Yongji economic and Technological Development Zone, Yongji City, Yuncheng City, Shanxi Province 044000 Patentee before: Shanxi Ganneng Semiconductor Technology Co.,Ltd. |