CN204759264U - A amplifier imbalance voltage compensation circuit for low pressure band gap benchmark - Google Patents
A amplifier imbalance voltage compensation circuit for low pressure band gap benchmark Download PDFInfo
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- CN204759264U CN204759264U CN201520430693.8U CN201520430693U CN204759264U CN 204759264 U CN204759264 U CN 204759264U CN 201520430693 U CN201520430693 U CN 201520430693U CN 204759264 U CN204759264 U CN 204759264U
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- pmos
- nmos tube
- amplifier
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- current
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Abstract
The utility model discloses an amplifier imbalance voltage compensation circuit for low pressure band gap benchmark, including low pressure band gap benchmark and amplifier imbalance voltage compensation circuit, low pressure band gap benchmark includes the amplifier, amplifier imbalance voltage compensation circuit is including imbalance voltage acquisition and converting circuit, first electric current subtraction circuit and second electric current subtraction circuit, imbalance voltage acquisition and converting circuit for gather the off -set voltage of amplifier and convert it into current signal, first electric current subtraction circuit for be greater than zero hour production offset current at the off -set voltage, second electric current subtraction circuit for be less than zero hour production offset current at the off -set voltage. The utility model discloses can automatic compensation amplifier off -set voltage to the output voltage's of low pressure band gap benchmark influence. The compensation effect does not receive device technology angle, mains voltage and influence of temperature. The utility model discloses only need a small amount of MOS pipe and resistance, the chip area who occupies is minimum. The utility model discloses the consumption of circuit is minimum, only needs several microamperes electric current.
Description
[technical field]
The utility model relates to a kind of offset voltage of amplifier compensating circuit for low pressure band-gap reference.
[background technology]
Band-gap reference is modal reference voltage circuit in integrated circuit, and it can provide the high precision reference voltage not by supply voltage and ambient temperature effect.
Typical low pressure band-gap reference 1, as shown in left side dotted line frame 1 in Fig. 1, is made up of diode, resistance, current mirror and amplifier.
Two diode D1 and D2 are for generation of the voltage being proportional to temperature, and the size of diode D1 with D2 is different, and diode D1 is formed in parallel by N number of diode D2, and N is generally equal to 8.Because the electric current flowing through D1 and D2 is equal, the voltage difference delta V of D1 and D2
dbe proportional to temperature.
Pmos current source MP11's and MP12 is measure-alike, and their grid drives by amplifier 14, for generation of the identical bias current of two-way.
The positive input terminal contact resistance R1 of amplifier 14 and one end of resistance R2 and the drain electrode of PMOS MP11, one end of negative input end contact resistance R3, the positive pole of diode D2 and the drain electrode of PMOS MP12, output terminal connects the grid of pmos current source MP11 and MP12, makes amplifier positive input terminal identical with the voltage of negative input end under degenerative effect.
Resistance R1 is for generation of the electric current being proportional to temperature, and because the positive input terminal of amplifier 14 is identical with the voltage of negative input end, the voltage at R1 two ends equals the voltage difference delta V of diode D1 and D2
d, due to Δ V
dbe proportional to temperature, so the electric current flowing through resistance R1 is proportional to temperature.
Resistance R2 is in parallel with diode D1 and resistance R1, and the voltage at R2 two ends equals the voltage of diode D2, and because diode forward forward voltage is negative temperature coefficient, the electric current flowing through resistance R2 is also negative temperature coefficient.When the resistance value of resistance R2 and R1 meets certain ratio, the current temperature coefficient flowing through R2 and R1 is contrary, and electric current sum is zero-temperature coefficient, and namely the electric current I of pmos current source MP11 and MP12 is temperature independent.
The resistance value of resistance R2 and R3 is equal, and because the positive input terminal of amplifier 14 is equal with the voltage of negative input end, the electric current therefore flowing through resistance R2 and R3 is equal.Because the electric current of pmos current source MP11 with MP12 is identical, the electric current therefore flowing through diode D1 and D2 is also equal.
The grid of pmos current source MP13 is connected with the grid of pmos current source MP11 with MP12 and size is also equal, therefore the electric current of pmos current source MP13 equals the electric current I of pmos current source MP11 and MP12, and it is temperature independent, electric current I flows through resistance R4, and the voltage Vref on R4 is also temperature independent.
Flow through the electric current I of R1
r1=Δ V
d/ R1,
Flow through the electric current I of R2
r2=V
d2/ R2,
Therefore electric current I=Δ the V of pmos current source MP11
d/ R1+V
d2/ R2
Because the electric current of PMOS MP11, MP12, MP13 is equal, the voltage on R4, namely the voltage Vref of band-gap reference is:
Vref＝I*R3＝(ΔV
D/R1+V
D2/R2)*R4(1-1)
This voltage and temperature and supply voltage have nothing to do, also only with resistance R1, the ratio of R21, R4 is correlated with, and therefore also has nothing to do with the temperature coefficient of resistance.
The band-gap reference of this structure have one significantly shortcoming be exactly the offset voltage influence of output voltage by amplifier 14, analysis supposition amplifier positive input terminal is before equal with the voltage of negative input end, and namely the offset voltage of amplifier is zero.In fact the finite gain by integrated circuit technology mismatch and amplifier affects, and has the offset voltage Vos that can not ignore, consider the impact of offset voltage between the positive-negative input end of amplifier, and the output voltage of band-gap reference is:
Vref＝I*R4＝(ΔV
D/R1+V
D2/R2+Vos/R1)*R4(1-2)
Wherein, Vos/R1 is the error current that offset voltage of amplifier is introduced.
The resistance value of usual R4 is much larger than R1, and therefore offset voltage influence can be exaggerated R4/R1 doubly, usually reaches the magnitude of tens millivolts, greatly affects the voltage accuracy of band-gap reference.Due to offset voltage temperature influence, the temperature characterisitic of band-gap reference also can be affected.
[utility model content]
The purpose of this utility model is to provide a kind of offset voltage of amplifier compensating circuit for low pressure band-gap reference, to solve the voltage accuracy of offset voltage of amplifier on depression belt gap reference circuit and the impact of temperature characterisitic, the error that erase amplifier offset voltage is introduced.
To achieve these goals, the utility model adopts following technical scheme:
For an offset voltage of amplifier compensating circuit for low pressure band-gap reference, comprise low pressure band-gap reference and offset voltage of amplifier compensating circuit;
Described low pressure band-gap reference comprises amplifier;
Described offset voltage of amplifier compensating circuit, comprises offset voltage collection and change-over circuit, the first current subtraction circuit and the second current subtraction circuit;
Offset voltage gathers and change-over circuit, for gathering the offset voltage of amplifier and it being converted to current signal;
First current subtraction circuit, produces offset current during for being greater than zero at offset voltage;
Second current subtraction circuit, produces offset current during for being less than zero at offset voltage.
The utility model further improves and is: offset voltage collection and change-over circuit comprise PMOS MP211, PMOS MP212, PMOS MP213, PMOS MP214, PMOS MP218, NMOS tube MN215, NMOS tube MN216, NMOS tube MN217 and resistance R5; PMOS MP211 and PMOS MP212 is two measure-alike long channel PMOSs, and their grid is connected with the output of amplifier, and their drain electrode is connected with the source electrode of PMOS MP214 with PMOS MP213 respectively; The source electrode of PMOS MP211, PMOS MP212 and PMOS MP218 connects power supply; PMOS MP214 is connected the drain electrode of NMOS tube MN216 and NMOS tube MN215 respectively with the drain electrode of PMOS MP213, and the drain and gate of NMOS tube MN216 connects altogether, and the drain and gate of NMOS tube MN215 connects altogether; The drain electrode of NMOS tube MN215 connects the grid of NMOS tube MN217; The drain electrode of NMOS tube MN217 connects the drain electrode of PMOS MP218; The drain and gate of PMOS MP218 connects altogether; The source ground of NMOS tube MN215, NMOS tube MN216 and NMOS tube MN217; PMOS MP214 is connected with the positive-negative input end of amplifier respectively with the grid of PMOS MP213, is used for gathering the offset voltage of amplifier; Resistance R5 one end connects the source electrode of PMOS MP213, and the other end connects the source electrode of PMOS MP214; The electric current flowing through PMOS MP213 and PMOS MP214 is respectively I1 and I2.
The utility model further improves and is: the first current subtraction circuit is for generation of offset current I
1– I
2; First current subtraction circuit comprises PMOS MP222, NMOS tube MN221, NMOS tube MN223 and NMOS tube MN224; The grid of NMOS tube MN221 is connected with the grid of NMOS tube MN216, forms one group of current mirror; The grid of PMOS MP222 is connected with the grid of PMOS MP218; The grid of NMOS tube MN223 is with drain electrode short circuit and be connected with the drain electrode of PMOS MP222 with NMOS tube MN221; The grid of NMOS tube MN224 is connected with the grid of NMOS tube MN223, forms current mirror; The source electrode of PMOS MP222 connects power supply, the source ground of NMOS tube MN221, NMOS tube MN223 and NMOS tube MN224.
The utility model further improves and is: the second current subtraction circuit is for generation of offset current=I
2– I
1; Second current subtraction circuit comprises NMOS tube MN231, PMOS MP232, PMOS MP233 and PMOS MP234; The grid of NMOS tube MN231 is connected with the grid of NMOS tube MN216, forms one group of current mirror; The grid of PMOS MP232 is connected with the grid of PMOS MP218; The grid of PMOS MP233 is with drain electrode short circuit and be connected with the drain electrode of PMOS MP232 with NMOS tube MN231; The grid of PMOS MP234 is connected with the grid of PMOS MP233, forms current mirror; The source electrode of PMOS MP232, PMOS MP233 and PMOS MP234 connects power supply, the source ground of NMOS tube MN231.
The utility model further improves and is: described low pressure band-gap reference comprises amplifier, PMOS MP11, PMOS MP12, PMOS MP13, resistance R1, resistance R2, resistance R3, resistance R4, diode D1 and diode D2; The source electrode of PMOS MP11, PMOS MP12 and PMOS MP13 connects power supply; PMOS MP11, PMOS MP12 and PMOS MP13 grid connect the output terminal of amplifier (14); The drain electrode of PMOS MP11 connects the positive input terminal of amplifier, resistance R1 one end and resistance R12 one end; The resistance R1 other end connects diode D1 positive pole; The drain electrode of PMOS MP12 connects one end of the positive input terminal of amplifier, the positive pole of diode D2 and resistance R3; Drain electrode contact resistance R4 one end of PMOS MP13; The other end ground connection of the negative pole of the resistance R2 other end, diode D1, the negative pole of diode D2, the resistance R3 other end and resistance R4.
Relative to prior art, the utility model has following beneficial effect: the utility model provides a kind of offset voltage of amplifier compensating circuit for low pressure band-gap reference, when the offset voltage of amplifier is greater than zero, and I
2be less than I
1, the first current subtraction circuit output current offset current, the second current subtraction circuit output current is zero.When the offset voltage of amplifier is less than zero, I
2be greater than I
1, the second current subtraction circuit output current offset current, the first current subtraction circuit output current is zero.Therefore, no matter offset voltage equals how many, compensating circuit all can produce correct offset current automatically, eliminates the error that offset voltage is introduced band-gap reference output voltage.
The utility model can auto-compensation offset voltage of amplifier on the impact of the output voltage of low pressure band-gap reference.Compensation effect is not subject to device process corner, the impact of supply voltage and temperature.The utility model only needs a small amount of metal-oxide-semiconductor and resistance, and the chip area taken is minimum.The micro power consumption of the utility model circuit, only needs the electric current of several microamperes.
[accompanying drawing explanation]
Fig. 1 is the schematic diagram of the utility model offset voltage of amplifier compensating circuit.
[embodiment]
Refer to shown in Fig. 1, a kind of offset voltage of amplifier compensating circuit 2 for low pressure band-gap reference of the utility model, comprises offset voltage collection and change-over circuit 21, current subtraction circuit 22 and current subtraction circuit 23.
The function of offset voltage collection and change-over circuit 21 is the offset voltage of collection amplifier 14 and it is converted to current signal.Find out from the Output Voltage Formula 1-2 of band-gap reference, the error term that offset voltage of amplifier is introduced is Vos/R1, and this is an electric current item, and unit is ampere.
Offset voltage collection and change-over circuit 21 comprise PMOS MP211, PMOS MP212, PMOS MP213, PMOS MP214, PMOS MP218, NMOS tube MN215, NMOS tube MN216, NMOS tube MN217 and resistance R5.
PMOS MP211 and PMOS MP212 is two PMOS current sources; PMOS MP213 and PMOS MP214 is two source followers; NMOS tube MN215, NMOS tube MN216, NMOS tube MN217, PMOS MP218 form current mirror circuit.
PMOS MP211 and PMOS MP212 is two measure-alike long channel PMOSs, their grid is connected with the output of amplifier 14, their drain electrode is connected with the source electrode of PMOS MP214 with PMOS MP213 respectively, for two source followers provide bias current, gate voltage due to two current sources is identical and be long channel device, their electric current is identical, all equals I.The source electrode of PMOS MP211, PMOS MP212 and PMOS MP218 connects power supply; PMOS MP214 is connected the drain electrode of NMOS tube MN216 and NMOS tube MN215 respectively with the drain electrode of PMOS MP213, and the drain and gate of NMOS tube MN216 connects altogether, and the drain and gate of NMOS tube MN215 connects altogether; The drain electrode of NMOS tube MN215 connects the grid of NMOS tube MN217; The drain electrode of NMOS tube MN217 connects the drain electrode of PMOS MP218; The drain and gate of PMOS MP218 connects altogether; The source ground of NMOS tube MN215, NMOS tube MN216 and NMOS tube MN217.
PMOS MP214 is connected with the positive-negative input end of amplifier 14 respectively with the grid of PMOS MP213, is used for gathering the offset voltage of amplifier 14.Resistance R5 one end connects the drain electrode of PMOS MP211, and the other end connects the drain electrode of PMOS MP212; If bias current I is much larger than the electric current flowing through resistance R5, then the voltage difference of source electrode A and B of PMOS MP214 and PMOS MP213 equals the offset voltage Vos of amplifier.The two ends of resistance R5 are connected with source electrode A with B of PMOS MP213 with two PMOS MP214, and R5=2*R1, therefore flow through the electric current of resistance R5, I
r5=Vos/ (2*R1).Assuming that the electric current flowing through PMOS MP213 and PMOS MP214 is respectively I1 and I2, then I1=I+Vos/ (2*R1), I2=I-Vos/ (2*R1), (I
1– I
2)=2*I
r5=Vos/R1, equals the error current item in expression formula 1-2 just.
Current subtraction circuit 22 is used for producing offset current I
1– I
2.Current subtraction circuit 22 comprises PMOS MP222, NMOS tube MN221, NMOS tube MN223 and NMOS tube MN224; PMOS MP222 and NMOS tube MN221 is current source; NMOS tube MN223 and NMOS tube MN224 forms current mirror.
The grid of NMOS tube MN221 is connected with the grid of NMOS tube MN216, and form one group of current mirror, therefore the electric current of NMOS tube MN221 equals I
2.The grid of PMOS MP222 is connected with the grid of PMOS MP218, forms mirror by NMOS tube MN217 and NMOS tube MN215, and therefore the electric current of PMOS MP222 equals I
1.The grid of NMOS tube MN223 is with drain electrode short circuit and be connected with the drain electrode of PMOS MP222 with NMOS tube MN221, and therefore the electric current of NMOS tube MN223 equals the electric current of PMOS MP222 and the difference between current of NMOS tube MN221, i.e. I
1– I
2.The grid of NMOS tube MN224 is connected with the grid of NMOS tube MN223, forms current mirror, the therefore electric current I of NMOS tube MN224
22=I
1– I
2.The source electrode of PMOS MP222 connects power supply, the source ground of NMOS tube MN221, NMOS tube MN223 and NMOS tube MN224.
Current subtraction circuit 23 is used for producing offset current=I
2– I
1.Current subtraction circuit 23 comprises NMOS tube MN231, PMOS MP232, PMOS MP233 and PMOS MP234; NMOS tube MN231 and PMOS MP232 is current source, and PMOS MP233 and PMOS MP234 forms PMOS current mirror.The grid of NMOS tube MN231 is connected with the grid of NMOS tube MN216, and form one group of current mirror, therefore the electric current of NMOS tube MN231 equals I
2.The grid of PMOS MP232 is connected with the grid of PMOS MP218, and forms mirror by NMOS tube MN217 and NMOS tube MN215, and therefore the electric current of PMOS MP232 equals I
1.The grid of PMOS MP233 is with drain electrode short circuit and be connected with the drain electrode of PMOS MP232 with NMOS tube MN231, and therefore the electric current of PMOS MP232 equals the electric current of NMOS tube MN231 and the difference between current of PMOS MP232, i.e. I
2– I
1.The grid of PMOS MP234 is connected with the grid of PMOS MP233, forms current mirror, the therefore electric current I of PMOS MP234
23=I
2– I
1.The source electrode of PMOS MP232, PMOS MP233 and PMOS MP234 connects power supply, the source ground of NMOS tube MN231.
Consider the polarity of offset voltage of amplifier, when Vos be on the occasion of time, i.e. V
a>V
b, then I
1>I
2, I
23=0andI
22=(I
1– I
2)=Vos/R1,
I
R4＝I–I
22＝V
D2/R2+ΔV
D/R1+Vos/R1-Vos/R1＝V
D2/R2+ΔV
D/R1
The error caused by offset voltage of amplifier is it often fully compensated, the output voltage of band-gap reference
Vref＝R
4*(V
D2/R2+ΔV
D/R1)
When offset voltage of amplifier Vos is negative value, V
a<V
bandI
2>I
1, I
22=0andI
23=(I
2– I
1)=– Vos/R1
I
R4＝I+I
23＝V
D2/R2+ΔV
D/R1+Vos/R1+(–Vos/R1)＝V
D2/R2+ΔV
D/R1
The error caused by offset voltage of amplifier is it often fully compensated, the output voltage of band-gap reference
Vref＝R
4*(V
D2/R2+ΔV
D/R1)
As can be seen from above analysis, when the offset voltage of amplifier is greater than zero, I
2be less than I
1, current subtraction circuit 22 output current offset current, current subtraction circuit 23 output current is zero.When the offset voltage of amplifier is less than zero, I
2be greater than I
1, current subtraction circuit 23 output current offset current, current subtraction circuit 22 output current is zero.Therefore, no matter offset voltage equals how many, compensating circuit all can produce correct offset current automatically, eliminates the error that offset voltage is introduced band-gap reference output voltage.
Claims (5)
1. for an offset voltage of amplifier compensating circuit for low pressure band-gap reference, it is characterized in that, comprise low pressure band-gap reference (1) and offset voltage of amplifier compensating circuit (2);
Described low pressure band-gap reference (1) comprises amplifier (14);
Described offset voltage of amplifier compensating circuit (2), comprises offset voltage collection and change-over circuit (21), the first current subtraction circuit (22) and the second current subtraction circuit (23);
Offset voltage gathers and change-over circuit, for gathering the offset voltage of amplifier and it being converted to current signal;
First current subtraction circuit, produces offset current during for being greater than zero at offset voltage;
Second current subtraction circuit, produces offset current during for being less than zero at offset voltage.
2. a kind of offset voltage of amplifier compensating circuit for low pressure band-gap reference according to claim 1, it is characterized in that, offset voltage collection and change-over circuit comprise PMOS MP211, PMOS MP212, PMOS MP213, PMOS MP214, PMOS MP218, NMOS tube MN215, NMOS tube MN216, NMOS tube MN217 and resistance R5;
PMOS MP211 and PMOS MP212 is two measure-alike long channel PMOSs, and their grid is connected with the output of amplifier, and their drain electrode is connected with the source electrode of PMOS MP214 with PMOS MP213 respectively; The source electrode of PMOS MP211, PMOS MP212 and PMOS MP218 connects power supply; PMOS MP214 is connected the drain electrode of NMOS tube MN216 and NMOS tube MN215 respectively with the drain electrode of PMOS MP213, and the drain and gate of NMOS tube MN216 connects altogether, and the drain and gate of NMOS tube MN215 connects altogether; The drain electrode of NMOS tube MN215 connects the grid of NMOS tube MN217; The drain electrode of NMOS tube MN217 connects the drain electrode of PMOS MP218; The drain and gate of PMOS MP218 connects altogether; The source ground of NMOS tube MN215, NMOS tube MN216 and NMOS tube MN217;
PMOS MP214 is connected with the positive-negative input end of amplifier respectively with the grid of PMOS MP213, is used for gathering the offset voltage of amplifier; Resistance R5 one end connects the drain electrode of PMOS MP211, and the other end connects the drain electrode of PMOS MP212; The electric current flowing through PMOS MP213 and PMOS MP214 is respectively I1 and I2.
3. a kind of offset voltage of amplifier compensating circuit for low pressure band-gap reference according to claim 2, it is characterized in that, the first current subtraction circuit is for generation of offset current I
1– I
2; First current subtraction circuit comprises PMOS MP222, NMOS tube MN221, NMOS tube MN223 and NMOS tube MN224;
The grid of NMOS tube MN221 is connected with the grid of NMOS tube MN216, forms one group of current mirror; The grid of PMOS MP222 is connected with the grid of PMOS MP218; The grid of NMOS tube MN223 is with drain electrode short circuit and be connected with the drain electrode of PMOS MP222 with NMOS tube MN221; The grid of NMOS tube MN224 is connected with the grid of NMOS tube MN223, forms current mirror; The source electrode of PMOS MP222 connects power supply, the source ground of NMOS tube MN221, NMOS tube MN223 and NMOS tube MN224.
4. a kind of offset voltage of amplifier compensating circuit for low pressure band-gap reference according to claim 2, it is characterized in that, the second current subtraction circuit (23) is for generation of offset current=I
2– I
1; Second current subtraction circuit (23) comprises NMOS tube MN231, PMOS MP232, PMOS MP233 and PMOS MP234;
The grid of NMOS tube MN231 is connected with the grid of NMOS tube MN216, forms one group of current mirror; The grid of PMOS MP232 is connected with the grid of PMOS MP218; The grid of PMOS MP233 is with drain electrode short circuit and be connected with the drain electrode of PMOS MP232 with NMOS tube MN231; The grid of PMOS MP234 is connected with the grid of PMOS MP233, forms current mirror; The source electrode of PMOS MP232, PMOS MP233 and PMOS MP234 connects power supply, the source ground of NMOS tube MN231.
5. a kind of offset voltage of amplifier compensating circuit for low pressure band-gap reference according to claim 1, it is characterized in that, described low pressure band-gap reference (1) comprises amplifier (14), PMOS MP11, PMOS MP12, PMOS MP13, resistance R1, resistance R2, resistance R3, resistance R4, diode D1 and diode D2;
The source electrode of PMOS MP11, PMOS MP12 and PMOS MP13 connects power supply; PMOS MP11, PMOS MP12 and PMOS MP13 grid connect the output terminal of amplifier (14); The drain electrode of PMOS MP11 connects the positive input terminal of amplifier, resistance R1 one end and resistance R2 one end; The resistance R1 other end connects diode D1 positive pole; The drain electrode of PMOS MP12 connects the positive pole of diode D2 and one end of resistance R3; Drain electrode contact resistance R4 one end of PMOS MP13; The other end ground connection of the negative pole of the resistance R2 other end, diode D1, the negative pole of diode D2, the resistance R3 other end and resistance R4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520430693.8U CN204759264U (en) | 2015-06-19 | 2015-06-19 | A amplifier imbalance voltage compensation circuit for low pressure band gap benchmark |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520430693.8U CN204759264U (en) | 2015-06-19 | 2015-06-19 | A amplifier imbalance voltage compensation circuit for low pressure band gap benchmark |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204759264U true CN204759264U (en) | 2015-11-11 |
Family
ID=54473951
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520430693.8U Withdrawn - After Issue CN204759264U (en) | 2015-06-19 | 2015-06-19 | A amplifier imbalance voltage compensation circuit for low pressure band gap benchmark |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204759264U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104950978A (en) * | 2015-06-19 | 2015-09-30 | 西安华芯半导体有限公司 | Amplifier offset voltage compensating circuit for low-voltage band-gap reference |
| CN108919876A (en) * | 2018-09-29 | 2018-11-30 | 北京兆易创新科技股份有限公司 | A kind of a reference source |
-
2015
- 2015-06-19 CN CN201520430693.8U patent/CN204759264U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104950978A (en) * | 2015-06-19 | 2015-09-30 | 西安华芯半导体有限公司 | Amplifier offset voltage compensating circuit for low-voltage band-gap reference |
| CN104950978B (en) * | 2015-06-19 | 2017-01-11 | 西安紫光国芯半导体有限公司 | Amplifier offset voltage compensating circuit for low-voltage band-gap reference |
| CN108919876A (en) * | 2018-09-29 | 2018-11-30 | 北京兆易创新科技股份有限公司 | A kind of a reference source |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee | ||
| CP03 | Change of name, title or address |
Address after: 710055 Shaanxi City, Xi'an province high tech Road No. 38, innovation center, A, block, floor 4 Patentee after: XI'AN UNIIC SEMICONDUCTORS Co.,Ltd. Address before: 710075 Shaanxi City, Xi'an province high tech Road No. 38, innovation center, A, block, floor 4 Patentee before: Xi'an Sinochip Semiconductors Co., Ltd. |
|
| AV01 | Patent right actively abandoned |
Granted publication date: 20151111 Effective date of abandoning: 20161019 |
|
| AV01 | Patent right actively abandoned |
Granted publication date: 20151111 Effective date of abandoning: 20161019 |
|
| C25 | Abandonment of patent right or utility model to avoid double patenting |