CN204714514U - Three-dimensional stacked MEMS package structure - Google Patents
Three-dimensional stacked MEMS package structure Download PDFInfo
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- CN204714514U CN204714514U CN201520356956.5U CN201520356956U CN204714514U CN 204714514 U CN204714514 U CN 204714514U CN 201520356956 U CN201520356956 U CN 201520356956U CN 204714514 U CN204714514 U CN 204714514U
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Abstract
The utility model discloses a kind of three-dimensional stacked MEMS package structure, adopt an intermediary layer as the bridge connecting MEMS chip and IC chip, the size of this intermediary layer is greater than the size of IC chip or/and the size of MEMS chip; Intermediary layer is provided with some soldered balls for the electrical derivation by this MEMS package structure.Like this, this three-dimensional stacked MEMS package structure will not be subject to the restriction of MEMS chip and IC chip size, when IC chip is larger, can soldered ball be located on the lower surface of intermediary layer, when MEMS chip is larger, can soldered ball be located on the upper surface of intermediary layer, when IC chip is all less, on the upper surface that soldered ball can be arranged on arbitrarily intermediary layer or lower surface, therefore, no matter size, all can adopt this encapsulating structure, thus meet the integration packaging of MEMS, reach reduction production cost, improve the integrated level of MEMS package and the object of encapsulation yield.
Description
Technical field
The utility model relates to a kind of MEMS package structure, particularly relates to a kind of three-dimensional stacked MEMS package structure.
Background technology
The integrated of MEMS microsensor is completed together with IC chip package sensing or drive function.The patent No. is disclose a kind of three-dimensional stacked MEMS package structure in the patent document of 201420357894.5, and wherein, functional chip C (IC chip) is connected by intermediary layer B (intermediary layer) with the encapsulation of microsensor wafer.But in this patent, the size of MEMS microsensor wafer is greater than the size of IC chip, and the MEMS chip that this encapsulation completes is when being connected with external devices (such as pcb board), can only be attached thereto by the soldered ball in IC chip one side.
But, if IC chip size is greater than MEMS microsensor wafer; Or, require, when MEMS microsensor wafer one side mounts, just to need for the new encapsulating structure of dissimilar chip design.Like this, both waste time and energy, feasibility that cost of idleness goes to study often kind of structure again.Therefore, need to find a kind of encapsulating structure that often kind of MEMS encapsulation is all suitable for.
Summary of the invention
In order to solve the problems of the technologies described above, the utility model proposes a kind of three-dimensional stacked MEMS package structure, this encapsulating structure is applicable to the integration packaging of all MEMS, not only can reduce production cost, can also improve integrated level and the encapsulation yield of MEMS package.
The technical solution of the utility model is achieved in that
A kind of three-dimensional stacked MEMS package structure, comprise MEMS chip, intermediary layer and IC chip, described intermediary layer has upper surface and lower surface, has groove in the middle part of the lower surface of described intermediary layer, and described recessed circumferential is provided with some conductive through holes of through described upper surface and lower surface; The lower surface of described intermediary layer is connected by sealing ring bonded seal with the front of described MEMS chip, makes that described groove is relative with the cavity in the middle part of described MEMS chip surrounds a closed cavity, and the element of described MEMS chip is positioned at described closed cavity; Described IC chip attachment is in the upper surface of described intermediary layer, and the electrical of described IC chip is connected by described conductive through hole with the electrical of described MEMS chip; The size of described intermediary layer is greater than the size of described IC chip or/and the size of described MEMS chip; Described intermediary layer is provided with some soldered balls for the electrical derivation by this MEMS package structure.
As further improvement of the utility model, the first insulating barrier, metal conducting layer and the second insulating barrier that described conductive through hole comprises the through upper surface of described intermediary layer and the hole of lower surface and is set in turn in described hole, described first insulating barrier, metal conducting layer and the second insulating barrier all extend on the upper and lower surface of described intermediary layer.
As further improvement of the utility model, described IC chip is electrically connected by the mode of some first metal salient points or flip chip bonding and described metal conducting layer.
As further improvement of the utility model, described MEMS chip is electrically connected by some second metal salient points and described metal conducting layer.
As further improvement of the utility model, the size of described intermediary layer is greater than the size of described IC chip and the size of described MEMS chip, on the upper surface that described intermediary layer is located at by described soldered ball or lower surface, and is electrically connected with described metal conducting layer.
As further improvement of the utility model, the size of described intermediary layer is greater than the size of described MEMS chip, and described soldered ball is located on the lower surface of described intermediary layer, and is electrically connected with described metal conducting layer.
As further improvement of the utility model, the size of described intermediary layer is greater than the size of described IC chip, and described soldered ball is located on the upper surface of described intermediary layer, and is electrically connected with described metal conducting layer.
As further improvement of the utility model, described intermediary layer material is semi-conducting material or organic material or ceramic material.
As further improvement of the utility model, described hole is fully filled by the material of described second insulating barrier.
As further improvement of the utility model, form the gas compartment or vacuum space according to the described closed cavity of the difference of MEMS chip.
The beneficial effects of the utility model are: the utility model provides a kind of three-dimensional stacked MEMS package structure, and adopt an intermediary layer as the bridge connecting MEMS chip and IC chip, the size of this intermediary layer is greater than the size of IC chip or/and the size of MEMS chip; Intermediary layer is provided with some soldered balls for the electrical derivation by this MEMS package structure.Like this, this three-dimensional stacked MEMS package structure will not be subject to the restriction of MEMS chip and IC chip size, when IC chip is larger, can soldered ball be located on the lower surface of intermediary layer, when MEMS chip is larger, can soldered ball be located on the upper surface of intermediary layer, when IC chip is all less, on the upper surface that soldered ball can be arranged on arbitrarily intermediary layer or lower surface, therefore, no matter size, all can adopt this encapsulating structure, if the size of MEMS chip and IC chip changes, intermediary layer also can change thereupon, thus meets the integration packaging of MEMS.Because this MEMS package structure is without the need to for the new encapsulating structure of dissimilar chip design, like this, can production cost be reduced, integrated level and the encapsulation yield of MEMS package can also be improved.
Accompanying drawing explanation
Fig. 1 is the encapsulating structure schematic diagram of the utility model one embodiment;
Fig. 2 is the encapsulating structure schematic diagram of another embodiment of the utility model.
By reference to the accompanying drawings, make the following instructions:
100-IC chip 200-MEMS chip
300-intermediary layer 300a-upper surface
300b-lower surface 301-metal conducting layer
302-first insulating barrier 303-second insulating barrier
304-soldered ball 1-first metal salient point
2-second metal salient point 3-sealing ring
The element of the cavity 5-MEMS chip in the middle part of 4-MEMS chip
6-conductive through hole
Detailed description of the invention
For enabling the utility model more become apparent, below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in detail.For convenience of description, in the structure of embodiment accompanying drawing, each part does not press normal rates convergent-divergent, therefore does not represent the actual relative size of each structure in embodiment.
As depicted in figs. 1 and 2, a kind of three-dimensional stacked MEMS package structure, comprise MEMS chip 200, intermediary layer 300 and IC chip 100, described intermediary layer has upper surface 300a and lower surface 300b, have groove 7 in the middle part of the lower surface of described intermediary layer, described recessed circumferential is provided with some conductive through holes 6 of through described upper surface and lower surface; The lower surface of described intermediary layer is connected by sealing ring 3 bonded seal with the front of described MEMS chip, makes that described groove is relative with the cavity 4 in the middle part of described MEMS chip surrounds a closed cavity, and the element 5 of described MEMS chip is positioned at described closed cavity; Described IC chip attachment is in the upper surface of described intermediary layer, and the electrical of described IC chip is connected by described conductive through hole with the electrical of described MEMS chip; The size of described intermediary layer is greater than the size of described IC chip or/and the size of described MEMS chip; Described intermediary layer is provided with some soldered balls 304 for the electrical derivation by this MEMS package structure.
Wherein, MEMS chip can be micro mechanical pressure sensor chip, micro-acceleration sensor chip, micromechanical gyro chip, microflow sensor chip, micro-gas sensors chip, micro mechanical temperature sensor chip or other micro mechanical sensor chips.The material of intermediary layer 300 can be semi-conducting material, organic material, ceramic material or other suitable materials.IC chip can be asic chip, amplifier chip or CMOS chip, and it is placed number and can determine according to the actual requirements.
In said structure, adopt an intermediary layer as the bridge connecting MEMS chip and IC chip, the size of this intermediary layer is greater than the size of IC chip or/and the size of MEMS chip; Intermediary layer is provided with some soldered balls for the electrical derivation by this MEMS package structure.Like this, this three-dimensional stacked MEMS package structure will not be subject to the restriction of MEMS chip and IC chip size, when IC chip is larger, can soldered ball be located on the lower surface of intermediary layer, when MEMS chip is larger, can soldered ball be located on the upper surface of intermediary layer, when IC chip is all less, on the upper surface that soldered ball can be arranged on arbitrarily intermediary layer or lower surface, see Fig. 1 and Fig. 2, therefore, no matter size, all can adopt this encapsulating structure, if the size of MEMS chip and IC chip changes, intermediary layer also can change thereupon, thus meets the integration packaging of MEMS.Because this MEMS package structure is without the need to for the new encapsulating structure of dissimilar chip design, like this, can production cost be reduced, integrated level and the encapsulation yield of MEMS package can also be improved.
Preferably, the first insulating barrier 302, metal conducting layer 301 and the second insulating barrier 303 that described conductive through hole comprises the through upper surface of described intermediary layer and the hole of lower surface and is set in turn in described hole, described hole is fully filled by the material of described second insulating barrier; Described first insulating barrier 302, metal conducting layer 301 and the second insulating barrier 303 all extend on the upper and lower surface of described intermediary layer.
Preferably, described IC chip is electrically connected by the mode of some first metal salient points 1 or flip chip bonding and described metal conducting layer.
Preferably, described MEMS chip is electrically connected with described metal conducting layer by some second metal salient points 2.
Preferably, the size of described intermediary layer is greater than the size of described IC chip and the size of described MEMS chip, on the upper surface that described intermediary layer is located at by described soldered ball or lower surface, and is electrically connected with described metal conducting layer.
Preferably, the size of described intermediary layer is greater than the size of described MEMS chip, and described soldered ball is located on the lower surface of described intermediary layer, and is electrically connected, see Fig. 1 and Fig. 2 with described metal conducting layer.
Preferably, the size of described intermediary layer is greater than the size of described IC chip, and described soldered ball is located on the upper surface of described intermediary layer, and is electrically connected with described metal conducting layer.
The gas compartment or vacuum space is formed according to the described closed cavity of the difference of MEMS chip.In encapsulation process, the difference that can require according to the operation principle of MEMS and encapsulation thereof selects to be filled with in closed cavity the gas with certain pressure or by closed cavity vacuum state.Such as, if closed cavity is only to provide a working space, then can not need to vacuumize or inflate; If MEMS chip requires that reducing air drag affects it, then need be evacuated by closed cavity or insert certain inert gas.
The utility model, the packaging technology of three-dimensional stacked MEMS package structure is as follows:
The wafer comprising some MEMS chip carries out bonding by wafer to the mode of wafer (Wafer-to-Wafer) with the wafer of the intermediary layer comprising corresponding MEMS chip, makes the groove corresponding with on the lower surface of intermediary layer of the cavity in the middle part of MEMS chip surround a closed cavity.When some IC chips are connected with intermediary layer wafer, by chip to the stack manner of wafer (Chip-to-Wafer) at several IC chips 100 of intermediary layer surface mount.This packaging technology substantially reduces encapsulated space, and the MEMS chip encapsulating structure of formation is also more complicated, and function is also more diversified.
To sum up, the three-dimensional stacked MEMS package structure of the utility model, be not subject to the restriction of MEMS chip wafer and IC chip size, no matter size, all can adopt this encapsulating structure, if the size of MEMS chip wafer and IC chip changes, intermediary layer also can change thereupon, thus meets the integration packaging of MEMS chip.Meanwhile, this encapsulating structure according to the actual requirements, can arrange in any side of intermediary layer the soldered ball be connected with extraneous device conformed to MEMS chip wafer mounting method.
Above embodiment is with reference to accompanying drawing, to a preferred embodiment of the present invention will be described in detail.Those skilled in the art by carrying out amendment on various forms or change to above-described embodiment, or is applied to the encapsulating structure of different MEMS chip, but when not deviating from essence of the present invention, all drops within protection scope of the present invention.
Claims (10)
1. a three-dimensional stacked MEMS package structure, it is characterized in that, comprise MEMS chip (200), intermediary layer (300) and IC chip (100), described intermediary layer has upper surface (300a) and lower surface (300b), have groove in the middle part of the lower surface of described intermediary layer, described recessed circumferential is provided with some conductive through holes (6) of through described upper surface and lower surface; The lower surface of described intermediary layer is connected by sealing ring (3) bonded seal with the front of described MEMS chip, make that described groove is relative with the cavity (4) in the middle part of described MEMS chip surrounds a closed cavity, the element (5) of described MEMS chip is positioned at described closed cavity; Described IC chip attachment is in the upper surface of described intermediary layer, and the electrical of described IC chip is connected by described conductive through hole with the electrical of described MEMS chip; The size of described intermediary layer is greater than the size of described IC chip or/and the size of described MEMS chip; Described intermediary layer is provided with some soldered balls (304) for the electrical derivation by this MEMS package structure.
2. three-dimensional stacked MEMS package structure according to claim 1, it is characterized in that: the first insulating barrier (302), metal conducting layer (301) and the second insulating barrier (303) that described conductive through hole comprises the through upper surface of described intermediary layer and the hole of lower surface and is set in turn in described hole, described first insulating barrier (302), metal conducting layer (301) and the second insulating barrier (303) all extend on the upper and lower surface of described intermediary layer.
3. three-dimensional stacked MEMS package structure according to claim 2, is characterized in that: described IC chip is electrically connected by the mode of some first metal salient points (1) or flip chip bonding and described metal conducting layer.
4. three-dimensional stacked MEMS package structure according to claim 2, is characterized in that: described MEMS chip is electrically connected by some second metal salient points (2) and described metal conducting layer.
5. the three-dimensional stacked MEMS package structure according to claim 3 or 4, it is characterized in that: the size of described intermediary layer is greater than the size of described IC chip and the size of described MEMS chip, on the upper surface that described intermediary layer is located at by described soldered ball or lower surface, and be electrically connected with described metal conducting layer.
6. the three-dimensional stacked MEMS package structure according to claim 3 or 4, is characterized in that: the size of described intermediary layer is greater than the size of described MEMS chip, and described soldered ball is located on the lower surface of described intermediary layer, and is electrically connected with described metal conducting layer.
7. the three-dimensional stacked MEMS package structure according to claim 3 or 4, is characterized in that: the size of described intermediary layer is greater than the size of described IC chip, and described soldered ball is located on the upper surface of described intermediary layer, and is electrically connected with described metal conducting layer.
8. three-dimensional stacked MEMS package structure according to claim 1, is characterized in that, described intermediary layer material is semi-conducting material or organic material or ceramic material.
9. three-dimensional stacked MEMS package structure according to claim 2, is characterized in that, described hole is fully filled by the material of described second insulating barrier.
10. three-dimensional stacked MEMS package structure according to claim 1, is characterized in that, forms the gas compartment or vacuum space according to the described closed cavity of the difference of MEMS chip.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105347292A (en) * | 2015-11-13 | 2016-02-24 | 华天科技（昆山）电子有限公司 | Micro-electro-mechanical-systems (MEMS) capsulation structure capable of relieving cover plate stress and capsulation method thereof |
| CN105977235A (en) * | 2016-06-30 | 2016-09-28 | 中国电子科技集团公司第十三研究所 | Novel three-dimensional microwave multi-chip module structure |
| CN106477510A (en) * | 2016-11-29 | 2017-03-08 | 合肥芯福传感器技术有限公司 | Stack MEMS sensor packaging body, chip and preparation method thereof |
| CN106744647A (en) * | 2016-12-20 | 2017-05-31 | 苏州晶方半导体科技股份有限公司 | MEMS chip encapsulating structure and method for packing |
| WO2022088496A1 (en) * | 2020-10-29 | 2022-05-05 | 瑞声声学科技(深圳)有限公司 | Integrated packaged module manufacturing method, integrated packaged module, and electronic device |
-
2015
- 2015-05-28 CN CN201520356956.5U patent/CN204714514U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105347292A (en) * | 2015-11-13 | 2016-02-24 | 华天科技（昆山）电子有限公司 | Micro-electro-mechanical-systems (MEMS) capsulation structure capable of relieving cover plate stress and capsulation method thereof |
| CN105977235A (en) * | 2016-06-30 | 2016-09-28 | 中国电子科技集团公司第十三研究所 | Novel three-dimensional microwave multi-chip module structure |
| CN105977235B (en) * | 2016-06-30 | 2019-04-09 | 中国电子科技集团公司第十三研究所 | A kind of novel three-dimensional Microwave Multichip Module structure |
| CN106477510A (en) * | 2016-11-29 | 2017-03-08 | 合肥芯福传感器技术有限公司 | Stack MEMS sensor packaging body, chip and preparation method thereof |
| CN106477510B (en) * | 2016-11-29 | 2018-03-20 | 合肥芯福传感器技术有限公司 | Stack MEMS sensor packaging body, chip and preparation method thereof |
| CN106744647A (en) * | 2016-12-20 | 2017-05-31 | 苏州晶方半导体科技股份有限公司 | MEMS chip encapsulating structure and method for packing |
| WO2022088496A1 (en) * | 2020-10-29 | 2022-05-05 | 瑞声声学科技(深圳)有限公司 | Integrated packaged module manufacturing method, integrated packaged module, and electronic device |
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