CN204650856U - A kind of Electronic Design Competition training platform - Google Patents

A kind of Electronic Design Competition training platform Download PDF

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Publication number
CN204650856U
CN204650856U CN201520315217.1U CN201520315217U CN204650856U CN 204650856 U CN204650856 U CN 204650856U CN 201520315217 U CN201520315217 U CN 201520315217U CN 204650856 U CN204650856 U CN 204650856U
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China
Prior art keywords
module
electronic design
training platform
competition training
design competition
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Expired - Fee Related
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CN201520315217.1U
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Chinese (zh)
Inventor
李德明
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Institute of Information Technology of GUET
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Institute of Information Technology of GUET
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Priority to CN201520315217.1U priority Critical patent/CN204650856U/en
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Publication of CN204650856U publication Critical patent/CN204650856U/en
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Abstract

The utility model discloses a kind of Electronic Design Competition training platform, existing FPGA module, there is one-chip computer module again, deviser can selectivity use wherein a kind of, or the combination of two kinds carrys out design circuit, and other functional module is as expansion connection module, A/D module, D/A module, I/O module, one-chip computer module is all connected with interconnecting module, and be arranged on base plate by web member respectively, can combine according to demand, to complete or simply, or the circuit design of complexity, possesses dirigibility, fault coverage can also be reduced, for localization of fault is saved time, the interconnecting module arranged, can avoid at substantial time and efforts in the connection of circuit, solve the time that existing Electronic Design Competition training platform too much expends deviser's connecting circuit and localization of fault, the problem of electronic design ability can not be fully demonstrated.

Description

A kind of Electronic Design Competition training platform
Technical field
The utility model relates to a kind of training platform, particularly relates to a kind of Electronic Design Competition training platform.
Background technology
Traditional Electronic Design Competition training platform take single-chip microcomputer as core, triode amplification module, amplifier module, power amplifier module, coding and decoding module, each module distribution such as radio receiving transmitting module is around single-chip microcomputer, for the training platform of this type, owing to needing kind when carrying out circuit design, the chip that number is various, therefore a large amount of connecting line of cost is needed to connect each chip, deviser is equivalent to need to build circuit board by connection standard integrated circuit (IC)-components and realizes systemic-function, at substantial time connecting circuit, even can because of the conduction problem of connecting line, the quality problems at substantial time carries out localization of fault, after make improvement, each module is arranged on base plate by web member, achieve the pluggable of module, but only can provide convenient for localization of fault, the problems referred to above still exist, the training requirement of student's Electronic Design Competition can not be met, the Electronic Design Competition training platform of rear appearance take FPGA as core, comprise other functional module, each functional module passes through contact pin, socket is connected with FPGA module, position is interchangeable, order of the pin definable, without the need to winding displacement or fly line, but deviser is coupled together the logical block of FPGA inside by editable connection, the place one's entire reliance upon hardware language descriptive power of deviser of the Electronic Design training platform of this type completes Electronic Design, and the relation between modules and FPGA is changeless, deviser is limited in the performance of circuit design, the ability of deviser's Electronic Design can not be fully demonstrated.To sum up, preferably can propose one and can reduce deviser's connecting circuit and fault location time, the Electronic Design Competition training platform of deviser's electronic design ability can be fully demonstrated again.
Utility model content
The utility model provides a kind of Electronic Design Competition training platform, solves the time that existing Electronic Design Competition training platform too much expends deviser's connecting circuit and localization of fault, can not fully demonstrate the problem of deviser's electronic design ability.
The utility model solves the problem by the following technical programs:
A kind of Electronic Design Competition training platform, be made up of casing, base plate and functional module, described base plate is fixed on bottom half, and described functional module is arranged on base plate:
Described functional module comprises FPGA module, expansion connection module, A/D module, D/A module, I/O module, one-chip computer module and interconnecting module;
Described FPGA module is connected with expansion connection module;
Described expansion connection module, A/D module, D/A module, I/O module, one-chip computer module are connected with interconnecting module.
As improvement, described FPGA module is connected with expansion connection module by web member.
As improvement, described each functional module is arranged on base plate respectively by web member.
Described functional module also comprises programming amplifying module, and described programming amplifying module is connected with interconnecting module, is arranged on base plate by web member.
Described I/O module is made up of LED, matrix keyboard, hummer, toggle switch, digital-scroll technique circuit and liquid crystal display circuit.
Described liquid crystal display circuit is that LCD1602 and LCD12864 all provides interface.
The acp chip of described FPGA module is EP2C8Q208N.
The acp chip of described one-chip computer module is MC9S12X128.
The acp chip of described A/D module is AD9220.
The acp chip of described D/A module is AD9764.
Advantage of the present utility model and effect are:
The utility model discloses a kind of Electronic Design Competition training platform, existing FPGA module, there is one-chip computer module again, deviser can selectivity use wherein a kind of, or the combination of two kinds carrys out design circuit, can combine other each functional module according to demand, to complete or simply or the circuit design of complexity, possess dirigibility, during debugging, can also fault coverage be reduced, for localization of fault is saved time; Also be provided with interconnecting module, can avoid at substantial time and efforts in the connection of circuit, solve the time that existing Electronic Design Competition training platform too much expends deviser's connecting circuit and localization of fault, the problem of electronic design ability can not be fully demonstrated.
Accompanying drawing explanation
Fig. 1 is the block diagram of the utility model hardware design.
Embodiment
Below in conjunction with embodiment, the utility model is described in further detail, but the utility model is not limited to these embodiments.
Fig. 1 gives the block diagram of the utility model hardware design, in this embodiment, a kind of Electronic Design Competition training platform, be made up of casing, base plate and functional module, base plate is fixed on bottom half, and functional module is arranged on base plate, wherein, functional module comprises FPGA module, expansion connection module, A/D module, D/A module, I/O module, one-chip computer module and interconnecting module, and as improvement, functional module also comprises programming amplifying module.
FPGA module mainly adopts chip EP2C8Q208N and the configuring chip EPCS4 of altera corp.Whole I/O mouths of FPGA module are drawn, is connected with expansion connection module by web member.
The equivalent gate number of EP2C8Q208N chip is 420,000, and there is the memory capacity of 90KB inside, 6K logical block, 2 PLL, and cost is low, capacity is large, and has other properties more.
EPCS4 is a kind of series arrangement device, possess the advanced features such as in-system programmable components (ISP), flash memory access interface, small outline integrated circuit (SOIC) encapsulation, it is the real low cost solution of industry first, its ISP ability, improve the dirigibility of circuit design, can also access by massive store flash memory, its little outline packages saves valuable board area, the memory span of EPSC4 is 4Mbit, operating voltage is 2.7 ~ 3.6V, can download in JTAG and AS pattern.
Expansion connection module is connected to whole I/O mouths of FPGA module, and when carrying out Electronic Design, can pass through expansion connection module, and/or utilize the connection of connecting line practical function module and FPGA module, expansion connection module have employed standard I DC contact pin.Expansion connection module is connected with interconnecting module, is arranged on base plate by web member.
Before input signal delivers to A/D module, need carry out decaying or amplify adjustment through programming amplifying module, input signal is dropped in the input voltage range of A/D module, to measure and to observe.The gain flatness of programming amplifying module must will be got well, and the utility model selects LM6172 high speed dual operational amplifier, and bandwidth is 100MHz, switching rate 3000V/ μ s, and every passage current sinking 2.3mA, output current can reach 50mA.Programming amplifying module is connected with interconnecting module, is arranged on base plate by web member.
A/D module comprises two AD9220 high speed A/D conversion chips, and the switching rate of AD9220 is 40Msps, can meet the demand of high-speed data acquisition and process.A/D module is connected with interconnecting module, is arranged on base plate by web member.
D/A module comprises two AD9764 high speed D/A switch chips, and the switching rate of AD9764 is 105Msps, can meet the demand that high speed signal produces.D/A module is connected with interconnecting module, is arranged on base plate by web member.
I/O module is made up of LED, matrix keyboard, hummer, toggle switch, digital-scroll technique circuit and liquid crystal display circuit.Liquid crystal display circuit is that LCD1602 and LCD12864 all provides interface.I/O module is connected with interconnecting module, is arranged on base plate by web member.
The acp chip of one-chip computer module is 16 single-chip microcomputer MC9S12XS128, the bus speed of this model single-chip microcomputer reaches 40Mhz, configurable 8,10,12 ADC, the switching time of 3 μ s, embedded MSCAN module, enhancement mode SCI module and SPI module, have outstanding low power consumption characteristic, has the advantages that speed is fast, function is strong, low in energy consumption, cost is low.One-chip computer module is connected with interconnecting module, is arranged on base plate by web member.
Interconnecting module is provided with communication connections, the different annexation between each functional module can be realized, when changing the connected mode between functional module, without the need to dependence or without the need to relying on change connecting line completely, make the connected mode of intermodule simpler, avoid at substantial time and efforts in the connection of circuit, for the performance of the designed capacity of deviser's hardware and software provides condition.Interconnecting module is connected with A/D module, D/A module, I/O module, one-chip computer module and expansion connection module, is arranged on base plate by web member.
Use the Electronic Design Competition training platform that the utility model provides, both simple Electronic Design Competition training can have been done, as waveform generator, voltage acquisition, hummer sound frequency control etc., complicated Electronic Design Competition training can be done again, as digital storage oscilloscope, digit phase measuring instrument, digital frequency meter etc., the Electronic Design Competition training requirement of varying level can be met.
Design waveform generator, mainly uses FPGA module, D/A module and interconnecting module.By hardware and software, interconnecting module is arranged, can also connecting line be used as required to do perfect, the data output end of FPGA module is connected with the data input pin of D/A module, FPGA module has used counter and storer, data-signal is after treatment converted to analog signal output by D/A module, uses oscillograph can observe this simulating signal.
Design digital storage oscilloscope, main use programming amplifying module, A/D module, FPGA module, one-chip computer module, I/O module and interconnecting module.Equally, by hardware and software, interconnecting module is arranged, can also connecting line be used as required to do perfect, the output terminal of the matrix keyboard of I/O module is connected with one-chip computer module, one-chip computer module is connected with FPGA module, FPGA module is connected with A/D module, A/D module connects and programming amplifying module, the liquid crystal display circuit of FPGA and I/O module connects, principle of work is as follows: at matrix keyboard parameters, by the enlargement factor of one-chip computer module according to state modulator programming amplifying module, measured signal inputs to A/D module after programming amplifying resume module, single-chip microcomputer sends control command to FPGA module, by FPGA module control AD acquisition rate, read and store the signal data that AD collects, signal data exports liquid crystal display circuit display to after FPGA module process.

Claims (10)

1. an Electronic Design Competition training platform, is made up of casing, base plate and functional module, and described base plate is fixed on bottom half, and described functional module is arranged on base plate, it is characterized in that:
Described functional module comprises FPGA module, expansion connection module, A/D module, D/A module, I/O module, one-chip computer module and interconnecting module;
Described FPGA module is connected with expansion connection module;
Described expansion connection module, A/D module, D/A module, I/O module, one-chip computer module are connected with interconnecting module.
2. a kind of Electronic Design Competition training platform according to claim 1, is characterized in that: described FPGA module is connected with expansion connection module by web member.
3. a kind of Electronic Design Competition training platform according to claim 1, is characterized in that: described each functional module is arranged on base plate respectively by web member.
4. a kind of Electronic Design Competition training platform according to claim 1, is characterized in that: described functional module also comprises programming amplifying module, and described programming amplifying module is connected with interconnecting module, is arranged on base plate by web member.
5. according to a kind of Electronic Design Competition training platform in claim 1-4 described in any one, it is characterized in that: described I/O module is made up of LED, matrix keyboard, hummer, toggle switch, digital-scroll technique circuit and liquid crystal display circuit.
6. a kind of Electronic Design Competition training platform according to claim 5, is characterized in that: described liquid crystal display circuit is that LCD1602 and LCD12864 all provides interface.
7. a kind of Electronic Design Competition training platform according to claim 6, is characterized in that: the acp chip of described FPGA module is EP2C8Q208N.
8. a kind of Electronic Design Competition training platform according to claim 7, is characterized in that: the acp chip of described one-chip computer module is MC9S12X128.
9. a kind of Electronic Design Competition training platform according to claim 8, is characterized in that: the acp chip of described A/D module is AD9220.
10. a kind of Electronic Design Competition training platform according to claim 9, is characterized in that: the acp chip of described D/A module is AD9764.
CN201520315217.1U 2015-05-15 2015-05-15 A kind of Electronic Design Competition training platform Expired - Fee Related CN204650856U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520315217.1U CN204650856U (en) 2015-05-15 2015-05-15 A kind of Electronic Design Competition training platform

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520315217.1U CN204650856U (en) 2015-05-15 2015-05-15 A kind of Electronic Design Competition training platform

Publications (1)

Publication Number Publication Date
CN204650856U true CN204650856U (en) 2015-09-16

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201520315217.1U Expired - Fee Related CN204650856U (en) 2015-05-15 2015-05-15 A kind of Electronic Design Competition training platform

Country Status (1)

Country Link
CN (1) CN204650856U (en)

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150916

Termination date: 20160515