CN204214944U - A kind of general radio frequency condition monitoring and fault diagnosis warning device - Google Patents
A kind of general radio frequency condition monitoring and fault diagnosis warning device Download PDFInfo
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- CN204214944U CN204214944U CN201420762102.2U CN201420762102U CN204214944U CN 204214944 U CN204214944 U CN 204214944U CN 201420762102 U CN201420762102 U CN 201420762102U CN 204214944 U CN204214944 U CN 204214944U
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Abstract
The utility model discloses a kind of general radio frequency condition monitoring and fault diagnosis warning device, it relates to communication technical field.It comprises logarithmic detector module, signal processing module and signals collecting trigger circuit, logarithmic detector module is connected with signals collecting trigger circuit by signal processing module, and described logarithmic detector module, signal processing module and signals collecting trigger circuit are all arranged on the CPCI board of 6U.System of the present utility model is based on logarithmic detector, take FPGA as signal processing unit, by controlling the radiofrequency signal duty of glittering LED lamp instruction respective channel, reporting to the police by upper computer software when breaking down, and finding faulty channel RF signal power value.Whole system adopts standard modular design, and versatility is comparatively strong, and plug and play, has stable linear, wider dynamic range, good temperature performance simultaneously, can be applied in easily in relevant cabinet equipment.
Description
Technical field
The utility model relates to communication technical field, is specifically related to a kind of general radio frequency condition monitoring and fault diagnosis warning device.
Background technology
Along with developing rapidly of the communication technology, the application of radiofrequency signal is more and more extensive, and it is important that RF signal power monitoring also just seems more.Real-time power monitoring can allow user understand the duty of relevant device accurately.The method that RF signal power detects is varied, and also dragons and fishes jumbled together for the Related product on market.Some easy radio-frequency power monitoring devices, measuring accuracy is low, dynamic range is limited, measurement result is larger by such environmental effects; Meanwhile, the such as checkout equipment of frequency spectrograph one class, price is too expensive again, and volume is comparatively large, and function is too numerous and diverse, and inconvenience is embedded in system and uses.Generally speaking, be difficult to find a kind of plug and play, measure accurate, wieldy power monitoring and trouble-shooter.
Utility model content
Because the above-mentioned defect of prior art, the utility model provides a kind of and adopts standard modular design, versatility is stronger, the general radio frequency condition monitoring and fault diagnosis warning device of plug and play, with the CPCI board of 6U for framework, carry out modular design, realize multi-channel radio frequency signal real-time state monitoring, system is based on logarithmic detector, with FPGA(Field-Programmable Gate Array, i.e. field programmable gate array) be signal processing unit, by controlling the radiofrequency signal duty of glittering LED lamp instruction respective channel, report to the police by upper computer software when breaking down, and find faulty channel RF signal power value.
For achieving the above object, the utility model provides a kind of general radio frequency condition monitoring and fault diagnosis warning device, comprise: for the logarithmic detector module detected radiofrequency signal to be monitored, the signal exported for the treatment of logarithmic detector module also sends steering order signal processing module, for triggering the signals collecting trigger circuit of logarithmic detector module acquires radiofrequency signal to be monitored in time;
Described logarithmic detector module, signals collecting trigger circuit are all connected with signal processing module, and described logarithmic detector module, signal processing module and signals collecting trigger circuit are all arranged on the CPCI board of 6U.
Described logarithmic detector module comprises wave detector, amplifying circuit and A/D conversion chip for detecting radiofrequency signal to be monitored, the output terminal of described wave detector is connected with the input end of amplifying circuit, the output terminal of described amplifying circuit is connected with the input end of A/D conversion chip, the output terminal connection signal processing module of described A/D conversion chip.
Described signal processing module comprises the FPGA signal processing unit that the signal sent into for logarithmic detector module sends steering order, pci bridge chip, EEPROM, clock distribution, crystal oscillator, configuring chip, pilot lamp, level transferring chip and serial ports, described FPGA signal processing unit is connected with pci bridge chip by local bus, described crystal oscillator by clock distribution respectively with pci bridge chip, FPGA is connected, described FPGA signal processing unit is also connected with pci bridge chip by EEPROM, described pci bridge chip is connected with pci bus, described FPGA signal processing unit also with level transferring chip, configuring chip, pilot lamp is connected, described level transferring chip is connected with A/D conversion chip, described FPGA signal processing unit is connected with serial ports by level conversion.
A/D conversion chip needs trigger pip could start to gather simulating signal, signal in logarithmic detector module after amplifier is drawn, send into comparer AD8561, then the level signal exported is sent into FPGA signal processing unit, after FPGA signal processing unit processes, provide the trigger collection signal of AD574.
The output terminal of described amplifying circuit is also connected with comparer, the signals collecting trigger circuit described in described wave detector, amplifying circuit and comparer are formed, the output terminal connection signal processing module of described comparer.
The model that described comparer adopts is AD8561.
Described FPGA signal processing unit forms CPCI interface by a slice pci bridge chip.
The beneficial effects of the utility model: system is based on logarithmic detector, take FPGA as signal processing unit, by controlling the radiofrequency signal duty of glittering LED lamp instruction respective channel, reporting to the police by upper computer software when breaking down, and finding faulty channel RF signal power value.Whole system adopts standard modular design, and versatility is comparatively strong, and plug and play, has stable linear, wider dynamic range, good temperature performance simultaneously, can be applied in easily in relevant cabinet equipment.
Be described further below with reference to the technique effect of accompanying drawing to design of the present utility model, concrete structure and generation, to understand the purpose of this utility model, characteristic sum effect fully.
Accompanying drawing explanation
Fig. 1 is structured flowchart of the present utility model;
Fig. 2 is the structured flowchart of signal processing module of the present utility model;
Fig. 3 is the concrete schematic diagram of eight passage logarithmic detector modules in embodiment 1 of the present utility model;
Fig. 4 is the concrete schematic diagram of the signal processing module in embodiment 1 of the present utility model.
Fig. 5 is a part of detailed circuit diagram of signals collecting trigger circuit of the present utility model.
Embodiment
With reference to Fig. 1-Fig. 2, this embodiment by the following technical solutions: a kind of general radio frequency condition monitoring and fault diagnosis warning device, comprises logarithmic detector module 1, for detecting radiofrequency signal to be monitored;
Signal processing module 2, the signal exported for the treatment of logarithmic detector module also sends steering order, data are sent to host computer, simultaneously by controlling the power rating of pilot lamp display radiofrequency signal, to report to the police by upper computer software once break down, and find faulty channel RF signal power value;
Signals collecting trigger circuit 3, for triggering logarithmic detector module acquires radiofrequency signal to be monitored in time;
Described logarithmic detector module 1, signals collecting trigger circuit 3 are all connected with signal transacting mould 2 pieces, and described logarithmic detector module 1, signal processing module 2 and signals collecting trigger circuit 3 are all arranged on the CPCI board of 6U.
Described logarithmic detector module 1 comprises wave detector 11, amplifying circuit 12 and A/D conversion chip 13 for detecting radiofrequency signal to be monitored, the output terminal of described wave detector 11 is connected with the input end of amplifying circuit 12, the output terminal of described amplifying circuit 12 is connected with the input end of A/D conversion chip 13, the output terminal connection signal processing module 2 of described A/D conversion chip 13.
Described signal processing module 2 comprises the FPGA signal processing unit 21 that the signal sent into for logarithmic detector module sends steering order, pci bridge chip 22, EEPROM23, clock distribution 24, crystal oscillator 25, configuring chip 26, pilot lamp 27, level transferring chip 28 and serial ports 29, described FPGA signal processing unit 21 is connected with pci bridge chip 22 by local bus, described crystal oscillator 25 by clock distribution 24 respectively with pci bridge chip 22, FPGA signal processing unit 21 is connected, described FPGA signal processing unit 21 is also connected with pci bridge chip 22 by EEPROM23, described pci bridge chip 22 is connected with pci bus, described FPGA signal processing unit 21 also with level transferring chip 28, configuring chip 26, pilot lamp 27 is connected, described level transferring chip 28 is connected with A/D conversion chip 13, described FPGA signal processing unit 21 is connected with serial ports 29 by level conversion.
A/D conversion chip 13 needs trigger pip could start to gather simulating signal, signal in logarithmic detector module after amplifier is drawn, send into comparer AD8561, then the level signal exported is sent into the trigger collection signal providing AD574 after FPGA signal processing unit 21, FPGA signal processing unit 21 processes
The output terminal of described amplifying circuit 12 is also connected with comparer 31, and described wave detector 11, amplifying circuit 12 and comparer 31 form described signals collecting trigger circuit 3, the output terminal connection signal processing module 2 of described comparer 31.
The model that described comparer 31 adopts is AD8561.
Described FPGA signal processing unit 21 forms CPCI interface by a slice pci bridge chip 22.
In the present embodiment, the model that described comparer 33 adopts is AD8561, and in addition, FPGA21 forms CPCI interface by a slice pci bridge chip 22.
Embodiment 1: certain radio frequency cabinet needs the RF signal monitoring of one piece of general board realization to whole system.This board requires eight road radio frequency inputs, input radio frequency signal frequency is 2GHz-4GHz and 8G-18GHz two kinds, on board, the radiofrequency signal of each road input all has a status lamp corresponding, the power rating of real-time instruction radiofrequency signal, radiofrequency signal on the other hand after digital quantization, requirement can be delivered in real time on main control computer and show.As requested, with the CPCI board of 6U for version, modular design is carried out.
Fig. 3 is the concrete schematic diagram of eight passage logarithmic detector modules, wave detector adopts passive seismometer MDNT0204Z and MDNT0618Z of Nanjing Heng Jia electronics, be respectively signal frequency 2GHz-4GHz and the 8G-18GHz of requirement, standing wave is less than 1.5, sensitivity is greater than 500mv/mv, and available two screws are fixed on CPCI board.This wave detector part also can be made by oneself, and form detecting circuit with AD company AD831* family chip, logarithmic detector has good stable linear, wider dynamic and good temperature performance.Because the level exported through wave detector is less, have to pass through amplifier AD844, select 1 switch AD8184 and 2 to select 1 switch AD8180 through 4 successively, then send into A/D conversion chip AD574 and convert digital signal to.
Fig. 4 is the concrete schematic diagram of signal processing, digital signal after A/D conversion chip AD574 digital-to-analog conversion sends into a slice Spartan-6 chip XC6SLX9 and FPGA processor through level transferring chip MAX3245EAI, FPGA sends steering order according to the signal sent into, data are sent to host computer, simultaneously by controlling the power rating of pilot lamp display radiofrequency signal, status lamp extinguishes expression input radio frequency signal power input and is less than threshold value; Status lamp flicker represents that input radio frequency signal is within threshold value; The long bright expression input radio frequency signal of status lamp is greater than threshold value.FPGA is connected with CPCI interface by a slice pci bridge chip PCI9056, to report to the police, and find faulty channel RF signal power value once break down by upper computer software.
A/D conversion chip AD574 needs could start to gather simulating signal during trigger pip, signal in logarithmic detector module after amplifier is drawn, send into comparer AD8561, then the level signal exported is sent into FPGA, provide the trigger collection signal of A/D conversion chip AD574 after FPGA process, Fig. 5 is the detailed circuit diagram (part) of signals collecting trigger circuit.
This board power distribution can be divided into analog power and digital power two parts, digitally with is in analog connected with 0 Ω resistance single-point.The backboard of CPCI can provide analog power A+3.3V, A+5V, A+12V, A-12V and grounding pin.A+12V, A-12V power pin only has one, can be the electric current that board provides 500mA.Digital level part isolates digital level D+5V by A+5V through inductance SPM5030T-R35M.FPGA needs digital power level D+2.5V, D+1.0V, D+1.2V, according to the various voltage power consumptions of assessment, uses multiple Switching Power Supply and linear power supply, carries out secondary pressure, provide system to use to the digital level D+5V isolated.
The board of the present embodiment is the standard C PCI board of 6U, plug and play, insertion cabinet connection main control computer then forms a complete RF signal power monitoring system, specifically can need to change logarithmic detector according to project simultaneously, there is wider dynamic property, good stability, can be applied in associated radio frequency cabinet widely.
More than describe preferred embodiment of the present utility model in detail.Should be appreciated that those of ordinary skill in the art just can make many modifications and variations according to design of the present utility model without the need to creative work.Therefore, all technician in the art according to design of the present utility model on the basis of existing technology by the available technical scheme of logical analysis, reasoning, or a limited experiment, all should by the determined protection domain of claims.
Claims (6)
1. a general radio frequency condition monitoring and fault diagnosis warning device, it is characterized in that, it comprises: for the logarithmic detector module detected radiofrequency signal to be monitored, the signal exported for the treatment of logarithmic detector module also sends steering order signal processing module, for triggering the signals collecting trigger circuit of logarithmic detector module acquires radiofrequency signal to be monitored in time;
Described logarithmic detector module, signals collecting trigger circuit are all connected with signal processing module, and described logarithmic detector module, signal processing module and signals collecting trigger circuit are all arranged on the CPCI board of 6U.
2. a kind of general radio frequency condition monitoring and fault diagnosis warning device according to claim 1, it is characterized in that, described logarithmic detector module comprises wave detector, amplifying circuit and A/D conversion chip for detecting radiofrequency signal to be monitored, the output terminal of described wave detector is connected with the input end of amplifying circuit, the output terminal of described amplifying circuit is connected with the input end of A/D conversion chip, the output terminal connection signal processing module of described A/D conversion chip.
3. a kind of general radio frequency condition monitoring and fault diagnosis warning device according to claim 1, it is characterized in that, described signal processing module comprises the FPGA signal processing unit that the signal sent into for logarithmic detector module sends steering order, pci bridge chip, EEPROM, clock distribution, crystal oscillator, configuring chip, pilot lamp, level transferring chip and serial ports, described FPGA signal processing unit is connected with pci bridge chip by local bus, described crystal oscillator by clock distribution respectively with pci bridge chip, FPGA signal processing unit is connected, described FPGA signal processing unit is also connected with pci bridge chip by EEPROM, described pci bridge chip is connected with pci bus, described FPGA signal processing unit also with level transferring chip, configuring chip, pilot lamp is connected, described level transferring chip is connected with A/D conversion chip, described FPGA signal processing unit is connected with serial ports by level conversion.
4. a kind of general radio frequency condition monitoring and fault diagnosis warning device according to claim 2, it is characterized in that, the output terminal of described amplifying circuit is also connected with comparer, signals collecting trigger circuit described in described wave detector, amplifying circuit and comparer are formed, the output terminal connection signal processing module of described comparer.
5. a kind of general radio frequency condition monitoring and fault diagnosis warning device according to claim 4, is characterized in that, the model that described comparer adopts is AD8561.
6. a kind of general radio frequency condition monitoring and fault diagnosis warning device according to claim 3, is characterized in that, described FPGA signal processing unit forms CPCI interface by a slice pci bridge chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420762102.2U CN204214944U (en) | 2014-12-05 | 2014-12-05 | A kind of general radio frequency condition monitoring and fault diagnosis warning device |
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| CN201420762102.2U CN204214944U (en) | 2014-12-05 | 2014-12-05 | A kind of general radio frequency condition monitoring and fault diagnosis warning device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107741534A (en) * | 2017-11-03 | 2018-02-27 | 南京长峰航天电子科技有限公司 | A kind of target ship BIT monitorings and acoustooptic alarm system |
| CN108107412A (en) * | 2017-12-11 | 2018-06-01 | 南京长峰航天电子科技有限公司 | A kind of anti-saturation for the active boosters of RCS protects control device and method |
| CN112751622A (en) * | 2020-12-29 | 2021-05-04 | 北京航天时代光电科技有限公司 | Multifunctional S-band photoelectric transceiving system and method |
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2014
- 2014-12-05 CN CN201420762102.2U patent/CN204214944U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107741534A (en) * | 2017-11-03 | 2018-02-27 | 南京长峰航天电子科技有限公司 | A kind of target ship BIT monitorings and acoustooptic alarm system |
| CN108107412A (en) * | 2017-12-11 | 2018-06-01 | 南京长峰航天电子科技有限公司 | A kind of anti-saturation for the active boosters of RCS protects control device and method |
| CN108107412B (en) * | 2017-12-11 | 2021-12-14 | 南京长峰航天电子科技有限公司 | Anti-saturation protection control device and method for RCS active booster |
| CN112751622A (en) * | 2020-12-29 | 2021-05-04 | 北京航天时代光电科技有限公司 | Multifunctional S-band photoelectric transceiving system and method |
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