CN203405695U - Voltage controlled current signal generator of solar battery array simulator - Google Patents
Voltage controlled current signal generator of solar battery array simulator Download PDFInfo
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- CN203405695U CN203405695U CN201320492761.4U CN201320492761U CN203405695U CN 203405695 U CN203405695 U CN 203405695U CN 201320492761 U CN201320492761 U CN 201320492761U CN 203405695 U CN203405695 U CN 203405695U
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Abstract
The utility model relates to a voltage controlled current signal generator of a solar battery array simulator, comprising an FPGA controller having the input and output terminal connected with the input and output terminal of a DSP controller and the output terminal connected with the input terminal of a D/A converter; the output terminal of the D/A converter is in connection with the input terminal of a power adjusting circuit through a signal processing circuit; the output terminal of the power adjusting circuit is respectively in connection with the input terminals of a current sampling circuit and an address generator; the output terminal of the current sampling circuit is in connection with the input terminal of the signal processing circuit; the output terminal of the address generator is in connection with the input terminal of the FPGA controller. The voltage controlled current signal generator employs the FPGA controller as a master control chip; compared with a one-chip microcomputer and a DSP controller, the FPGA controller has much higher frequency and hardly has signal delay links in a control circuit, thereby effectively raising system dynamic response speed. The voltage controlled current signal generator has high application values for the design of a solar battery array simulator.
Description
Technical field
The utility model relates to the generation control field of solar battery array simulator reference signal, especially a kind of voltage controlled current signal generator of solar battery array simulator.
Background technology
Solar battery array simulator utilizes Circuits System to simulate the output characteristics that actual institute wants the solar battery array that obtains, and the simulated behavior of high-power complex illumination situation adopts numeric type solar battery array simulator, and its basic circuit topology is shown in Fig. 1.The variation of following output voltage due to the output current of solar cell changes, therefore the design of solar battery array simulator is a voltage-controlled current source of design in essence, take output current as controlled quentity controlled variable, power circuit is carried out to closed-loop control, thereby realize complicated characteristic, accurately simulate.As shown in Figure 1, system be take power converter 1 as hardware platform, makes the output of power converter simulate the output characteristics of the solar battery array under various varying environment conditions under the effect of dsp controller.The core of system is controlled function and is completed by dsp controller, with A/D converter, D/A converter and dsp controller, builds voltage controlled current signal generator 2, by reference to the programmable features of signal Ir, realizes simulator programming simulation function.For realizing good output accuracy and real time and dynamic energy, require reference signal to there is dynamic property and the stable state accuracy of real-Time Tracking Control.Visible, the design of the voltage controlled current signal generator of the reference signal that produce high precision, responds is fast the key link in numeric type solar battery array Simulator design.
The design of tradition voltage controlled current signal generator adopts lookup table mode to realize, and whole control procedure is completed by dsp controller.For improving real-time control performance, the numerically controlled algorithm of simplification that must be to a certain degree, reduces the calculated amount in controller, but will certainly reduce tracking control accuracy like this, thereby need the operand of reasonable distribution primary controller, output accuracy and dynamic real-time can on balance design.Solar battery array simulator will be realized good closed-loop control and real-time analog functuion, need to there be accurate sampling, good filtering and complicated control mode, adopt above-mentioned method for designing, the operand of dsp controller is excessive, system response time is slow, real-time is lower, cannot meet the fast dynamic response requirement of the high precision output of solar battery array simulator, need to adopt new implementation.
Utility model content
The purpose of this utility model is to provide a kind of voltage controlled current signal generator that can export the solar battery array simulator of high precision, the quick reference signal responding.
For achieving the above object, the utility model has adopted following technical scheme: a kind of voltage controlled current signal generator of solar battery array simulator, comprise FPGA controller, its input/output terminal is connected with the input/output terminal of dsp controller, its output terminal is connected with the input end of D/A converter, the output terminal of D/A converter is connected with the input end of power adjusting circuit by signal processing circuit, the output terminal of power adjusting circuit respectively with current sampling circuit, the input end of address generator is connected, the output terminal of current sampling circuit is connected with the input end of signal processing circuit, the output terminal of address generator is connected with the input end of FPGA controller.
The input/output terminal of described dsp controller has the PC of user-defined solar battery array I/V curve tables to be connected by interface circuit and internal memory.
Described address generator is comprised of voltage sample circuit and A/D converter, the input end of voltage sample circuit is connected with the output terminal of power adjusting circuit, the output terminal of voltage sample circuit is connected with the input end of A/D converter, and the output terminal of A/D converter is connected with the input end of FPGA controller.
Described FPGA controller adopts XC2V250 chip, FPGA controller is comprised of time-sequence control module, A/D control module, wave memorizer RAM, D/A control module and control bus interface module, the output terminal of described control bus interface module is connected with the input end of time-sequence control module, A/D control module, D/A control module respectively, and the output terminal of described time-sequence control module is connected with the input end of A/D control module, wave memorizer RAM, D/A control module respectively.
The input/output terminal of described control bus interface module is connected with the input/output terminal of dsp controller.
The input end of described A/D control module is connected with the output terminal of A/D converter, and described A/D converter adopts AD7666 chip.
The output terminal of described D/A control module is connected with the input end of D/A converter, and described D/A converter adopts AD5551 chip.
As shown from the above technical solution, the utility model adopts FPGA controller as main control chip, compares the very high frequency of FPGA controller with single-chip microcomputer with dsp controller, in control circuit, almost there is no signal delay link, effectively improved the dynamic responding speed of system; In addition, the utility model is directly changed Voltage-output through A/D converter, obtains numeral output, as the address of current reference table, carries out meter reading.By the data of reading, through D/A converter conversion, obtain current reference, adjust constant-current control circuit, significantly reduced the complicacy of controlling.Therefore, the utility model has good using value in the design of solar battery array simulator.
Accompanying drawing explanation
Fig. 1 is the circuit block diagram of existing numeric type solar battery array simulator.
Fig. 2 is circuit block diagram of the present utility model.
Fig. 3 is the circuit block diagram of FPGA controller in the utility model.
Fig. 4 is the circuit diagram of switching frequency test circuit of the present utility model.
Fig. 5 is the measured transient response waveform figure of Fig. 4.
Embodiment
A kind of voltage controlled current signal generator of solar battery array simulator, comprise FPGA controller 3, its input/output terminal is connected with the input/output terminal of dsp controller, its output terminal is connected with the input end of D/A converter, the output terminal of D/A converter is connected with the input end of power adjusting circuit by signal processing circuit, the output terminal of power adjusting circuit respectively with current sampling circuit, the input end of address generator 4 is connected, the output terminal of current sampling circuit is connected with the input end of signal processing circuit, the output terminal of address generator 4 is connected with the input end of FPGA controller 3.As shown in Figure 2.Current reference value is processed by signal processing circuit, carrying out error ratio with output current processes, through power adjusting circuit, regulate electric current output, realize closed-loop control, the working point of simulator is dropped on the solar battery array output I/V family curve that will simulate.
As shown in Figure 2, the input/output terminal of described dsp controller has the PC of user-defined solar battery array I/V curve tables to be connected by interface circuit and internal memory.Described address generator 4 is comprised of voltage sample circuit and A/D converter, the input end of voltage sample circuit is connected with the output terminal of power adjusting circuit, the output terminal of voltage sample circuit is connected with the input end of A/D converter, and the output terminal of A/D converter is connected with the input end of FPGA controller 3.The solar battery array I/V curve tables of dsp controller download user definition, simulated solar battery array output I/V family curve is carried out to discretize, contrast relationship according to voltage and current is made form, and current value is transferred to FPGA controller 3, be stored in wave memorizer RAM.Voltage sample circuit and A/D converter form address generator 4, when voltage sample circuit collects after voltage signal, send into A/D converter and be converted to corresponding digital quantity signal, quantification later contact potential series is sent in wave memorizer RAM, wave memorizer RAM is carried out to addressing, this sequence corresponds to corresponding address, and the corresponding data in address are exactly the quantized sequences of current reference signal.Because these data are digital quantity, therefore be converted into current reference value through D/A converter again.When output voltage changes, address generator 4 get the corresponding change of location data, can from wave memorizer RAM, take out corresponding current reference value thus.
As shown in Figure 3, described FPGA controller 3 adopts XC2V250 chip, FPGA controller 3 is comprised of time-sequence control module, A/D control module, wave memorizer RAM, D/A control module and control bus interface module, the output terminal of described control bus interface module is connected with the input end of time-sequence control module, A/D control module, D/A control module respectively, and the output terminal of described time-sequence control module is connected with the input end of A/D control module, wave memorizer RAM, D/A control module respectively.The input/output terminal of described control bus interface module is connected with the input/output terminal of dsp controller, and the input end of described A/D control module is connected with the output terminal of A/D converter, and the output terminal of described D/A control module is connected with the input end of D/A converter.Described A/D converter adopts AD7666 chip, and described D/A converter adopts AD5551 chip.
As shown in Figure 3, communication, data that control bus interface module is responsible between FPGA controller 3 and dsp controller connect and the control of dsp controller to FPGA controller 3, dsp controller is inputted reading and writing, initialization, is started the control signals such as collection to FPGA controller 3 internal modules by control bus interface module, and I/V family curve table is transferred to FPGA controller 3.Time-sequence control module is controlled sequential logic and the sample frequency of FPGA controller 3 inside, and sampling clock is obtained by FPGA controller 3 major clock frequency divisions, and corresponding modify is carried out in the instruction that in native system, sampling clock can send according to dsp controller simultaneously.A/D control module is controlled A/D converter, the control signal that can send according to dsp controller is selected different sample modes, under continuous sampling pattern, the voltage data collecting is tabled look-up as address, from wave memorizer RAM, take out corresponding current reference amount, under the control of D/A control module, complete D/A conversion.For reducing the control to FPGA controller 3 external resources, wave memorizer RAM is used the RAM carrying in 3 of FPGA controllers.Due to the processing speed of FPGA controller 3 from the speed of ram in slice reading out data much larger than dsp controller, so system transients performance greatly improves.
Below in conjunction with Fig. 2,3 pairs of the utility model, be further described.
The utility model take that what require Current Control precision is 0.1%, and the highest switching frequency of system adjustment is that 50kHz is example:
Adopt VHDL language to design, take full advantage of the memory resource of FPGA controller 3 inside, select the wave memorizer RAM of FPGA controller 3 inside as data-carrier store, storaging current reference data, can realize quick table lookup function.
The figure place of A/D converter and slewing rate have determined solar battery array simulator Control of Voltage precision and control rate to a certain extent.The utility model adopts 16 A/D converter AD7666 of ANALOG DEVICES company, and its switching rate is 500kSPS.For the A/D of 16, quantize 65536 grades of progression, visible, the voltage measurement precision of system can reach very high.
The figure place of D/A converter and slewing rate determine Current Control precision and control rate.The utility model adopts 14 bit serial inputs, the Voltage-output D/A converter AD5551 of ANALOG DEVICES company, and its maximum clock speed is 25MHz.
In the utility model, model machine circuit stable state output current test data the results are shown in Table 1:
Table 1 stable state output current test data
As can be seen from Table 1, the maximum error of Current Control is 0.077%, illustrates that circuit has good control accuracy.
For the adjustment characteristic of test macro at 50kHz switching frequency, adopt the transient response of switching frequency test circuit test macro as shown in Figure 4, Fig. 5 is test result, and wherein passage 2 is power tube V1 control signal, and passage 1 is model machine output voltage waveforms.
Visible, circuit can be realized the rapid adjustment of 50kHz, adopts the utility model, can make solar battery array simulator have good transient state adjustment capability.
Claims (7)
1. the voltage controlled current signal generator of a solar battery array simulator, it is characterized in that: comprise FPGA controller (3), its input/output terminal is connected with the input/output terminal of dsp controller, its output terminal is connected with the input end of D/A converter, the output terminal of D/A converter is connected with the input end of power adjusting circuit by signal processing circuit, the output terminal of power adjusting circuit respectively with current sampling circuit, the input end of address generator (4) is connected, the output terminal of current sampling circuit is connected with the input end of signal processing circuit, the output terminal of address generator (4) is connected with the input end of FPGA controller (3).
2. the voltage controlled current signal generator of solar battery array simulator according to claim 1, is characterized in that: the input/output terminal of described dsp controller has the PC of user-defined solar battery array I/V curve tables to be connected by interface circuit and internal memory.
3. the voltage controlled current signal generator of solar battery array simulator according to claim 1, it is characterized in that: described address generator (4) is comprised of voltage sample circuit and A/D converter, the input end of voltage sample circuit is connected with the output terminal of power adjusting circuit, the output terminal of voltage sample circuit is connected with the input end of A/D converter, and the output terminal of A/D converter is connected with the input end of FPGA controller (3).
4. the voltage controlled current signal generator of solar battery array simulator according to claim 3, it is characterized in that: described FPGA controller (3) adopts XC2V250 chip, FPGA controller (3) is by time-sequence control module, A/D control module, wave memorizer RAM, D/A control module and control bus interface module form, the output terminal of described control bus interface module respectively with time-sequence control module, A/D control module, the input end of D/A control module is connected, the output terminal of described time-sequence control module respectively with A/D control module, wave memorizer RAM, the input end of D/A control module is connected.
5. the voltage controlled current signal generator of solar battery array simulator according to claim 4, is characterized in that: the input/output terminal of described control bus interface module is connected with the input/output terminal of dsp controller.
6. the voltage controlled current signal generator of solar battery array simulator according to claim 4, is characterized in that: the input end of described A/D control module is connected with the output terminal of A/D converter, and described A/D converter adopts AD7666 chip.
7. the voltage controlled current signal generator of solar battery array simulator according to claim 4, is characterized in that: the output terminal of described D/A control module is connected with the input end of D/A converter, and described D/A converter adopts AD5551 chip.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103365234A (en) * | 2013-08-13 | 2013-10-23 | 中国电子科技集团公司第四十一研究所 | Voltage controlled current signal generator of solar cell array simulator |
| CN109240398A (en) * | 2018-09-18 | 2019-01-18 | 深圳市航天新源科技有限公司 | Solar battery array simulator working point control type I-V outer loop control method |
| CN109831158A (en) * | 2019-03-08 | 2019-05-31 | 信阳师范学院 | Use for laboratory perovskite solar battery MPPT maximum power point tracking test macro |
| CN110703835A (en) * | 2019-10-10 | 2020-01-17 | 深圳市航天新源科技有限公司 | I-V outer loop control method applied to solar cell array simulator |
-
2013
- 2013-08-13 CN CN201320492761.4U patent/CN203405695U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103365234A (en) * | 2013-08-13 | 2013-10-23 | 中国电子科技集团公司第四十一研究所 | Voltage controlled current signal generator of solar cell array simulator |
| CN103365234B (en) * | 2013-08-13 | 2016-04-20 | 中国电子科技集团公司第四十一研究所 | The voltage controlled current signal generator of solar battery array simulator |
| CN109240398A (en) * | 2018-09-18 | 2019-01-18 | 深圳市航天新源科技有限公司 | Solar battery array simulator working point control type I-V outer loop control method |
| CN109831158A (en) * | 2019-03-08 | 2019-05-31 | 信阳师范学院 | Use for laboratory perovskite solar battery MPPT maximum power point tracking test macro |
| CN109831158B (en) * | 2019-03-08 | 2020-03-31 | 信阳师范学院 | Maximum power point tracking test system for perovskite solar cell for laboratory |
| CN110703835A (en) * | 2019-10-10 | 2020-01-17 | 深圳市航天新源科技有限公司 | I-V outer loop control method applied to solar cell array simulator |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140122 Termination date: 20170813 |