CN204650334U - A kind of linear voltage regulator of ultra low quiescent power consumption - Google Patents
A kind of linear voltage regulator of ultra low quiescent power consumption Download PDFInfo
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- CN204650334U CN204650334U CN201520221486.1U CN201520221486U CN204650334U CN 204650334 U CN204650334 U CN 204650334U CN 201520221486 U CN201520221486 U CN 201520221486U CN 204650334 U CN204650334 U CN 204650334U
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Abstract
The utility model discloses a kind of linear voltage regulator of ultra low quiescent power consumption; comprise error amplifier, metal-oxide-semiconductor, feedback circuit, band-gap reference module, thermal-shutdown circuit module; described band-gap reference module pin comprises VIN, VTH1, VTH2, Vbias, Vref; described thermal-shutdown circuit module pin comprises VIN, Vbias, VTH1, VTH2, Temp_ctrl, and VTH1, VTH2, Vbias pin of described band-gap reference module is connected with VTH1, VTH2, Vbias pin of thermal-shutdown circuit module.The linear voltage regulator of a kind of ultra low quiescent power consumption that the utility model provides, there is when whole system normally works ultra low quiescent power consumption, significantly improve the cruising time of electronic product power source, minimum quiescent dissipation is 350nA, maximum quiescent dissipation is 600nA, extends the stand-by time of portable type electronic product.
Description
Technical field
The utility model relates to a kind of linear voltage regulator of ultra low quiescent power consumption, belongs to power management chip technical field.
Background technology
Along with the develop rapidly of portable type electronic product, power management chip system plays the part of more and more important role in mobile electronic product.In various power management chip system, low pressure difference linear voltage regulator is simple with its circuit structure, chip occupying area is little, high PSRR and low noise and other advantages, firmly in occupation of the share that power management market is very large, most systems all can integrated one and even multiple linear voltage regulator be powered for modules therein.Along with the day by day complicated of electronic product function and variation, consumption market is also improving constantly the requirement of its performance
But the quiescent dissipation of linear voltage regulator is larger in the market, and power-efficient is lower, the continuation of the journey requirement of portable type electronic product cannot be met.Along with the variation of electronic product function, also more and more higher to the requirement of power management chip system, especially reduce system power dissipation, improve the stand-by time of product.This also brings larger challenge to the design of linear voltage regulator.
Utility model content
Object: in order to overcome the deficiencies in the prior art, the utility model provides a kind of linear voltage regulator of ultra low quiescent power consumption.
Technical scheme: for solving the problems of the technologies described above, the technical solution adopted in the utility model is:
A linear voltage regulator for ultra low quiescent power consumption, comprises error amplifier, metal-oxide-semiconductor, feedback circuit, band-gap reference module, thermal-shutdown circuit module, described band-gap reference module pin comprises VIN, VTH1, VTH2, Vbias, Vref, described thermal-shutdown circuit module pin comprises VIN, Vbias, VTH1, VTH2, Temp_ctrl, the VTH1 of described band-gap reference module, VTH2, the VTH1 of Vbias pin and thermal-shutdown circuit module, VTH2, Vbias pin is connected, the VIN pin of described band-gap reference module is all connected with voltage input end with the VIN pin of thermal-shutdown circuit module, the Vref pin of described band-gap reference module is connected with the input end of error amplifier, the Temp_ctrl pin of described thermal-shutdown circuit module is connected with the Enable Pin of error amplifier, described error amplifier output is connected with metal-oxide-semiconductor grid, metal-oxide-semiconductor source electrode is connected with voltage input end, metal-oxide-semiconductor drain electrode is set to voltage output end, be parallel with feedback circuit between voltage output end and ground connection, described feedback circuit comprises the first feedback resistance, second feedback resistance, the first feedback resistance, second feedback resistance is in series, the first feedback resistance, be connected with another input end of error amplifier between second feedback resistance.
Described band-gap reference module comprises metal-oxide-semiconductor, triode, resistance, described metal-oxide-semiconductor comprises the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor, the 4th metal-oxide-semiconductor, the 5th metal-oxide-semiconductor, the 6th metal-oxide-semiconductor, the 7th metal-oxide-semiconductor, the 8th metal-oxide-semiconductor, described triode comprises: the first triode, the second triode, and described resistance comprises: the first resistance, the second resistance, the 3rd resistance, the 4th resistance, described first metal-oxide-semiconductor, the source electrode of the second metal-oxide-semiconductor all accesses voltage input end, the first metal-oxide-semiconductor, the grid of the second metal-oxide-semiconductor is connected, the first metal-oxide-semiconductor, drain electrode and the grid phase short circuit of the second metal-oxide-semiconductor, described first metal-oxide-semiconductor, the short circuit common point of the second metal-oxide-semiconductor is set to Vbias port, the first metal-oxide-semiconductor, second metal-oxide-semiconductor short circuit point respectively with the 3rd metal-oxide-semiconductor, the source electrode of the 4th metal-oxide-semiconductor is connected, the 3rd metal-oxide-semiconductor, the grid of the 4th metal-oxide-semiconductor is connected, drain electrode and the grid phase short circuit of the 4th metal-oxide-semiconductor, 4th metal-oxide-semiconductor short circuit common point is connected with the drain electrode of the 6th metal-oxide-semiconductor, drain electrode and the grid phase short circuit of the 5th metal-oxide-semiconductor, the drain electrode of the 3rd metal-oxide-semiconductor is connected with the short circuit common point of the 5th metal-oxide-semiconductor, 5th metal-oxide-semiconductor is connected with the grid of the 6th metal-oxide-semiconductor, drain electrode and the grid phase short circuit of the 7th metal-oxide-semiconductor, the source electrode of the 5th metal-oxide-semiconductor is connected with the short circuit common point of the 7th metal-oxide-semiconductor, the source electrode of the 6th metal-oxide-semiconductor is connected with the drain electrode of the 8th metal-oxide-semiconductor, the 7th metal-oxide-semiconductor, the grid of the 8th metal-oxide-semiconductor is connected, the 7th metal-oxide-semiconductor, 8th metal-oxide-semiconductor source electrode respectively with the first triode, the collector of the second triode is connected, the first triode, the base stage of the second triode is connected, base stage common point as Vref port, the first transistor emitter respectively with the second resistance, 3rd resistance, ground connection after 4th resistant series, the base stage of the first resistance and the first triode, emitter is in parallel, access after the second transistor emitter with the second resistance, 3rd resistance, 4th resistant series, second resistance lower end is as VTH2 port, and the 3rd resistance lower end is as VTH1 port.
Also comprise start-up circuit, described start-up circuit comprises the 9th metal-oxide-semiconductor, tenth metal-oxide-semiconductor, 11 metal-oxide-semiconductor, 9th metal-oxide-semiconductor source electrode access voltage input end, 9th metal-oxide-semiconductor, the tube grid of the tenth MOS is connected, 9th metal-oxide-semiconductor, tenth metal-oxide-semiconductor grid common point and the 7th metal-oxide-semiconductor, 8th metal-oxide-semiconductor grid common point is connected, 9th metal-oxide-semiconductor, the drain electrode of the tenth metal-oxide-semiconductor is connected, 9th metal-oxide-semiconductor, the drain electrode common point of the tenth metal-oxide-semiconductor is connected with the 11 metal-oxide-semiconductor grid, 11 metal-oxide-semiconductor drain electrode and the first metal-oxide-semiconductor, second metal-oxide-semiconductor grid common point is connected, tenth metal-oxide-semiconductor, the source grounding of the first metal-oxide-semiconductor.
Described thermal-shutdown circuit module comprises: the first transmission gate, second transmission gate, first phase inverter, second phase inverter, 3rd phase inverter, 4th phase inverter, 5th phase inverter, hex inverter, 7th phase inverter, 8th phase inverter, first Schmidt trigger, second Schmidt trigger, 12 metal-oxide-semiconductor, 3rd triode, the first transmission gate input end is connected with VTH1 port, and the second transmission gate input end is connected with VTH2 port, the first transmission gate, be connected with the base stage of the 3rd triode after the output terminal of the second transmission gate is connected, 12 metal-oxide-semiconductor source electrode access voltage input end, 12 metal-oxide-semiconductor grid is connected with Vbias port, 12 metal-oxide-semiconductor drain electrode is connected with the 3rd transistor collector, 3rd transistor emitter ground connection, the 12 metal-oxide-semiconductor drain electrode with the 3rd transistor collector common point successively with the first Schmidt trigger, first phase inverter, second phase inverter, second Schmidt trigger, 3rd phase inverter, 4th phase inverter, 5th phase inverter is in series, hex inverter, 7th phase inverter is in series, 5th inverter output is connected with hex inverter input end, hex inverter output terminal is connected with the second transmission gate Reverse Turning Control end, 7th inverter output is connected with the first transmission gate Reverse Turning Control end, 5th inverter output is connected with the 8th inverter input, 8th inverter input is connected with the second transmission gate forward control end, 8th inverter output is connected with the first transmission gate forward control end, and the 5th inverter output is as Temp_ctrl port.
Beneficial effect: the linear voltage regulator of a kind of ultra low quiescent power consumption that the utility model provides, is integrated with band-gap reference module, produces reference voltage from inside, improve level of integrated system, expanding systematic difference scope, without the need to being system supply reference voltage from outside, reducing the cost of system.And band-gap reference module is connected with thermal-shutdown circuit module, the threshold value of temperature protection, not by the variable effect of load, ensures that overheat protector module is not damaged in working temperature protection system when exceeding the threshold value determined of linear voltage regulator.Have ultra low quiescent power consumption when whole system normally works, significantly improve the cruising time of electronic product power source, minimum quiescent dissipation is 350nA, and maximum quiescent dissipation is 600nA, extends the stand-by time of portable type electronic product.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model;
Fig. 2 is the structural representation of band-gap reference module;
Fig. 3 is the structural representation of thermal-shutdown circuit module
Fig. 4 is current mirror, current source operating diagram.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further described.
As shown in Figure 1, a kind of linear voltage regulator of ultra low quiescent power consumption, comprises error amplifier 1, metal-oxide-semiconductor 2, feedback circuit 3, band-gap reference module 4, thermal-shutdown circuit module 5, described band-gap reference module 4 pin comprises VIN, VTH1, VTH2, Vbias, Vref, described thermal-shutdown circuit module 5 pin comprises VIN, Vbias, VTH1, VTH2, Temp_ctrl, the VTH1 of described band-gap reference module 4, VTH2, the VTH1 of Vbias pin and thermal-shutdown circuit module 5, VTH2, Vbias pin is connected, the VIN pin of described band-gap reference module 4 is all connected with voltage input end VIN with the VIN pin of thermal-shutdown circuit module 5, the Vref pin of described band-gap reference module 4 is connected with the input end of error amplifier 1, the Temp_ctrl pin of described thermal-shutdown circuit 5 module is connected with the Enable Pin of error amplifier 1, described error amplifier 1 output terminal is connected with metal-oxide-semiconductor 2 grid, metal-oxide-semiconductor 2 source electrode is connected with voltage input end VIN, metal-oxide-semiconductor 2 drain electrode is set to voltage output end VOUT, be parallel with feedback circuit 3 between voltage output end VOUT and ground connection, described feedback circuit 3 comprises the first feedback resistance 31, second feedback resistance 32, first feedback resistance 31, second feedback resistance 32 is in series, the first feedback resistance 31, be connected with another input end of error amplifier 1 between second feedback resistance 32.
As shown in Figure 2, described band-gap reference module comprises metal-oxide-semiconductor, triode, resistance, described metal-oxide-semiconductor comprises the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, the 3rd metal-oxide-semiconductor M3, the 4th metal-oxide-semiconductor M4, the 5th metal-oxide-semiconductor M5, the 6th metal-oxide-semiconductor M6, the 7th metal-oxide-semiconductor M7, the 8th metal-oxide-semiconductor M8, described triode comprises: the first triode T1, the second triode T2, and described resistance comprises: the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, described first metal-oxide-semiconductor M1, the source electrode of the second metal-oxide-semiconductor M2 all accesses voltage input end VIN, first metal-oxide-semiconductor M1, the grid of the second metal-oxide-semiconductor M2 is connected, first metal-oxide-semiconductor M1, drain electrode and the grid phase short circuit of the second metal-oxide-semiconductor M2, described first metal-oxide-semiconductor M1, the short circuit common point of the second metal-oxide-semiconductor M2 is set to Vbias port, first metal-oxide-semiconductor M1, second metal-oxide-semiconductor M2 short circuit point respectively with the 3rd metal-oxide-semiconductor M3, the source electrode of the 4th metal-oxide-semiconductor M4 is connected, 3rd metal-oxide-semiconductor M3, the grid of the 4th metal-oxide-semiconductor M4 is connected, drain electrode and the grid phase short circuit of the 4th metal-oxide-semiconductor M4, 4th metal-oxide-semiconductor M4 short circuit common point is connected with the drain electrode of the 6th metal-oxide-semiconductor M6, drain electrode and the grid phase short circuit of the 5th metal-oxide-semiconductor M5, the drain electrode of the 3rd metal-oxide-semiconductor M3 is connected with the short circuit common point of the 5th metal-oxide-semiconductor M5, 5th metal-oxide-semiconductor M5 is connected with the grid of the 6th metal-oxide-semiconductor M6, drain electrode and the grid phase short circuit of the 7th metal-oxide-semiconductor M7, the source electrode of the 5th metal-oxide-semiconductor M5 is connected with the short circuit common point of the 7th metal-oxide-semiconductor M7, the source electrode of the 6th metal-oxide-semiconductor M6 is connected with the drain electrode of the 8th metal-oxide-semiconductor M8, 7th metal-oxide-semiconductor M7, the grid of the 8th metal-oxide-semiconductor M8 is connected, 7th metal-oxide-semiconductor M7, 8th metal-oxide-semiconductor M8 source electrode respectively with the first triode T1, the collector of the second triode T2 is connected, first triode T1, the base stage of the second triode T2 is connected, base stage common point is as Vref port, first triode T1 emitter respectively with the second resistance R2, 3rd resistance R3, ground connection after 4th resistance R4 connects, the base stage of the first resistance R1 and the first triode T1, emitter is in parallel, access after the second triode T2 emitter with the second resistance R2, 3rd resistance R3, 4th resistance R4 connects, second resistance R2 lower end is as VTH2 port, and the 3rd resistance R3 lower end is as VTH1 port.Also comprise start-up circuit 6, described start-up circuit 6 comprises the 9th metal-oxide-semiconductor M9, tenth metal-oxide-semiconductor M10, 11 metal-oxide-semiconductor M11, 9th metal-oxide-semiconductor M9 source electrode access voltage input end VIN, 9th metal-oxide-semiconductor M9, the tube grid of the tenth metal-oxide-semiconductor M10 is connected, 9th metal-oxide-semiconductor M9, tenth metal-oxide-semiconductor M10 grid common point and the 7th metal-oxide-semiconductor M7, 8th metal-oxide-semiconductor M8 grid common point is connected, 9th metal-oxide-semiconductor M9, the drain electrode of the tenth metal-oxide-semiconductor M10 is connected, 9th metal-oxide-semiconductor M9, the drain electrode common point of the tenth metal-oxide-semiconductor M10 is connected with the 11 metal-oxide-semiconductor M11 grid, 11 metal-oxide-semiconductor M11 drains and the first metal-oxide-semiconductor M1, second metal-oxide-semiconductor M2 grid common point is connected, tenth metal-oxide-semiconductor M10, the source grounding of the first metal-oxide-semiconductor M1.
As shown in Figure 3, described thermal-shutdown circuit module comprises: the first transmission gate W1, second transmission gate W2, first phase inverter I1, second phase inverter I2, 3rd phase inverter I3, 4th phase inverter I4, 5th phase inverter I5, hex inverter I6, 7th phase inverter I7, 8th phase inverter I8, first Schmidt trigger S1, second Schmidt trigger S2, 12 metal-oxide-semiconductor M12, 3rd triode T3, the first transmission gate W1 input end is connected with VTH1 port, and the second transmission gate W2 input end is connected with VTH2 port, the first transmission gate W1, be connected with the base stage of the 3rd triode T3 after the output terminal of the second transmission gate W2 is connected, 12 metal-oxide-semiconductor M12 source electrode access voltage input end VIN, 12 metal-oxide-semiconductor M12 grid is connected with Vbias port, 12 metal-oxide-semiconductor M12 drain electrode is connected with the 3rd triode T3 collector, 3rd triode T3 grounded emitter, the 12 metal-oxide-semiconductor M12 drain with the 3rd triode T3 collector common point successively with the first Schmidt trigger S1, first phase inverter I1, second phase inverter I2, second Schmidt trigger S2, 3rd phase inverter I3, 4th phase inverter I4, 5th phase inverter I5 is in series, hex inverter I6, 7th phase inverter I7 is in series, 5th phase inverter I5 output terminal is connected with hex inverter I6 input end, hex inverter I6 output terminal is connected with the second transmission gate W2 Reverse Turning Control end, 7th phase inverter I7 output terminal is connected with the first transmission gate W1 Reverse Turning Control end, 5th phase inverter I5 output terminal is connected with the 8th phase inverter I8 input end, 8th phase inverter I8 input end is connected with the second transmission gate W2 forward control end, 8th phase inverter I8 output terminal is connected with the first transmission gate W1 forward control end, and the 5th phase inverter I5 output terminal is as Temp_ctrl port.
Specific works mode is as follows: the utility model by band-gap reference module integration to internal system.Major part band-gap reference circuit all adopts operational amplifier to carry out practical function.For ultralow-power-consulinear linear voltage stabilizer, operational amplifier will consume very large quiescent current.Band-gap reference module adopts a kind of structure of automatic biasing to provide DC reference voltage for whole linear voltage regulator, significantly can reduce the sensitivity of output voltage with mains voltage variations of band-gap reference.The difference of reference voltage and output feedack voltage is amplified with adjustment System duty by error amplifier, and thermal-shutdown circuit module protection system is not damaged because working temperature is too high.
As shown in Figure 4, the band-gap reference module input current of the utility model design is directly related with the output current of mirror current source.The feedback control loop of this connection has stable working point, and the sensitivity of electric current opposed power change in voltage in loop is very low.The input current of whole loop and output current are by current mirror above and current source co-controlling below.From the angle of current mirror, when the breadth length ratio of current mirror is equal, input current should be equal with output current; From the angle of current source, when input current changes within the specific limits, output current and its be independently substantially.The working point of electric current must meet two constraint conditions simultaneously, therefore must be positioned in the focus of two curves.When output current becomes large, also can correspondingly be increased by the input current of current mirror.Like this, whole loop will lean on the original change increasing output current further to realize for the reaction of the original change of output current.That is, the connected mode of band-gap reference module constitutes a positive feedback, and loop gain is exactly the gain of current source.For ensureing circuit stability, need to make loop gain be less than 1.In the linear voltage regulator of ultra low quiescent power consumption, because the electric current of circuit working is very little, loop gain can be easy to remain on below unity gain.
For preventing band-gap reference module work in zero current condition, need to add start-up circuit.When the electric current in circuit is zero, the grid of the tenth metal-oxide-semiconductor is low-voltage, and the 9th metal-oxide-semiconductor conducting, moves the grid of the 11 metal-oxide-semiconductor to high level, thus makes its conducting, and moves the grid of the first metal-oxide-semiconductor to low level, and make its conducting, therefore circuit is started working.When the grid voltage of the tenth metal-oxide-semiconductor be elevated to make its conducting time, the 9th metal-oxide-semiconductor turns off, and the tenth metal-oxide-semiconductor conducting, moves the grid potential of the 11 metal-oxide-semiconductor to low level, thus turns off start-up circuit.
The thermal-shutdown circuit module that great majority are conventional is all from output terminal sampled voltage; but this structure is when the load; output voltage can change due to load transient response, and this can affect the degree of accuracy of sampled voltage, thus causes the changes of threshold of temperature protection.The thermal-shutdown circuit of the utility model design carries out sampling first threshold voltage V from band-gap reference module
tH1with Second Threshold voltage V
tH2and be input to the base stage of the 3rd triode as temperature sensing device, because bandgap voltage reference does not change with the change of system load, thus make the threshold voltage V of temperature protection
tH1with V
tH2keep stable.The band-gap reference circuit structure that the utility model provides adopts NPN triode, can, directly for the 3rd triode provides electric current, therefore not need to add first-level buffer to drive in centre.First threshold voltage end and Second Threshold voltage end are as two dividing potential drops of reference voltage; respectively as two input voltages of thermal-shutdown circuit module; be input to the base stage of temperature sense triode through transmission gate, from triode out after voltage signal to return and as the control signal of transmission gate through a series of logical circuit.
Under normal temperature working environment, shown in institute Fig. 3, A point is high level; the temperature control signals output terminal of thermal-shutdown circuit module is low level; now the first transmission gate conducting, the second transmission gate cut-off, the base voltage of the 3rd triode is the output voltage of first threshold voltage end.Output voltage due to first threshold voltage end is less than the 3rd forward voltage between transistor base and emitter, and therefore the 3rd triode is in closed condition, and whole linear voltage regulator normally works; Time on the maximum temperature that linear voltage stabilization actuator temperature is elevated to normal work, because between the base stage of the 3rd triode and emitter, forward voltage has negative temperature coefficient, decline with the rising of temperature.Time under the output voltage that forward voltage is reduced to first threshold voltage end; 3rd triode ON; A upset is low level; the output control terminal upset of thermal-shutdown circuit is high level; the whole conducting of nmos switch pipe of the whole linear voltage regulator system that it controls; the drain electrode of these nmos switch pipes is connected to the grid of NMOS tube in linear voltage regulator system; source electrode is connected to ground; therefore all dragged down by the grid voltage of intrasystem for linear voltage regulator NMOS tube, whole linear voltage regulator system turns off.Now, the first transmission gate is closed, and the second transmission gate conducting, the base voltage of the 3rd triode becomes the output voltage of Second Threshold voltage end.Due to the output voltage of the output voltage > first threshold voltage end of Second Threshold voltage end; 3rd triode keeps conducting; thermal-shutdown circuit works on, and whole linear voltage regulator system continues to turn off, so the temperature of whole system starts to decline.When temperature drops to that between the base stage of the 3rd triode and emitter, forward voltage is greater than the output voltage of Second Threshold voltage end, 3rd triode turns off, A point voltage raises, temperature control signals output end signal becomes low level, each nmos switch pipe Close All of whole linear voltage regulator system, circuit recovers normal work.Now, the second transmission gate is closed, and the first transmission gate is opened, and the base voltage upset of the 3rd triode is the output voltage of first threshold voltage end, and triode continues to keep closing.Because the output voltage of the output voltage > first threshold voltage end of Second Threshold voltage end-; when linear voltage regulator circuit reopens, will to drop to the open temp of thermal-shutdown circuit when raising than temperature also low for temperature, can ensure that linear voltage regulator circuit can not at temperature spot switch repeatedly like this.
The above is only preferred implementation of the present utility model; be noted that for those skilled in the art; under the prerequisite not departing from the utility model principle; can also make some improvements and modifications, these improvements and modifications also should be considered as protection domain of the present utility model.
Claims (4)
1. a linear voltage regulator for ultra low quiescent power consumption, comprises error amplifier, metal-oxide-semiconductor, feedback circuit, is characterized in that: also comprise band-gap reference module, thermal-shutdown circuit module, described band-gap reference module pin comprises VIN, VTH1, VTH2, Vbias, Vref, described thermal-shutdown circuit module pin comprises VIN, Vbias, VTH1, VTH2, Temp_ctrl, the VTH1 of described band-gap reference module, VTH2, the VTH1 of Vbias pin and thermal-shutdown circuit module, VTH2, Vbias pin is connected, the VIN pin of described band-gap reference module is all connected with voltage input end with the VIN pin of thermal-shutdown circuit module, the Vref pin of described band-gap reference module is connected with the input end of error amplifier, the Temp_ctrl pin of described thermal-shutdown circuit module is connected with the Enable Pin of error amplifier, described error amplifier output is connected with metal-oxide-semiconductor grid, metal-oxide-semiconductor source electrode is connected with voltage input end, metal-oxide-semiconductor drain electrode is set to voltage output end, be parallel with feedback circuit between voltage output end and ground connection, described feedback circuit comprises the first feedback resistance, second feedback resistance, the first feedback resistance, second feedback resistance is in series, the first feedback resistance, be connected with another input end of error amplifier between second feedback resistance.
2. the linear voltage regulator of a kind of ultra low quiescent power consumption according to claim 1, it is characterized in that: described band-gap reference module comprises metal-oxide-semiconductor, triode, resistance, described metal-oxide-semiconductor comprises the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor, the 4th metal-oxide-semiconductor, the 5th metal-oxide-semiconductor, the 6th metal-oxide-semiconductor, the 7th metal-oxide-semiconductor, the 8th metal-oxide-semiconductor, described triode comprises: the first triode, the second triode, and described resistance comprises: the first resistance, the second resistance, the 3rd resistance, the 4th resistance, described first metal-oxide-semiconductor, the source electrode of the second metal-oxide-semiconductor all accesses voltage input end, the first metal-oxide-semiconductor, the grid of the second metal-oxide-semiconductor is connected, the first metal-oxide-semiconductor, drain electrode and the grid phase short circuit of the second metal-oxide-semiconductor, described first metal-oxide-semiconductor, the short circuit common point of the second metal-oxide-semiconductor is set to Vbias port, the first metal-oxide-semiconductor, second metal-oxide-semiconductor short circuit point respectively with the 3rd metal-oxide-semiconductor, the source electrode of the 4th metal-oxide-semiconductor is connected, the 3rd metal-oxide-semiconductor, the grid of the 4th metal-oxide-semiconductor is connected, drain electrode and the grid phase short circuit of the 4th metal-oxide-semiconductor, 4th metal-oxide-semiconductor short circuit common point is connected with the drain electrode of the 6th metal-oxide-semiconductor, drain electrode and the grid phase short circuit of the 5th metal-oxide-semiconductor, the drain electrode of the 3rd metal-oxide-semiconductor is connected with the short circuit common point of the 5th metal-oxide-semiconductor, 5th metal-oxide-semiconductor is connected with the grid of the 6th metal-oxide-semiconductor, drain electrode and the grid phase short circuit of the 7th metal-oxide-semiconductor, the source electrode of the 5th metal-oxide-semiconductor is connected with the short circuit common point of the 7th metal-oxide-semiconductor, the source electrode of the 6th metal-oxide-semiconductor is connected with the drain electrode of the 8th metal-oxide-semiconductor, the 7th metal-oxide-semiconductor, the grid of the 8th metal-oxide-semiconductor is connected, the 7th metal-oxide-semiconductor, 8th metal-oxide-semiconductor source electrode respectively with the first triode, the collector of the second triode is connected, the first triode, the base stage of the second triode is connected, base stage common point as Vref port, the first transistor emitter respectively with the second resistance, 3rd resistance, ground connection after 4th resistant series, the base stage of the first resistance and the first triode, emitter is in parallel, access after the second transistor emitter with the second resistance, 3rd resistance, 4th resistant series, second resistance lower end is as VTH2 port, and the 3rd resistance lower end is as VTH1 port.
3. the linear voltage regulator of a kind of ultra low quiescent power consumption according to claim 2, it is characterized in that: also comprise start-up circuit, described start-up circuit comprises the 9th metal-oxide-semiconductor, tenth metal-oxide-semiconductor, 11 metal-oxide-semiconductor, 9th metal-oxide-semiconductor source electrode access voltage input end, 9th metal-oxide-semiconductor, the tube grid of the tenth MOS is connected, 9th metal-oxide-semiconductor, tenth metal-oxide-semiconductor grid common point and the 7th metal-oxide-semiconductor, 8th metal-oxide-semiconductor grid common point is connected, 9th metal-oxide-semiconductor, the drain electrode of the tenth metal-oxide-semiconductor is connected, 9th metal-oxide-semiconductor, the drain electrode common point of the tenth metal-oxide-semiconductor is connected with the 11 metal-oxide-semiconductor grid, 11 metal-oxide-semiconductor drain electrode and the first metal-oxide-semiconductor, second metal-oxide-semiconductor grid common point is connected, tenth metal-oxide-semiconductor, the source grounding of the first metal-oxide-semiconductor.
4. the linear voltage regulator of a kind of ultra low quiescent power consumption according to Claims 2 or 3, is characterized in that: described thermal-shutdown circuit module comprises: the first transmission gate, second transmission gate, first phase inverter, second phase inverter, 3rd phase inverter, 4th phase inverter, 5th phase inverter, hex inverter, 7th phase inverter, 8th phase inverter, first Schmidt trigger, second Schmidt trigger, 12 metal-oxide-semiconductor, 3rd triode, the first transmission gate input end is connected with VTH1 port, and the second transmission gate input end is connected with VTH2 port, the first transmission gate, be connected with the base stage of the 3rd triode after the output terminal of the second transmission gate is connected, 12 metal-oxide-semiconductor source electrode access voltage input end, 12 metal-oxide-semiconductor grid is connected with Vbias port, 12 metal-oxide-semiconductor drain electrode is connected with the 3rd transistor collector, 3rd transistor emitter ground connection, the 12 metal-oxide-semiconductor drain electrode with the 3rd transistor collector common point successively with the first Schmidt trigger, first phase inverter, second phase inverter, second Schmidt trigger, 3rd phase inverter, 4th phase inverter, 5th phase inverter is in series, hex inverter, 7th phase inverter is in series, 5th inverter output is connected with hex inverter input end, hex inverter output terminal is connected with the second transmission gate Reverse Turning Control end, 7th inverter output is connected with the first transmission gate Reverse Turning Control end, 5th inverter output is connected with the 8th inverter input, 8th inverter input is connected with the second transmission gate forward control end, 8th inverter output is connected with the first transmission gate forward control end, and the 5th inverter output is as Temp_ctrl port.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520221486.1U CN204650334U (en) | 2015-04-13 | 2015-04-13 | A kind of linear voltage regulator of ultra low quiescent power consumption |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105867503A (en) * | 2016-06-03 | 2016-08-17 | 矽力杰半导体技术(杭州)有限公司 | Reference voltage source circuit and reference voltage control method |
| CN109164864A (en) * | 2018-09-29 | 2019-01-08 | 西安微电子技术研究所 | A kind of line construction and control method reducing LDO power supply quiescent current |
| CN112764450A (en) * | 2021-04-08 | 2021-05-07 | 坤元微电子(南京)有限公司 | Reference voltage source circuit and low dropout regulator |
| CN113381383A (en) * | 2020-11-12 | 2021-09-10 | 深圳市视景达科技有限公司 | Over-temperature protection circuit, method and system for LDO system |
| CN114253337A (en) * | 2021-12-08 | 2022-03-29 | 电子科技大学 | Band-gap reference circuit integrating over-temperature protection and resistance trimming protection functions |
| CN114860019A (en) * | 2021-12-13 | 2022-08-05 | 无锡市晶源微电子有限公司 | Reference voltage source capable of effectively inhibiting temperature drift |
| CN116736925A (en) * | 2022-12-21 | 2023-09-12 | 无锡迈尔斯通集成电路有限公司 | Zero-current high-precision enabling circuit |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105867503A (en) * | 2016-06-03 | 2016-08-17 | 矽力杰半导体技术(杭州)有限公司 | Reference voltage source circuit and reference voltage control method |
| CN109164864A (en) * | 2018-09-29 | 2019-01-08 | 西安微电子技术研究所 | A kind of line construction and control method reducing LDO power supply quiescent current |
| CN113381383A (en) * | 2020-11-12 | 2021-09-10 | 深圳市视景达科技有限公司 | Over-temperature protection circuit, method and system for LDO system |
| CN113381383B (en) * | 2020-11-12 | 2021-11-23 | 深圳市视景达科技有限公司 | Over-temperature protection circuit, method and system for LDO system |
| CN112764450A (en) * | 2021-04-08 | 2021-05-07 | 坤元微电子(南京)有限公司 | Reference voltage source circuit and low dropout regulator |
| CN114253337A (en) * | 2021-12-08 | 2022-03-29 | 电子科技大学 | Band-gap reference circuit integrating over-temperature protection and resistance trimming protection functions |
| CN114860019A (en) * | 2021-12-13 | 2022-08-05 | 无锡市晶源微电子有限公司 | Reference voltage source capable of effectively inhibiting temperature drift |
| CN114860019B (en) * | 2021-12-13 | 2023-09-19 | 无锡市晶源微电子股份有限公司 | Reference voltage source capable of effectively inhibiting temperature drift |
| CN116736925A (en) * | 2022-12-21 | 2023-09-12 | 无锡迈尔斯通集成电路有限公司 | Zero-current high-precision enabling circuit |
| CN116736925B (en) * | 2022-12-21 | 2024-03-12 | 无锡迈尔斯通集成电路有限公司 | Zero-current high-precision enabling circuit |
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