CN204595161U - The FT proving installation of mouse chip - Google Patents

The FT proving installation of mouse chip Download PDF

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Publication number
CN204595161U
CN204595161U CN201520292597.1U CN201520292597U CN204595161U CN 204595161 U CN204595161 U CN 204595161U CN 201520292597 U CN201520292597 U CN 201520292597U CN 204595161 U CN204595161 U CN 204595161U
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Prior art keywords
relay
connects
port
microprocessor
mouse chip
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CN201520292597.1U
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Chinese (zh)
Inventor
姬起群
谭一成
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Jiangsu Juxin integrated circuit technology Limited by Share Ltd
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Nst Chip Technology Ltd
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Abstract

The utility model provides a kind of FT proving installation of mouse chip, comprising: the IO1 port of microprocessor U1 connects the input end anode of photoelectrical coupler U2, the input end plus earth of photoelectrical coupler U2 by resistance R1; The output terminal collector of electric coupler U2 connects the Key pad port of mouse chip U3, output terminal grounded emitter; The IO2 port of microprocessor U1 connects the base stage of triode Q1, the grounded emitter of triode Q1 by resistance R2, one end of collector connecting relay KA1 coil, another termination supply voltage of relay K A1 coil; The normally closed contact of relay K A1 is unsettled, and common port is for connecting the function pin of a needs test of mouse chip U3; The normally opened contact of relay K A1 connects the voltage sample port of microprocessor U1, and connects supply voltage by current-limiting resistance R4; The ground pin ground connection of mouse chip U3; There is practicality good, cost performance advantages of higher.

Description

The FT proving installation of mouse chip
Technical field
The utility model relates to a kind of apparatus for testing chip, especially a kind of proving installation of mouse chip.
Background technology
FT(Final Test) be important step before integrated circuit puts goods on the market, authenticity, the reliability of test result will directly have influence on product quality and corporate reputation.Relative to CP(Chip Probing) test, FT test is more comprehensive, can carry out OS test and function items test to the chip after encapsulation.OS(Open-Short) test the protection diode of function pin to power pin and ground pin being used for testing mouse chip and whether there is open circuit (Open) or short circuit (Short) defect.
As shown in Figure 1, the function pin (other pin beyond power pin and ground pin) of mouse chip is connected to protection diode D1 and D2 respectively to the power pin of mouse chip and ground pin; The forward voltage of testing this two protections diode can judge whether these two diodes puncture or alloy wire exception.
Summary of the invention
The utility model provides a kind of FT proving installation of mouse chip; can the pressing and unclamp of mechanical key on analog mouse by the conducting of photoelectrical coupler and cut-off, the protection diode of mouse chip function pin to power pin and ground pin can also be tested and whether there is open circuit or circuit defect.The technical solution adopted in the utility model is:
A FT proving installation for mouse chip, comprising:
Microprocessor U1, photoelectrical coupler U2, relay K A1 and KA2, NPN triode Q1 and Q2;
The IO1 port of microprocessor U1 connects the input end anode of photoelectrical coupler U2, the input end plus earth of photoelectrical coupler U2 by resistance R1; The output terminal collector of photoelectrical coupler U2 connects the Key pad port of mouse chip U3, output terminal grounded emitter;
The IO2 port of microprocessor U1 connects the base stage of triode Q1, the grounded emitter of triode Q1 by resistance R2, one end of collector connecting relay KA1 coil, another termination supply voltage of relay K A1 coil; The normally closed contact of relay K A1 is unsettled, and common port is for connecting the function pin of a needs test of mouse chip U3; The normally opened contact of relay K A1 connects the voltage sample port of microprocessor U1, and connects supply voltage by current-limiting resistance R4; The ground pin ground connection of mouse chip U3;
The IO3 port of microprocessor U1 connects the base stage of triode Q2, the grounded emitter of triode Q2 by resistance R3, one end of collector connecting relay KA2 coil, another termination supply voltage of relay K A2 coil; The normally closed contact of relay K A2 connects supply voltage, normally opened contact ground connection; The power pin of the public termination mouse chip U3 of relay K A2.
The value of current-limiting resistance R4 is 47k ohm.
A FT proving installation for mouse chip, comprising:
Microprocessor U201, relay K A201, NPN triode Q201;
The IO2 port of microprocessor U201 connects the base stage of triode Q201, the grounded emitter of triode Q201 by resistance R202, one end of collector connecting relay KA201 coil, another termination supply voltage of relay K A201 coil; The normally closed contact of relay K A201 is unsettled, normally opened contact ground connection, and common port is for connecting the function pin of a needs test of mouse chip U3; The ground pin of mouse chip U3 connects supply voltage by current-limiting resistance R204, and the ground pin of mouse chip U3 connects the voltage sample port of microprocessor U201.
The value of current-limiting resistance R204 is 47k ohm.
The utility model has the advantage of: circuit is simple and reliable; test function is complete, can test the protection diode of mouse chip function pin to power pin and ground pin and whether there is open circuit or circuit defect, compared with special OS testing tool; there is practicality good, cost performance advantages of higher.
Accompanying drawing explanation
The function pin that Fig. 1 is mouse chip of the present utility model is connect protection diode schematic diagram.
Fig. 2 is embodiment one electrical schematic diagram of the present utility model.
Fig. 3 is embodiment two electrical schematic diagram of the present utility model.
Embodiment
Below in conjunction with concrete drawings and Examples, the utility model is described in further detail.
Embodiment one, the FT proving installation of the mouse chip that the utility model provides, as shown in Figure 2, comprising:
Microprocessor U1, photoelectrical coupler U2, relay K A1 and KA2, NPN triode Q1 and Q2;
The IO1 port of microprocessor U1 connects the input end anode of photoelectrical coupler U2, the input end plus earth of photoelectrical coupler U2 by resistance R1; The output terminal collector of photoelectrical coupler U2 connects the Key pad port (the KEY port namely in figure) of mouse chip U3, output terminal grounded emitter;
The IO2 port of microprocessor U1 connects the base stage of triode Q1, the grounded emitter of triode Q1 by resistance R2, one end of collector connecting relay KA1 coil, another termination supply voltage (such as+5v) of relay K A1 coil; The normally closed contact of relay K A1 is unsettled, and common port, for connecting the function pin of a needs test of mouse chip U3, is the LED pipe pin being connected to U3 in this example; The normally opened contact of relay K A1 connects the voltage sample port (the AD port in figure) of microprocessor U1, and connects supply voltage by current-limiting resistance R4; The ground pin ground connection of mouse chip U3;
The IO3 port of microprocessor U1 connects the base stage of triode Q2, the grounded emitter of triode Q2 by resistance R3, one end of collector connecting relay KA2 coil, another termination supply voltage (such as+5v) of relay K A2 coil; The normally closed contact of relay K A2 connects supply voltage, normally opened contact ground connection; The power pin (the Vcc pin in the U3 in figure) of the public termination mouse chip U3 of relay K A2.
The principle of work of the present embodiment is:
When the IO1 port of microprocessor U1 exports high level signal, photoelectrical coupler U2 conducting, when IO1 port output low level signal, photoelectrical coupler U2 ends, by the conducting of photoelectrical coupler U2 and pressing and unclamping of mechanical key on cut-off analog mouse.
When the IO3 port output low level signal of microprocessor U1, triode Q2 ends, relay K A2 coil losing electricity, and the normally closed contact of KA2 closes, and the power pin of mouse chip U3 obtains supply voltage and normally works.When the IO3 port of microprocessor U1 exports high level signal, triode Q2 conducting, the normally closed contact of relay K A2 disconnects, and normally opened contact closes, the therefore power pin ground connection of mouse chip U3.
Now, when the IO2 port of microprocessor U1 exports high level signal, then relay K A1 coil obtains electric, and the normally opened contact of relay K A1 closes, and makes the LED pipe pin of mouse chip U3 connect supply voltage by resistance R4.Current direction is: the power pin of the protection diode D1->U3 in the LED pipe pin->U3 of supply voltage->R4->U3 (now ground connection).Current-limiting resistance R4 can select 47K ohm, and electric current is 5V/47K=106uA.The magnitude of voltage that microprocessor U1 the samples voltage of two ends (namely during diode D1 conducting) between 0.5v ~ 0.7v.And if protection diode D1 opens a way or short circuit, then the magnitude of voltage of sampling is not just between 0.5v ~ 0.7v.The situation of protection diode D1 can be tested thus.
Embodiment two, the FT proving installation of the mouse chip that the utility model provides, as shown in Figure 3, comprising:
Microprocessor U201, relay K A201, NPN triode Q201;
The IO2 port of microprocessor U201 connects the base stage of triode Q201, the grounded emitter of triode Q201 by resistance R202, one end of collector connecting relay KA201 coil, another termination supply voltage (such as+5v) of relay K A201 coil; The normally closed contact of relay K A201 is unsettled, normally opened contact ground connection, and common port, for connecting the function pin of a needs test of mouse chip U3, is the LED pipe pin being connected to U3 in this example; The ground pin of mouse chip U3 connects supply voltage (such as+5v) by current-limiting resistance R204, and the ground pin of mouse chip U3 connects the voltage sample port (the AD port in figure) of microprocessor U201.The power pin of mouse chip U3 can be unsettled.Current-limiting resistance R204 can select 47K ohm.
The principle of work of the present embodiment is: when microprocessor U201 exports high level signal; triode Q201 conducting; relay K A201 coil obtains electric; the normally opened contact of relay K A201 closes; make the LED pipe pin ground connection of mouse chip U3, current direction is: the LED pipe pin-> ground of the protection diode D2->U3 in the ground pin->U3 of supply voltage pressure->R204->U3.
Current-limiting resistance R204 can select 47K ohm, and electric current is 5V/47K=106uA.The magnitude of voltage that microprocessor U201 the samples voltage of two ends (namely during diode D2 conducting) between 0.5v ~ 0.7v.And if protection diode D2 opens a way or short circuit, then the magnitude of voltage of sampling is not just between 0.5v ~ 0.7v.The situation of protection diode D2 can be tested thus.
Two circuit of the present utility model, can test all functions pin of mouse chip, compared with special OS testing tool, have practicality good, cost performance advantages of higher.

Claims (4)

1. a FT proving installation for mouse chip, is characterized in that, comprising:
Microprocessor U1, photoelectrical coupler U2, relay K A1 and KA2, NPN triode Q1 and Q2;
The IO1 port of microprocessor U1 connects the input end anode of photoelectrical coupler U2, the input end plus earth of photoelectrical coupler U2 by resistance R1; The output terminal collector of photoelectrical coupler U2 connects the Key pad port of mouse chip U3, output terminal grounded emitter;
The IO2 port of microprocessor U1 connects the base stage of triode Q1, the grounded emitter of triode Q1 by resistance R2, one end of collector connecting relay KA1 coil, another termination supply voltage of relay K A1 coil; The normally closed contact of relay K A1 is unsettled, and common port is for connecting the function pin of a needs test of mouse chip U3; The normally opened contact of relay K A1 connects the voltage sample port of microprocessor U1, and connects supply voltage by current-limiting resistance R4; The ground pin ground connection of mouse chip U3;
The IO3 port of microprocessor U1 connects the base stage of triode Q2, the grounded emitter of triode Q2 by resistance R3, one end of collector connecting relay KA2 coil, another termination supply voltage of relay K A2 coil; The normally closed contact of relay K A2 connects supply voltage, normally opened contact ground connection; The power pin of the public termination mouse chip U3 of relay K A2.
2. the FT proving installation of mouse chip as claimed in claim 1, is characterized in that: the value of current-limiting resistance R4 is 47k ohm.
3. a FT proving installation for mouse chip, is characterized in that, comprising:
Microprocessor U201, relay K A201, NPN triode Q201;
The IO2 port of microprocessor U201 connects the base stage of triode Q201, the grounded emitter of triode Q201 by resistance R202, one end of collector connecting relay KA201 coil, another termination supply voltage of relay K A201 coil; The normally closed contact of relay K A201 is unsettled, normally opened contact ground connection, and common port is for connecting the function pin of a needs test of mouse chip U3; The ground pin of mouse chip U3 connects supply voltage by current-limiting resistance R204, and the ground pin of mouse chip U3 connects the voltage sample port of microprocessor U201.
4. the FT proving installation of mouse chip as claimed in claim 3, is characterized in that: the value of current-limiting resistance R204 is 47k ohm.
CN201520292597.1U 2015-05-07 2015-05-07 The FT proving installation of mouse chip Active CN204595161U (en)

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CN201520292597.1U CN204595161U (en) 2015-05-07 2015-05-07 The FT proving installation of mouse chip

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CN201520292597.1U CN204595161U (en) 2015-05-07 2015-05-07 The FT proving installation of mouse chip

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112666444A (en) * 2020-12-03 2021-04-16 思瑞浦微电子科技(苏州)股份有限公司 Chip FT test method and system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112666444A (en) * 2020-12-03 2021-04-16 思瑞浦微电子科技(苏州)股份有限公司 Chip FT test method and system

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C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee
CP03 Change of name, title or address

Address after: Block C No. 18 Wuxi Software Park 214128 cancer in Jiangsu province Wuxi City District Road Zhenze layer

Patentee after: Jiangsu Juxin integrated circuit technology Limited by Share Ltd

Address before: 214125 Jiangsu Province, Wuxi City District Zhenze Road No. 18 National Software Park building a layer of cancer A

Patentee before: NST Chip Technology Limited

PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of utility model: FT testing arrangement of mouse chip

Effective date of registration: 20170524

Granted publication date: 20150826

Pledgee: Bank of Communications Ltd Wuxi branch

Pledgor: Jiangsu Juxin integrated circuit technology Limited by Share Ltd

Registration number: 2017990000434

PE01 Entry into force of the registration of the contract for pledge of patent right
PC01 Cancellation of the registration of the contract for pledge of patent right

Date of cancellation: 20200508

Granted publication date: 20150826

Pledgee: Bank of Communications Ltd Wuxi branch

Pledgor: NST TECHNOLOGY LIMITED Co.,Ltd.

Registration number: 2017990000434

PC01 Cancellation of the registration of the contract for pledge of patent right