CN204576496U - The computer equipment of multiple I/O interface - Google Patents
The computer equipment of multiple I/O interface Download PDFInfo
- Publication number
- CN204576496U CN204576496U CN201520189300.9U CN201520189300U CN204576496U CN 204576496 U CN204576496 U CN 204576496U CN 201520189300 U CN201520189300 U CN 201520189300U CN 204576496 U CN204576496 U CN 204576496U
- Authority
- CN
- China
- Prior art keywords
- interface
- control chip
- computer equipment
- external unit
- serial ports
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Abstract
The utility model relates to the computer equipment of one kind of multiple I/O interface, comprise task computation submodule, multiple I/O interface plate, isa bus connecting line, transfer bus and external unit, described task computation submodule, multiple I/O interface plate are connected with transfer bus respectively, described task computation submodule is connected with multiple I/O interface plate by isa bus connecting line, and described multiple I/O interface plate is connected with external unit.Compared with prior art, the utility model have board area sufficient, the advantage such as can to grow integrated multiple I/O interface, extendibility good and product life cycle.
Description
Technical field
The utility model relates to the interfacing of one kind of multiple IO, especially relates to a kind of computer equipment for the multiple I/O interface under industrial environment.
Background technology
The effect of I/O interface is main frame and extraneous exchange information.Main frame is undertaken by input-output apparatus with extraneous message exchange.General input-output apparatus is all the product that machinery or electromechanics combine, and such as the outer of routine is provided with keyboard, display, printer, scanner, disk drive, Genius mouse etc., and they are relative to central processing unit at a high speed, and speed wants much slow.In addition, the signal form of different peripheral, data layout are also different.Therefore, external unit directly can not be connected with CPU, needs to complete speeds match between them, signal conversion by corresponding circuit, and completes some controlling functions.Usually a kind of buffer circuit between main frame and peripheral hardware is called I/O interface circuit, be called for short I/O interface (Interface).In industrial settings, the existing usual limited area of board based on single Multibus bus, cannot integrated multiple I/O interface, and this greatly reduces the life cycle of product.
Utility model content
The purpose of this utility model is exactly provide the computer equipment of multiple I/O interface that a kind of board area is sufficient, can grow integrated multiple I/O interface, extendibility good and product life cycle to overcome defect that above-mentioned prior art exists.
The purpose of this utility model can be achieved through the following technical solutions:
The computer equipment of one kind of multiple I/O interface, it is characterized in that, comprise task computation submodule, multiple I/O interface plate, isa bus connecting line, transfer bus and external unit, described task computation submodule, multiple I/O interface plate are connected with transfer bus respectively, described task computation submodule is connected with multiple I/O interface plate by isa bus connecting line, and described multiple I/O interface plate is connected with external unit.
Described task computation submodule comprises central processing unit and the internal memory be connected with central processing unit respectively, electrically-erasable memory, power management module and multibus controller, and described multibus controller is connected with isa bus connecting line and transfer bus respectively.
That described central processing unit adopts is Intel 80486 type CPU.
Described multiple I/O interface plate comprises isa bus controller and the parallel port control chip be connected with isa bus controller respectively, RS422 serial ports control chip, RS232 serial ports control chip, and described parallel port control chip, RS422 serial ports control chip, RS232 serial ports control chip are connected with the external unit with the corresponding interface respectively.
Described external unit is connected with parallel port control chip by parallel interface cable, and described external unit is connected with RS422 serial ports control chip by RS422 cable, and described external unit is connected with RS232 serial ports control chip by RS232 cable.
Described transfer bus is Multibus bus.
Compared with prior art, the utility model has the following advantages:
1, board area sufficient, can integrated multiple I/O interface, computer system achieves the integrated of multiple I/O interface by the outer isa bus connecting line of plate.
2, computer system extendibility is good, can adjust the quantity of the multiple I/O interface card of insertion along with the increase and decrease of external unit quantity.
3, the life cycle of product is long, and this system is especially applicable to the industrial products that needs use for a long time.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is described in detail.
Embodiment
As shown in Figure 1, the computer equipment of one kind of multiple I/O interface, comprises central processing unit 11, internal memory 12, electrically-erasable memory 13, power management module 14, multibus controller 15, isa bus controller 21, parallel port control chip 22, RS422 serial ports control chip 23, RS232 serial ports control chip 24, transfer bus 3 and external unit 4, described central processing unit 11 respectively with internal memory 12, electrically-erasable memory 13, power management module 14, multibus controller 15 connects rear composition task computation submodule 1, described isa bus controller 21 respectively with parallel port control chip 22, RS422 serial ports control chip 23, RS232 serial ports control chip 24 connects the multiple I/O interface plate 2 of rear composition, and described external unit 4 is by different types of cable 5 and parallel port control chip 22, RS422 serial ports control chip 23, RS232 serial ports control chip 24 is connected, and described task computation submodule 1 and multiple I/O interface plate 2 are connected by isa bus connecting line 6 and are fixed on transfer bus 3.
That described central processing unit 11 adopts is Intel 80486 type CPU.Described transfer bus 3 is Multibus bus.
Workflow of the present utility model is as follows:
1) to system power supply;
2) by electricity, the program of wiping in chip is loaded into internal memory;
3) program in running memory;
4) program is by being connected in serial ports (parallel port) and the external device communication of the isa bus in plate.
The computer equipment of the multiple I/O interface of the utility model, utilizes the outer isa bus connecting line of plate, solve dexterously single Multibus bus board limited area, cannot the problem of integrated multiple I/O interface.
The computer equipment extendibility of multiple I/O interface is good.Adopt this kind based on the commercial unit of the computer equipment of the multiple I/O interface of Multibus, if need connection external unit in the future, only need many slotting one piece of multiple I/O interface cards.So, the life cycle of product is farthest extended.This system is especially applicable to the industrial products that needs use for a long time.
Claims (6)
1. the computer equipment of one kind of multiple I/O interface, it is characterized in that, comprise task computation submodule, multiple I/O interface plate, isa bus connecting line, transfer bus and external unit, described task computation submodule, multiple I/O interface plate are connected with transfer bus respectively, described task computation submodule is connected with multiple I/O interface plate by isa bus connecting line, and described multiple I/O interface plate is connected with external unit.
2. the computer equipment of one kind of multiple I/O interface according to claim 1, it is characterized in that, described task computation submodule comprises central processing unit and the internal memory be connected with central processing unit respectively, electrically-erasable memory, power management module and multibus controller, and described multibus controller is connected with isa bus connecting line and transfer bus respectively.
3. the computer equipment of one kind of multiple I/O interface according to claim 2, is characterized in that, that described central processing unit adopts is Intel 80486 type CPU.
4. the computer equipment of one kind of multiple I/O interface according to claim 1, it is characterized in that, described multiple I/O interface plate comprises isa bus controller and the parallel port control chip be connected with isa bus controller respectively, RS422 serial ports control chip, RS232 serial ports control chip, and described parallel port control chip, RS422 serial ports control chip, RS232 serial ports control chip are connected with the external unit with the corresponding interface respectively.
5. the computer equipment of one kind of multiple I/O interface according to claim 4, it is characterized in that, described external unit is connected with parallel port control chip by parallel interface cable, described external unit is connected with RS422 serial ports control chip by RS422 cable, and described external unit is connected with RS232 serial ports control chip by RS232 cable.
6. the computer equipment of one kind of multiple I/O interface according to claim 1, is characterized in that, described transfer bus is Multibus bus.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520189300.9U CN204576496U (en) | 2015-03-31 | 2015-03-31 | The computer equipment of multiple I/O interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520189300.9U CN204576496U (en) | 2015-03-31 | 2015-03-31 | The computer equipment of multiple I/O interface |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204576496U true CN204576496U (en) | 2015-08-19 |
Family
ID=53869102
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520189300.9U Expired - Fee Related CN204576496U (en) | 2015-03-31 | 2015-03-31 | The computer equipment of multiple I/O interface |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204576496U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109062110A (en) * | 2018-08-29 | 2018-12-21 | 中兴仪器（深圳）有限公司 | A kind of Multifunctional water Online QC system |
-
2015
- 2015-03-31 CN CN201520189300.9U patent/CN204576496U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109062110A (en) * | 2018-08-29 | 2018-12-21 | 中兴仪器（深圳）有限公司 | A kind of Multifunctional water Online QC system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107704413A (en) | A kind of reinforcement type parallel information processing platform based on VPX frameworks | |
| CN204595692U (en) | Based on the VPX computer motherboard of Shen prestige 410 processor and Shen Wei nest plate | |
| CN102360242A (en) | Method for realizing modularized power supply of mainboard | |
| CN203535549U (en) | BMC module applicable to application of multiple server main boards | |
| CN202631999U (en) | Lower computer system based on USB interface board card | |
| CN202838317U (en) | Bus unit and rear panel system | |
| CN204576496U (en) | The computer equipment of multiple I/O interface | |
| CN204557308U (en) | A kind of high density Novel cutter flap-type server based on fusion architecture | |
| CN205229926U (en) | 64 treater is in coordination with interconnection plate on server of way | |
| CN204086415U (en) | Fault wave recording device | |
| CN208538124U (en) | A kind of server master board based on 1621 processor of Shen prestige | |
| CN104516333A (en) | Controller with multicore CPU (central processing unit) and multiple operation systems | |
| CN110990332A (en) | Server mainboard based on explain majestic treaters | |
| CN203239605U (en) | Fan board with controllable rotation speed based on single four-path system | |
| CN206209478U (en) | A kind of server master board that externally can be interconnected at a high speed | |
| CN205829883U (en) | A kind of multisource video acquisition processing system based on FPGA | |
| CN204576487U (en) | Parallel computation multiplexing Mux | |
| CN204595691U (en) | A kind of CPCI-E computer motherboard based on Shen prestige processor and nest plate | |
| CN106155955A (en) | The computer system of one kind of multiple I/O interface | |
| CN104965468B (en) | A kind of common interface module suitable for the multi-functional acquisition control devices of CPCI | |
| CN204406164U (en) | The point-to-point parallel communication control system of one master and multiple slaves core bus based on gear stage | |
| CN205210761U (en) | CPEX industrial control computer mainboard based on explain majestic nest plate | |
| CN102012721A (en) | Computer-on-module (COM)-Express embedded standard-based industrial computer carrier board | |
| CN203133834U (en) | 10-gigabit pass-through module | |
| CN204595693U (en) | A kind of computer motherboard based on Shen prestige processor and Shen Wei nest plate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150819 Termination date: 20190331 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |