CN202631999U - Lower computer system based on USB interface board card - Google Patents
Lower computer system based on USB interface board card Download PDFInfo
- Publication number
- CN202631999U CN202631999U CN 201220169411 CN201220169411U CN202631999U CN 202631999 U CN202631999 U CN 202631999U CN 201220169411 CN201220169411 CN 201220169411 CN 201220169411 U CN201220169411 U CN 201220169411U CN 202631999 U CN202631999 U CN 202631999U
- Authority
- CN
- China
- Prior art keywords
- data terminal
- usb interface
- resistance
- motherboard
- daughter board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Information Transfer Systems (AREA)
Abstract
The utility model designs a lower computer system based on a USB interface board card. The lower computer system is characterized in that the system comprises a mother board and at least one daughter board, wherein the mother board is provided with at least one USB interface; each daughter board is provided with a USB interface; and the mother board is connected with the USB interface of each daughter board through the USB interface on the mother board so as to realize the communication connection with the daughter board(s). The lower computer system has the advantages that the lower computer system adopts a uniform architecture and is suitable for wide application demands; the structural functions are modularized; the cost is reduced; and the lower computer system is easy to maintain and to expand, thereby substantially meeting user demands.
Description
Technical field
The utility model relates to a kind of lower computer system, and concrete is, the next system that is made up of a motherboard and some daughter boards.
Background technology
At present, design of the function of traditional lower computer system and version are decided according to application target, and is various informative, numerous and complicated differing.During design, a type is to a kind of application, even the same application field; Increase in order to adapt to user's request; Such as requirements such as interpolation, replacement or delete function modules, also can't on former organic type, expand or improve, and often need be from the trendy type of new design; This had both increased financial cost to the user, also brought the inconvenience on the upgrade maintenance simultaneously.In view of the foregoing, demand urgently designing a kind of can independent assortment, the lower computer system of replacement, expansion.
The utility model content
The utility model purpose is to overcome to have the deficiency that is unfavorable for upgrade maintenance and function expansion in the lower computer system in the prior art, has proposed a kind of novel lower computer system based on the USB interface integrated circuit board.
To achieve these goals; The technical scheme of the utility model is achieved in that the lower computer system based on the USB interface integrated circuit board; It is characterized in that: native system comprises a motherboard and at least one daughter board; At least have a USB interface on the said motherboard, all have a USB interface on each daughter board, motherboard docks with daughter board through above-mentioned USB interface.
Said motherboard and daughter board all are the function independent subsystem, and promptly motherboard and daughter board can independent operatings, can carry out daughter board replacement or expansion.
Have 4,8,16 USB interfaces or more on the said motherboard; USB interface quantity is specifically decided according to the scale of motherboard; The motherboard of general scale is preset with 4, and fairly large motherboard can reach 8 or 16, can select more more on a large scale; But, guarantee that USB interface quantity is no more than 127 for the stable operation of system.
Because will satisfying with the daughter board communication of different data transmission rates, motherboard connects, so, must on motherboard, design the USB interface and the circuit thereof of a plurality of different transmission rates according to the requirement of the data transmission rate of motherboard and daughter board.
When the message transmission rate of motherboard and daughter board is low speed (1.5Mbit/s); The interface circuit of motherboard and daughter board can design like this: the USB interface in the said motherboard has a motherboard power end, one first data terminal, one second data terminal and a motherboard earth terminal; USB interface has a daughter board power end, one the 3rd data terminal, one the 4th data terminal and a daughter board earth terminal in the daughter board; Wherein, this first data terminal links to each other with the 3rd data terminal, and this second data terminal links to each other with the 4th data terminal; This first data terminal also is connected with ground through one first resistance, and its second data terminal also is connected with ground through one second resistance; The 4th data terminal also is connected with one first power end through one the 3rd resistance.
When the message transmission rate of motherboard and daughter board is full speed (12Mbit/s); The interface circuit of motherboard and daughter board can design like this: the USB interface in the said motherboard has a motherboard power end, one first data terminal, one second data terminal and a motherboard earth terminal; USB interface has a daughter board power end, one the 3rd data terminal, one the 4th data terminal and a daughter board earth terminal in the daughter board; Wherein, this first data terminal links to each other with the 3rd data terminal, and this second data terminal links to each other with the 4th data terminal; This first data terminal also is connected with ground through one first resistance, and its second data terminal also is connected with ground through one second resistance; The 3rd data terminal also is connected with one first power end through one the 3rd resistance.
When the message transmission rate of motherboard and daughter board is high speed (480Mbit/s); The interface circuit of motherboard and daughter board can design like this: the USB interface in the said motherboard has a motherboard power end, one first data terminal, one second data terminal and a motherboard earth terminal; USB interface has a daughter board power end, one the 3rd data terminal, one the 4th data terminal and a daughter board earth terminal in the daughter board; Wherein, this first data terminal links to each other with the 3rd data terminal, and this second data terminal links to each other with the 4th data terminal; This first data terminal also is connected with ground through one first resistance, and its second data terminal also is connected with ground through one second resistance; The 3rd data terminal also is connected with the emitter of a triode through one the 3rd resistance, and the collector of this triode is connected with one first power end, and the base stage of this triode is connected with a control signal end.
Wherein, the Standard resistance range of first resistance is at 14.25K-15.75K ohm, and the Standard resistance range of second resistance is at 14.25K-15.75K ohm, and the Standard resistance range of the 3rd resistance is at 1425-1575 ohm.Calculate through strictness, preferably, the resistance of first resistance is 15K ohm, and the resistance of second resistance is 15K ohm, and the resistance of the 3rd resistance is 1.5K ohm.
Compared with prior art, the advantage of the utility model: adopt unified system architecture, scalable application demand, the structure function modularization reduces cost, and is easy to maintenance and expansion, satisfies user's needs greatly.
Description of drawings
Fig. 1 is the structural representation of the utility model.
Fig. 2 is the interface circuit schematic diagram of low speed USB interface daughter board and motherboard.
Fig. 3 is the interface circuit schematic diagram of full speed USB interface daughter board and motherboard.
Fig. 4 is the interface circuit schematic diagram of hi-speed USB interface daughter board and motherboard.
Embodiment
Below in conjunction with accompanying drawing and embodiment the utility model is elaborated.
The lower computer system that is based on the USB interface integrated circuit board shown in Figure 1; Native system comprises a motherboard 1 and four daughter boards 2; Said motherboard be provided with 4 usb 1s 1 (1 at a high speed, 1 at full speed, 2 be low-speed interface); Also all be provided with on each daughter board 1 with motherboard on the corresponding USB interface of a USB interface, motherboard docks with this daughter board with USB interface on any daughter board through the USB interface on it.
This motherboard provides+the 5V direct supply, provide and host computer between communication connect, the USB interface slot of daughter card is provided or connects plug-in unit.The physical size of each slot is consistent with the signal definition of electronics line, with exchange and the expansion of guaranteeing daughter board.
The USB interface minimal set of motherboard is defined as: motherboard power end+5V, the first data terminal D+, the second data terminal D-and motherboard earth terminal GND, wherein, the second data terminal D-and the first data terminal D+ are differential type.
The USB interface minimal set of daughter board is defined as: daughter board power end+5V, the 3rd data terminal D+, the 4th data terminal D-and daughter board earth terminal GND, wherein, the 4th data terminal D-and the 3rd data terminal D+ also are differential type.
The USB interface of motherboard is designed to USB HUB output, belongs to master port.The USB interface of daughter board belongs to from port.The data transmission of principal and subordinate's port has three kinds of forms, is respectively low speed 1.5Mbit/s, at full speed 12Mbit/s and high speed 480Mbit/s.
When principal and subordinate's port was low speed (1.5Mbit/s), as shown in Figure 2, this first data terminal linked to each other with the 3rd data terminal, and this second data terminal links to each other with the 4th data terminal; This first data terminal also is connected with ground through one first resistance, and its second data terminal also is connected with ground through one second resistance; The 4th data terminal also is connected with one first power end through one the 3rd resistance, and the 3rd data terminal D+ does not insert pull-up resistor.
When female principal and subordinate's port was full speed (12Mbit/s), as shown in Figure 3, this first data terminal linked to each other with the 3rd data terminal, and this second data terminal links to each other with the 4th data terminal; This first data terminal also is connected with ground through one first resistance, and its second data terminal also is connected with ground through one second resistance; The 3rd data terminal also is connected with one first power end through one the 3rd resistance, and the 4th data terminal D-does not insert pull-up resistor.
When principal and subordinate's port was high speed (480Mbit/s), as shown in Figure 4, this first data terminal linked to each other with the 3rd data terminal, and this second data terminal links to each other with the 4th data terminal; This first data terminal also is connected with ground through one first resistance, and its second data terminal also is connected with ground through one second resistance; The 3rd data terminal also is connected with the emitter of a triode through one the 3rd resistance, and the collector of this triode is connected with one first power end 3.3V, and the base stage of this triode is connected with a control signal end Ctrl.The 4th data terminal D-does not insert pull-up resistor.D+ then, D-inserts the data terminal of USB slave unit circuit.The hi-speed USB interface daughter board with the communication of USB HUB motherboard before, the form of USB interface occurs at full speed, this moment, control signal end Ctrl was the 3.3V noble potential.When principal and subordinate both sides consult to finish and approval during for hi-speed USB interface, this moment, control signal wire Ctrl was the 0V electronegative potential, and the result is equivalent to the 3rd resistive-open, D+ when reaching high speed data transfer, the load balance of D-.
The USB interface daughter board of different pieces of information transmission speed can patch simultaneously in any slot of motherboard, motherboard software and the collaborative work of daughter board system software, freely the distributing and locate addressing of supporting interface slot.It connects synoptic diagram shown in accompanying drawing four.Mechanical dimension that it is concrete and contact form are not done standard here.
Below only expressed the embodiment of the utility model, it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the utility model patent scope.Should be pointed out that for the person of ordinary skill of the art under the prerequisite that does not break away from the utility model design, can also make some distortion and improvement, these all belong to the protection domain of the utility model.Therefore, the protection domain of the utility model patent should be as the criterion with accompanying claims.
Claims (9)
1. based on the lower computer system of USB interface integrated circuit board; It is characterized in that: native system comprises a motherboard and at least one daughter board; At least has a USB interface on the said motherboard; All have a USB interface on each daughter board, motherboard is connected with the communication of daughter board connecting with realization with the USB interface of daughter board through the USB interface on it.
2. the lower computer system based on the USB interface integrated circuit board according to claim 1 is characterized in that: said motherboard and daughter board all are the function independent subsystem.
3. the lower computer system based on the USB interface integrated circuit board according to claim 1 is characterized in that: have 4,8 or 16 USB interfaces on the said motherboard.
4. the lower computer system based on the USB interface integrated circuit board according to claim 1 is characterized in that: the USB interface quantity of said motherboard is no more than 127.
5. the lower computer system based on the USB interface integrated circuit board according to claim 1; It is characterized in that: the USB interface in the said motherboard has a motherboard power end, one first data terminal, one second data terminal and a motherboard earth terminal; USB interface has a daughter board power end, one the 3rd data terminal, one the 4th data terminal and a daughter board earth terminal in the daughter board; Wherein, this first data terminal links to each other with the 3rd data terminal, and this second data terminal links to each other with the 4th data terminal; This first data terminal also is connected with ground through one first resistance, and its second data terminal also is connected with ground through one second resistance; The 4th data terminal also is connected with one first power end through one the 3rd resistance.
6. the lower computer system based on the USB interface integrated circuit board according to claim 1; It is characterized in that: the USB interface in the said motherboard has a motherboard power end, one first data terminal, one second data terminal and a motherboard earth terminal; USB interface has a daughter board power end, one the 3rd data terminal, one the 4th data terminal and a daughter board earth terminal in the daughter board; Wherein, this first data terminal links to each other with the 3rd data terminal, and this second data terminal links to each other with the 4th data terminal; This first data terminal also is connected with ground through one first resistance, and its second data terminal also is connected with ground through one second resistance; The 3rd data terminal also is connected with one first power end through one the 3rd resistance.
7. the lower computer system based on the USB interface integrated circuit board according to claim 1; It is characterized in that: the USB interface in the said motherboard has a motherboard power end, one first data terminal, one second data terminal and a motherboard earth terminal; USB interface has a daughter board power end, one the 3rd data terminal, one the 4th data terminal and a daughter board earth terminal in the daughter board; Wherein, this first data terminal links to each other with the 3rd data terminal, and this second data terminal links to each other with the 4th data terminal; This first data terminal also is connected with ground through one first resistance, and its second data terminal also is connected with ground through one second resistance; The 3rd data terminal also is connected with the emitter of a triode through one the 3rd resistance, and the collector of this triode is connected with one first power end, and the base stage of this triode is connected with a control signal end.
8. it is characterized in that according to any described lower computer system based on the USB interface integrated circuit board in the claim 5,6 or 7: the Standard resistance range of first resistance is at 14.25K-15.75K ohm; The Standard resistance range of second resistance is at 14.25K-15.75K ohm, and the Standard resistance range of the 3rd resistance is at 1425-1575 ohm.
9. the lower computer system based on the USB interface integrated circuit board according to claim 8 is characterized in that: the resistance of first resistance is 15K ohm, and the resistance of second resistance is 15K ohm, and the resistance of the 3rd resistance is 1500 ohm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201220169411 CN202631999U (en) | 2012-04-20 | 2012-04-20 | Lower computer system based on USB interface board card |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201220169411 CN202631999U (en) | 2012-04-20 | 2012-04-20 | Lower computer system based on USB interface board card |
Publications (1)
Publication Number | Publication Date |
---|---|
CN202631999U true CN202631999U (en) | 2012-12-26 |
Family
ID=47385177
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 201220169411 Expired - Fee Related CN202631999U (en) | 2012-04-20 | 2012-04-20 | Lower computer system based on USB interface board card |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN202631999U (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105404603A (en) * | 2015-10-26 | 2016-03-16 | 云顶科技(江苏)有限公司 | Anti-interference drive circuit of USB interface |
CN113918492A (en) * | 2021-10-11 | 2022-01-11 | 北京小米移动软件有限公司 | Independent mother board |
CN113918494A (en) * | 2021-10-11 | 2022-01-11 | 北京小米移动软件有限公司 | Sub-board |
CN113918495A (en) * | 2021-10-11 | 2022-01-11 | 北京小米移动软件有限公司 | Power supply daughter board |
CN114036094A (en) * | 2021-10-11 | 2022-02-11 | 北京小米移动软件有限公司 | Sub-board |
CN114064538A (en) * | 2021-10-11 | 2022-02-18 | 北京小米移动软件有限公司 | Development platform |
-
2012
- 2012-04-20 CN CN 201220169411 patent/CN202631999U/en not_active Expired - Fee Related
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105404603A (en) * | 2015-10-26 | 2016-03-16 | 云顶科技(江苏)有限公司 | Anti-interference drive circuit of USB interface |
CN105404603B (en) * | 2015-10-26 | 2018-10-09 | 云顶科技(江苏)有限公司 | Anti-interference drive circuit of USB interface |
CN113918492A (en) * | 2021-10-11 | 2022-01-11 | 北京小米移动软件有限公司 | Independent mother board |
CN113918494A (en) * | 2021-10-11 | 2022-01-11 | 北京小米移动软件有限公司 | Sub-board |
CN113918495A (en) * | 2021-10-11 | 2022-01-11 | 北京小米移动软件有限公司 | Power supply daughter board |
CN114036094A (en) * | 2021-10-11 | 2022-02-11 | 北京小米移动软件有限公司 | Sub-board |
CN114064538A (en) * | 2021-10-11 | 2022-02-18 | 北京小米移动软件有限公司 | Development platform |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN202631999U (en) | Lower computer system based on USB interface board card | |
CN203870529U (en) | Universal serial bus server | |
CN205193795U (en) | Multi -functional interface system of extensible | |
CN204667289U (en) | A kind of server | |
CN205450908U (en) | Common type rack -mounted server based on godson 3A 2000 | |
CN103616935A (en) | Embedded computer mainboard | |
CN104021809A (en) | Universal serial bus (USB) storage | |
CN101894055A (en) | Method for realizing blade mainboard interface with redundancy function | |
CN202838317U (en) | Bus unit and rear panel system | |
CN203812171U (en) | CDN server under ARM architecture | |
CN204066271U (en) | A kind of device customized towards POS or scale of tracing to the source | |
CN209895219U (en) | Board card based on multifunctional Slimline connector | |
CN204947285U (en) | USB Type-C modular converter | |
CN101561663B (en) | Motion control system and control method thereof | |
CN206479922U (en) | Highly dense server hard disk back plane | |
CN213482784U (en) | ARM cluster server | |
CN201867719U (en) | Centralized communication control device for embedded computer | |
CN102799562A (en) | Function trimming micro server | |
CN204480237U (en) | A kind of connector, universal serial bus device and intelligent terminal | |
CN202331457U (en) | Data acquirer | |
CN201869223U (en) | Machine to machine terminal, communication module and data sending device | |
CN207251748U (en) | A kind of integrated form team control terminal | |
CN106294252A (en) | Ultrahigh speed chip interconnection means and connection control method thereof | |
CN202383668U (en) | Peripheral component interconnect express (PCI-E) expansion structure | |
CN110334045B (en) | Extensible multi-interface industrial personal computer mainboard |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20121226 Termination date: 20160420 |