CN204556729U - A kind of multichannel resistance tester circuit - Google Patents
A kind of multichannel resistance tester circuit Download PDFInfo
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- CN204556729U CN204556729U CN201420858043.9U CN201420858043U CN204556729U CN 204556729 U CN204556729 U CN 204556729U CN 201420858043 U CN201420858043 U CN 201420858043U CN 204556729 U CN204556729 U CN 204556729U
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Abstract
The utility model discloses a kind of multichannel resistance tester circuit, comprising: clock circuit, AD signal sampling treatment circuit, LCD display driver circuit, function button circuit, communication interface circuit, constant-current source circuit, relay circuit and CPU; Described CPU connects clock circuit, AD signal sampling treatment circuit, LCD display driver circuit, keyboard interface circuit, communication interface circuit, constant-current source circuit and relay circuit respectively.The utility model only needs operating personnel tested electromagnet and test interface to be connected, start-up performance arranges fast inspection in button module or essence inspection button, the utility model carries out various parameter testing according to the program of setting in advance to tested electromagnet, operating personnel are without the need to possessing professional knowledge, and detection speed is fast, and detection efficiency is high, except testing single electromagnet, the utility model is also applicable to the production in enormous quantities of streamline, thus increases work efficiency while ensuring the quality of products.
Description
Technical field
The utility model relates to multichannel resistance meter, is specifically related to a kind of multichannel resistance tester circuit.
Background technology
Current existing multichannel resistance meter technology mainly adopts the low resistance table of band pointer gauge outfit to measure, because operating process exists instrument and personal error, and professional must be had to carry out manual switchover measurement to the measuring junction of various combination, cause test link loaded down with trivial details, work efficiency is extremely low, very difficult for large batch of electric connector production testing.
Summary of the invention
It is short that the purpose of this utility model is to provide a kind of 680 road resistance test instruments, test duration of testing 680 road resistance or two-way measuring junction combination in any, simple to operate, measuring accuracy is high, good reliability, the test multichannel resistance test set that can enhance productivity, to solve the ineffective situation that prior art level causes.
The technical scheme that the utility model adopts is: a kind of multichannel resistance tester circuit, comprising: clock circuit, AD signal sampling treatment circuit, LCD display driver circuit, function button circuit, communication interface circuit, constant-current source circuit, relay circuit and CPU; Described CPU connects clock circuit, AD signal sampling treatment circuit, LCD display driver circuit, keyboard interface circuit, communication interface circuit, constant-current source circuit and relay circuit respectively.
Further, described clock circuit comprises crystal oscillator Y1, electric capacity C29 and electric capacity C30; Described crystal oscillator Y1 connects electric capacity C29 and electric capacity C30 respectively; Described electric capacity C29 is connected ground respectively with electric capacity C30.
Further, described AD signal sampling treatment circuit comprises A/D conversion chip U32, electric capacity C23, electric capacity C37, electric capacity C38, electric capacity C39, electric capacity C40, electric capacity C24, electric capacity C42, voltage source chip U33, resistance R90, resistance R91, resistance R92, resistance R93, resistance R88, resistance R89, stabilivolt D44 and stabilivolt D45; 12 pin of described A/D conversion chip U32, the 14 pin, the 15 pin and the 16 pin connect described CPU respectively; Described electric capacity C37, electric capacity C38, electric capacity C39, electric capacity C40 one end connect second pin of A/D conversion chip U32, three-prong, the 4th pin and the 5th pin respectively, and the other end of these four electric capacity connects ground MGND respectively; Described electric capacity C23 one end connects power supply VCC, and the other end connects A/D conversion chip U32 the 11 pin; Described electric capacity C24, electric capacity C42, voltage source chip U33 and resistance R88 one end connect the octal of A/D conversion chip U32 respectively, and the other end connects ground MGND respectively; Described voltage source chip U33 contact resistance R88; Described resistance R89 one end connects the octal of A/D conversion chip U32, and the other end connects+6V power supply; Described stabilivolt D44 and stabilivolt D45 one end are connected three-prong and second pin of A/D conversion chip U32 respectively, and the other end connects ground MGND respectively; Described resistance R90, resistance R91, resistance R92, resistance R93 one end connect A/D conversion chip U32 second pin, three-prong, the 4th pin and the 5th pin respectively, and the other end is interface channel 0, passage 1, passage 2 and passage 3 respectively.
Further, described LCD display driver circuit comprise LCD interface J4, potentiometer W5, impact damper U6 and with door U3B; 5th pin to the 12 pin of described LCD interface J4 connects the 12 pin of impact damper U6 to the 19 pin, respectively as FPDP DATA0 to DATA7; First pin and the tripod of described LCD interface J4 are connected ground respectively; The crus secunda of described LCD interface J4 is connected power supply VCC respectively with the 4th pin; Tenth tripod of LCD interface J4 is connected CPU respectively with the 14 pin; 17 pin of described LCD interface J4 is connected potentiometer W5 respectively with the tenth octal; The other end of described potentiometer W5 connects ground; Described the 4th pin with door U3B and the 5th pin are connected CPU respectively, and the 6th pin connects the 11 pin of impact damper U6; The crus secunda of described impact damper U6 connects CPU respectively to the 9th pin; First pin of described impact damper U6 connects ground.
Further, described keyboard interface circuit comprises diode D32, diode D33, diode D34, diode D35, diode D36, diode D37, diode D38, diode D39 and keyboard interface J5; Described diode D32, diode D33, diode D34, diode D35, diode D36, diode D37, diode D38, diode D39 positive pole connect CPU respectively, and negative pole connects keyboard interface J5 respectively.
Further, described communication interface circuit comprises 232 chip U22,485 chip U31, communication interface J11, electric capacity C45, electric capacity C46, electric capacity C47, electric capacity C48, electric capacity C49, resistance R70, resistance R71 and resistance R86; Described 232 chip U22 the 11 pin connect CPU and 485 chip U31 the 4th pin respectively; Described 232 chip U22 the 12 pin connect CPU and 485 chip U31 first pin respectively; Described electric capacity C45 is connected across between 232 chip first pin and tripod; Described electric capacity C46 is connected across between 232 chips the 4th pin and the 5th pin; Described 232 chip U22 the tenth tripods are connected communication interface J11 respectively with 14 pin; Described 232 chip U22 the 16 pin connect power supply VCC and electric capacity C49 respectively; Described electric capacity C47 one end connects power supply VCC, and the other end connects 232 chip U22 crus secundas; Described electric capacity C47 one end connects power supply ground, and the other end connects 232 chip U22 the 6th pin; Described 232 chip U22 the 15 pin connect ground; Described 485 chip U31 crus secundas are connected CPU respectively with tripod; Described 485 chip U31 the 5th pin connect respectively with resistance R71; Described 485 chip U31 the 6th pin contact resistance R86 and communication interface J11 respectively; Described resistance R70 connects power supply VCC, 485 chip U31 the 7th pin and resistance R86 respectively.
Further, described constant-current source circuit comprises four road constant current sources and constant current source interface J10; Described constant current source interface J10 connects CPU by four road constant current sources.
The utility model has the following advantages with prior art tool of comparing: 1. reasonable in design, 2. simple to operate.3 test speeds are fast.4 test ways are many.
Except object described above, feature and advantage, the utility model also has other object, feature and advantage.Below with reference to figure, the utility model is described in further detail.
Accompanying drawing explanation
The accompanying drawing forming a application's part is used to provide further understanding of the present utility model, and schematic description and description of the present utility model, for explaining the utility model, is not formed improper restriction of the present utility model.
Fig. 1 is a kind of multichannel resistance tester circuit schematic diagram of the utility model embodiment;
Fig. 2 is the LCD interface of the utility model embodiment and the catenation principle figure of data bus.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
With reference to figure 1 and Fig. 2, a kind of multichannel resistance tester circuit as depicted in figs. 1 and 2, comprising: clock circuit, AD signal sampling treatment circuit, LCD display driver circuit, function button circuit, communication interface circuit, constant-current source circuit, relay circuit and CPU; Described CPU connects clock circuit, AD signal sampling treatment circuit, LCD display driver circuit, keyboard interface circuit, communication interface circuit, constant-current source circuit and relay circuit respectively.
Described clock circuit comprises crystal oscillator Y1, electric capacity C29 and electric capacity C30; Described crystal oscillator Y1 connects electric capacity C29 and electric capacity C30 respectively; Described electric capacity C29 is connected ground respectively with electric capacity C30.
Described AD signal sampling treatment circuit comprises A/D conversion chip U32, electric capacity C23, electric capacity C37, electric capacity C38, electric capacity C39, electric capacity C40, electric capacity C24, electric capacity C42, voltage source chip U33, resistance R90, resistance R91, resistance R92, resistance R93, resistance R88, resistance R89, stabilivolt D44 and stabilivolt D45; 12 pin of described A/D conversion chip U32, the 14 pin, the 15 pin and the 16 pin connect described CPU respectively; Described electric capacity C37, electric capacity C38, electric capacity C39, electric capacity C40 one end connect second pin of A/D conversion chip U32, three-prong, the 4th pin and the 5th pin respectively, and the other end of these four electric capacity connects ground MGND respectively; Described electric capacity C23 one end connects power supply VCC, and the other end connects A/D conversion chip U32 the 11 pin; Described electric capacity C24, electric capacity C42, voltage source chip U33 and resistance R88 one end connect the octal of A/D conversion chip U32 respectively, and the other end connects ground MGND respectively; Described voltage source chip U33 contact resistance R88; Described resistance R89 one end connects the octal of A/D conversion chip U32, and the other end connects+6V power supply; Described stabilivolt D44 and stabilivolt D45 one end are connected three-prong and second pin of A/D conversion chip U32 respectively, and the other end connects ground MGND respectively; Described resistance R90, resistance R91, resistance R92, resistance R93 one end connect A/D conversion chip U32 second pin, three-prong, the 4th pin and the 5th pin respectively, and the other end is interface channel 0, passage 1, passage 2 and passage 3 respectively.
Described LCD display driver circuit comprise LCD interface J4, potentiometer W5, impact damper U6 and with door U3B; 5th pin to the 12 pin of described LCD interface J4 connects the 12 pin of impact damper U6 to the 19 pin, respectively as FPDP DATA0 to DATA7; First pin and the tripod of described LCD interface J4 are connected ground respectively; The crus secunda of described LCD interface J4 is connected power supply VCC respectively with the 4th pin; Tenth tripod of LCD interface J4 is connected CPU respectively with the 14 pin; 17 pin of described LCD interface J4 is connected potentiometer W5 respectively with the tenth octal; The other end of described potentiometer W5 connects ground; Described the 4th pin with door U3B and the 5th pin are connected CPU respectively, and the 6th pin connects the 11 pin of impact damper U6; The crus secunda of described impact damper U6 connects CPU respectively to the 9th pin; First pin of described impact damper U6 connects ground.
Described keyboard interface circuit comprises diode D32, diode D33, diode D34, diode D35, diode D36, diode D37, diode D38, diode D39 and keyboard interface J5; Described diode D32, diode D33, diode D34, diode D35, diode D36, diode D37, diode D38, diode D39 positive pole connect CPU respectively, and negative pole connects keyboard interface J5 respectively.
Described communication interface circuit comprises 232 chip U22,485 chip U31, communication interface J11, electric capacity C45, electric capacity C46, electric capacity C47, electric capacity C48, electric capacity C49, resistance R70, resistance R71 and resistance R86; Described 232 chip U22 the 11 pin connect CPU and 485 chip U31 the 4th pin respectively; Described 232 chip U22 the 12 pin connect CPU and 485 chip U31 first pin respectively; Described electric capacity C45 is connected across between 232 chip first pin and tripod; Described electric capacity C46 is connected across between 232 chips the 4th pin and the 5th pin; Described 232 chip U22 the tenth tripods are connected communication interface J11 respectively with 14 pin; Described 232 chip U22 the 16 pin connect power supply VCC and electric capacity C49 respectively; Described electric capacity C47 one end connects power supply VCC, and the other end connects 232 chip U22 crus secundas; Described electric capacity C47 one end connects power supply ground, and the other end connects 232 chip U22 the 6th pin; Described 232 chip U22 the 15 pin connect ground; Described 485 chip U31 crus secundas are connected CPU respectively with tripod; Described 485 chip U31 the 5th pin connect respectively with resistance R71; Described 485 chip U31 the 6th pin contact resistance R86 and communication interface J11 respectively; Described resistance R70 connects power supply VCC, 485 chip U31 the 7th pin and resistance R86 respectively.
Described constant-current source circuit comprises four road constant current sources and constant current source interface J10; Described constant current source interface J10 connects CPU by four road constant current sources.
This instrument adopts four-end method resistance measurement, measurement range 0-100M, precision 0.2%, to avoid in measurement links because of the measuring error that non-professionality design is brought, improves the reliability and stability of whole system.
The utility model clock module is used for providing frequency of operation to CPU.
Test interface is for connecting the pin of tested electric connector.
Test interface is for inputting the voltage signal on tested electric connector.
The utility model only needs operating personnel tested electric connector and test interface to be connected, by pressing key control test starting, the utility model is measured tested electric connector according to the process of measurement of setting in advance, operating personnel are without the need to possessing professional knowledge, and detection speed is fast, and detection efficiency is high, precision is high, except measuring single electric connector, the utility model is also applicable to the measurement of various black box back panel wiring resistance, thus increases work efficiency while ensuring the quality of products.The utility model also can connect computing machine, carries out Long-distance Control measurement, and test result is printed as form.
The utility model has the following advantages with prior art tool of comparing: 1. reasonable in design, 2. simple to operate.3 test speeds are fast.4 test ways are many.
The foregoing is only preferred embodiment of the present utility model, not in order to limit the utility model, all within spirit of the present utility model and principle, any amendment done, equivalent replacement, improvement etc., all should be included within protection domain of the present utility model.
Claims (7)
1. a multichannel resistance tester circuit, is characterized in that, comprising: clock circuit, AD signal sampling treatment circuit, LCD display driver circuit, function button circuit, communication interface circuit, constant-current source circuit, relay circuit and CPU; Described CPU connects clock circuit, AD signal sampling treatment circuit, LCD display driver circuit, keyboard interface circuit, communication interface circuit, constant-current source circuit and relay circuit respectively.
2. multichannel resistance tester circuit according to claim 1, is characterized in that, described clock circuit comprises crystal oscillator Y1, electric capacity C29 and electric capacity C30; Described crystal oscillator Y1 connects electric capacity C29 and electric capacity C30 respectively; Described electric capacity C29 is connected ground respectively with electric capacity C30.
3. multichannel resistance tester circuit according to claim 1, it is characterized in that, described AD signal sampling treatment circuit comprises A/D conversion chip U32, electric capacity C23, electric capacity C37, electric capacity C38, electric capacity C39, electric capacity C40, electric capacity C24, electric capacity C42, voltage source chip U33, resistance R90, resistance R91, resistance R92, resistance R93, resistance R88, resistance R89, stabilivolt D44 and stabilivolt D45; 12 pin of described A/D conversion chip U32, the 14 pin, the 15 pin and the 16 pin connect described CPU respectively; Described electric capacity C37, electric capacity C38, electric capacity C39, electric capacity C40 one end connect second pin of A/D conversion chip U32, three-prong, the 4th pin and the 5th pin respectively, and the other end of these four electric capacity connects ground MGND respectively; Described electric capacity C23 one end connects power supply VCC, and the other end connects A/D conversion chip U32 the 11 pin; Described electric capacity C24, electric capacity C42, voltage source chip U33 and resistance R88 one end connect the octal of A/D conversion chip U32 respectively, and the other end connects ground MGND respectively; Described voltage source chip U33 contact resistance R88; Described resistance R89 one end connects the octal of A/D conversion chip U32, and the other end connects+6V power supply; Described stabilivolt D44 and stabilivolt D45 one end are connected three-prong and second pin of A/D conversion chip U32 respectively, and the other end connects ground MGND respectively; Described resistance R90, resistance R91, resistance R92, resistance R93 one end connect A/D conversion chip U32 second pin, three-prong, the 4th pin and the 5th pin respectively, and the other end is interface channel 0, passage 1, passage 2 and passage 3 respectively.
4. multichannel resistance tester circuit according to claim 1, is characterized in that, described LCD display driver circuit comprise LCD interface J4, potentiometer W5, impact damper U6 and with door U3B; 5th pin to the 12 pin of described LCD interface J4 connects the 12 pin of impact damper U6 to the 19 pin, respectively as FPDP DATA0 to DATA7; First pin and the tripod of described LCD interface J4 are connected ground respectively; The crus secunda of described LCD interface J4 is connected power supply VCC respectively with the 4th pin; Tenth tripod of LCD interface J4 is connected CPU respectively with the 14 pin; 17 pin of described LCD interface J4 is connected potentiometer W5 respectively with the tenth octal; The other end of described potentiometer W5 connects ground; Described the 4th pin with door U3B and the 5th pin are connected CPU respectively, and the 6th pin connects the 11 pin of impact damper U6; The crus secunda of described impact damper U6 connects CPU respectively to the 9th pin; First pin of described impact damper U6 connects ground.
5. multichannel resistance tester circuit according to claim 1, it is characterized in that, described keyboard interface circuit comprises diode D32, diode D33, diode D34, diode D35, diode D36, diode D37, diode D38, diode D39 and keyboard interface J5; Described diode D32, diode D33, diode D34, diode D35, diode D36, diode D37, diode D38, diode D39 positive pole connect CPU respectively, and negative pole connects keyboard interface J5 respectively.
6. multichannel resistance tester circuit according to claim 1, it is characterized in that, described communication interface circuit comprises 232 chip U22,485 chip U31, communication interface J11, electric capacity C45, electric capacity C46, electric capacity C47, electric capacity C48, electric capacity C49, resistance R70, resistance R71 and resistance R86; Described 232 chip U22 the 11 pin connect CPU and 485 chip U31 the 4th pin respectively; Described 232 chip U22 the 12 pin connect CPU and 485 chip U31 first pin respectively; Described electric capacity C45 is connected across between 232 chip first pin and tripod; Described electric capacity C46 is connected across between 232 chips the 4th pin and the 5th pin; Described 232 chip U22 the tenth tripods are connected communication interface J11 respectively with 14 pin; Described 232 chip U22 the 16 pin connect power supply VCC and electric capacity C49 respectively; Described electric capacity C47 one end connects power supply VCC, and the other end connects 232 chip U22 crus secundas; Described electric capacity C47 one end connects power supply ground, and the other end connects 232 chip U22 the 6th pin; Described 232 chip U22 the 15 pin connect ground; Described 485 chip U31 crus secundas are connected CPU respectively with tripod; Described 485 chip U31 the 5th pin connect respectively with resistance R71; Described 485 chip U31 the 6th pin contact resistance R86 and communication interface J11 respectively; Described resistance R70 connects power supply VCC, 485 chip U31 the 7th pin and resistance R86 respectively.
7., according to the arbitrary described multichannel resistance tester circuit of claim 1-6, it is characterized in that, described constant-current source circuit comprises four road constant current sources and constant current source interface J10; Described constant current source interface J10 connects CPU by four road constant current sources.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420858043.9U CN204556729U (en) | 2014-12-30 | 2014-12-30 | A kind of multichannel resistance tester circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420858043.9U CN204556729U (en) | 2014-12-30 | 2014-12-30 | A kind of multichannel resistance tester circuit |
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| CN204556729U true CN204556729U (en) | 2015-08-12 |
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| CN201420858043.9U Expired - Fee Related CN204556729U (en) | 2014-12-30 | 2014-12-30 | A kind of multichannel resistance tester circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109061305A (en) * | 2018-08-27 | 2018-12-21 | 常州星宇车灯股份有限公司 | A kind of array electric resistance measuring apparatus |
| CN113466563A (en) * | 2021-07-30 | 2021-10-01 | 深圳市汇创达科技股份有限公司 | Device for testing resistance of multi-path resistor |
-
2014
- 2014-12-30 CN CN201420858043.9U patent/CN204556729U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109061305A (en) * | 2018-08-27 | 2018-12-21 | 常州星宇车灯股份有限公司 | A kind of array electric resistance measuring apparatus |
| CN113466563A (en) * | 2021-07-30 | 2021-10-01 | 深圳市汇创达科技股份有限公司 | Device for testing resistance of multi-path resistor |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150812 Termination date: 20161230 |
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| CF01 | Termination of patent right due to non-payment of annual fee |