CN204516759U - Flip LED chips - Google Patents
Flip LED chips Download PDFInfo
- Publication number
- CN204516759U CN204516759U CN201520071245.3U CN201520071245U CN204516759U CN 204516759 U CN204516759 U CN 204516759U CN 201520071245 U CN201520071245 U CN 201520071245U CN 204516759 U CN204516759 U CN 204516759U
- Authority
- CN
- China
- Prior art keywords
- type electrode
- type
- insulating barrier
- pad
- gallium nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
Links
Landscapes
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
Flip LED chips, comprise substrate, n type gallium nitride layer, luminescent layer and P type gallium nitride layer, P type gallium nitride layer is formed with reflector or current extending, also comprise: the heat radiation groove of the first insulating barrier, P-type electrode, N-type electrode, the annular be formed in P-type electrode or N-type electrode, the second insulating barrier, the second insulating barrier are formed with louvre, louvre projection is in the horizontal plane positioned at heat radiation groove; Be deposited on the N pad be connected on the second insulating barrier and with N-type electrode; Be deposited on the P pad be connected on the second insulating barrier and with P-type electrode; Fill the heating column of full louvre, the top of heating column is concordant with the second surface of insulating layer or be exposed to the second insulating barrier.The utility model arranges the heating column through the second insulating barrier in N-type electrode or P-type electrode, directly can outwards derive heat or export to P pad and N pad, need not again through the second insulating barrier, and make chip cooling speed faster, radiating effect is better.
Description
Technical field
The utility model belongs to semiconductor optoelectronic chip technology field, particularly relates to a kind of flip LED chips.
Background technology
The problem that the heat radiation brought for the raising due to LED chip power is difficult, luminous efficiency is low and reliability reduces, industry has also gone out further improvement to the structure of LED chip.Such as, publication number be 103762283 Chinese utility model patent application discloses that a kind of LED flip chip, the structure that P pad and N pad are set on chip is adopted to realize heat conduction, its heat radiation, mainly through the P/N pad of two on chip, is then diffused into substrate heat from pad by AuSn or tin cream welding.But this LED chip is mainly through heat loss through conduction, and the thickness of its second insulating barrier is greater than 6um, and employing organic silica gel, because the second insulating barrier is thicker and its conductive coefficient is lower, heat is caused still to be difficult to derive, heat accumulation will affect chip reliability on chip, and increase light decay and reduce the chip life-span, heat conduction and the integrity problem of LED chip are not still solved.
Utility model content
The purpose of this utility model is to provide a kind of flip LED chips that can improve heat dissipation problem.
To achieve these goals, the utility model takes following technical solution:
Flip LED chips, comprise substrate and be grown on n type gallium nitride layer, luminescent layer and the P type gallium nitride layer on described substrate surface successively, described n type gallium nitride layer, luminescent layer and P type gallium nitride layer form the epitaxial loayer of chip, and described P type gallium nitride layer is formed with reflector or current extending; Also comprise: the first insulating barrier covering described epitaxial loayer and described reflector or current extending surface; The P-type electrode be electrically connected with described reflector or current extending, described P-type electrode is formed on described first insulating barrier; The N-type electrode be electrically connected with described n type gallium nitride layer, described N-type electrode is formed on described first insulating barrier; Be formed at the heat radiation groove of the annular in described P-type electrode or N-type electrode, described heat radiation groove is through to described first surface of insulating layer; Be covered in the second insulating barrier on described P-type electrode and first surface of insulating layer of N-type electrode on the surface and between P-type electrode and N-type electrode, described second insulating barrier fills full described heat radiation groove, described second insulating barrier is formed the louvre being through to described P-type electrode or N-type electrode surface, the projection in the horizontal plane of described louvre is positioned at described heat radiation groove; Be deposited on the N pad be connected on described second insulating barrier and with described N-type electrode; Be deposited on the P pad be connected on described second insulating barrier and with described P-type electrode; Fill the heating column of full described louvre, the top of described heating column is concordant with described second surface of insulating layer or be exposed to described second insulating barrier.
The utility model flip LED chips further technical scheme is: the top of described heating column is concordant with described second surface of insulating layer and be connected with described P pad and N pad.
The utility model flip LED chips further technical scheme is: described N pad and P pad portion are filled full described louvre and formed heating column.
The utility model flip LED chips further technical scheme is: described heat radiation groove type to be formed in described N-type electrode and to be positioned at the two ends of chip.
The utility model flip LED chips further technical scheme is: described heating column is covered on described second surface of insulating layer, and fills full described louvre, described heating column and described N pad and P pad mutually isolated.
The utility model flip LED chips further technical scheme is: described heat radiation groove type to be formed in described N-type electrode and to be positioned at the middle part of chip.
The utility model flip LED chips further technical scheme is: also comprise the groove running through described epitaxial loayer, expose described substrate surface; Run through described P type gallium nitride, luminescent layer until the N electrode hole on n type gallium nitride layer surface; Described first insulating barrier fills described groove and N electrode hole, described first insulating barrier is formed with the P type contact hole be connected with described reflector or current extending surface and the N-type contact hole be connected with described n type gallium nitride layer surface; Described P-type electrode be deposited on part first insulating barrier and P type contact hole in, be electrically connected with reflector or current extending by P type contact hole; Described N-type electrode be deposited on part first insulating barrier and N-type contact hole in, be electrically connected with n type gallium nitride layer by N-type contact hole; Described second insulating barrier is formed with the N-type electrode contact hole be connected with N-type electrode surface and the P-type electrode contact hole be connected with P-type electrode surface; Described N pad is deposited on interior with described N-type electrode contact hole on described second insulating barrier and is connected with described N-type electrode; Described P pad is deposited on interior with described P-type electrode contact hole on described second insulating barrier and is connected with described P-type electrode.
From above technical scheme, the utility model arranges the heating column through the second insulating barrier in N-type electrode or P-type electrode, heating column top is exposed the second insulating barrier or is contacted with P pad, N pad, P pad and N pad can outwards be derived or be exported to the heat that luminescent layer produces directly by heating column, need not again through the second insulating barrier, make chip cooling speed faster, radiating effect is better, and heating is few; And P pad and N pad upside-down mounting contact area are large, and luminescent layer is close to substrate, can be derived by heat easily.In addition, the second insulating barrier preferably adopts possesses certain flexible material, can absorb the thermal stress causing the infringement of LED chip inside, thus ensure the reliability of LED chip work.
Accompanying drawing explanation
Fig. 1 is the structural representation of the chip of the utility model embodiment 1;
Fig. 2 is the structural representation of the chip formation epitaxial loayer of the utility model embodiment 1;
Fig. 3 is the structural representation in the chip formation reflector of the utility model embodiment 1;
Fig. 4 is the chip formation groove of the utility model embodiment 1 and the structural representation in N electrode hole;
Fig. 5 is the structural representation that the chip of the utility model embodiment 1 forms the first insulating barrier;
Fig. 6 a is the chip formation P type contact hole of the utility model embodiment 1 and the structural representation of N-type contact hole;
Fig. 6 b is the chip formation P type contact hole of the utility model embodiment 1 and the vertical view of N-type contact hole;
Fig. 7 a is the chip formation N-type electrode of the utility model embodiment 1 and the structural representation of P-type electrode and heat radiation groove;
Fig. 7 b is the chip formation N-type electrode of the utility model embodiment 1 and the vertical view of P-type electrode and heat radiation groove;
Fig. 8 is the structural representation that the chip of the utility model embodiment 1 forms the second insulating barrier;
Fig. 9 a is the chip formation N-type electrode contact hole of the utility model embodiment 1 and the structural representation of P-type electrode contact hole;
Fig. 9 b is the chip formation N-type electrode contact hole of the utility model embodiment 1 and the vertical view of P-type electrode contact hole;
Figure 10 is the structural representation of the chip of the utility model embodiment 2;
Figure 11 a is the structural representation that the chip of the utility model embodiment 3 forms the groove that dispels the heat;
Figure 11 b is the view in another direction of Figure 11 a;
Figure 12 is the structural representation that the chip of the utility model embodiment 3 forms the second insulating barrier;
Figure 13 a is the structural representation of the chip formation louvre of the utility model embodiment 3;
Figure 13 b is the vertical view of the chip formation louvre of the utility model embodiment 3;
Figure 14 a is the structural representation that the chip of the utility model embodiment 3 forms N pad, P pad and heating column;
Figure 14 b is the vertical view that the chip of the utility model embodiment 3 forms N pad, P pad and heating column.
Below in conjunction with accompanying drawing, embodiment of the present utility model is described in more detail.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in detail; when describing the utility model embodiment in detail, for ease of illustrating, represent that the accompanying drawing of device architecture can be disobeyed general ratio and be done partial enlargement; and described schematic diagram is example, it should not limit the scope of the utility model protection at this.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, clearly aid illustration the utility model embodiment.
Embodiment 1
As shown in Figure 1, the flip LED chips of the present embodiment comprises substrate 1 and is grown on n type gallium nitride layer 11, luminescent layer 12 and the P type gallium nitride layer 13 on substrate 1 surface successively, P type gallium nitride layer 13 covers reflector 15, and n type gallium nitride layer 11, luminescent layer 12 and P type gallium nitride layer 13 form epitaxial loayer 2.At epitaxial loayer 2 and reflector 15 surface coverage first insulating barrier 16.First insulating barrier 16 is formed the P-type electrode 31 be electrically connected with reflector 15 and the N-type electrode 32 be electrically connected with n type gallium nitride layer 11.P-type electrode 31 or N-type electrode 32 are formed the heat radiation groove 65 being through to the annular on the first insulating barrier 16 surface.The first insulating barrier 16 on the surface of P-type electrode 31 and N-type electrode 32 and between P-type electrode and N-type electrode is coated with the second insulating barrier 22 on the surface, second insulating barrier 22 fills the groove 65 that completely dispels the heat, second insulating barrier 22 is formed the louvre 45 being through to P-type electrode or N-type electrode surface, the projection of this louvre 45 on horizontal plane (plane perpendicular to its axis) is positioned at heat radiation groove 65.The outward flange of louvre is positioned at heat radiation recess region, also comprises its outward flange and is just in time positioned on the inward flange of heat radiation groove.Second insulating barrier 22 is formed the N pad 26 that is connected with N-type electrode 32 and the P pad 27 be connected with P-type electrode 31, in louvre 45, be filled with heating column 55, heating column 55 connecting-type electrode and N pad 26 and P pad 27.
Below in conjunction with accompanying drawing, be described the preparation method of the flip LED chips of the present embodiment, this preparation method comprises the following steps:
Step one, as shown in Figure 2, substrate 1 is provided, the substrate 1 of the present embodiment is Sapphire Substrate, by MOCVD (Metal-organic Chemical Vapor Deposition, metallo-organic compound chemical gaseous phase deposition) at substrate 1 surface-borne epitaxial loayer 2, epitaxial loayer 2 growth course is followed successively by: at substrate 1 superficial growth n type gallium nitride layer 11, light-emitting layer grows 12 on n type gallium nitride layer 11, growing P-type gallium nitride layer 13 on luminescent layer 12;
Step 2, as shown in Figure 3, adopts evaporation and photoetching process to cover reflector 15 on P type gallium nitride layer 13, the material in this reflector 15 can be aluminium, nickel, silver or above-mentioned arbitrarily both alloy;
Step 3, as shown in Figure 4, by adopting ICP etch process to epitaxial loayer, epitaxial loayer is formed groove 3 and N electrode hole 4, the degree of depth of groove 3 is to substrate 1 surface and expose substrate 1, P type gallium nitride layer 13, luminescent layer 12 are run through until n type gallium nitride layer 11 is surperficial in N electrode hole 4, and the quantity in N electrode hole 4 can be multiple and distribute at epitaxial loayer surface uniform;
Step 4, as shown in Figure 5, by sputtering or spraying coating process surface coverage first insulating barrier 16 in epitaxial loayer and reflector, and the first insulating barrier 16 filling groove and N electrode hole simultaneously; First thickness of insulating layer is 1um ~ 2.5um, and its material can be aluminium nitride or silicon dioxide or silicon nitride or alundum (Al2O3) or Bragg reflecting layer DBR or silica gel or resin or acrylic acid, and Bragg reflecting layer is the multilayer alternating structure of silicon dioxide and titanium dioxide; In addition, first insulating layer material also can be organic silica gel, and organic silica gel itself possesses high filling micron order cavity ability, can effectively filling groove and the cavity left by N electrode hole, reduce the transmitting that this type of cavity is formed light, improve chip light emitting efficiency and prevent chip chamber from leaking electricity;
Step 5, as shown in figures 6 a and 6b, chemical etching technology is adopted to etch P type contact hole 5 and N-type contact hole 6 on the surface respectively at the first insulating barrier 16, wherein, P type contact hole 5 is deep to surface, reflector 15, reflector 15 is exposed bottom P type contact hole 5, N-type contact hole 6 is deep to n type gallium nitride layer 11 surface, exposes n type gallium nitride layer 11 bottom N-type contact hole 6;
Step 6, as shown in figs. 7 a and 7b, on the first insulating barrier 16, P-type electrode 31 and the N-type electrode 32 with wiring pattern is formed: on part first insulating barrier 16 and in P type contact hole, deposit P-type electrode 31 by sputtering or evaporation process, namely P-type electrode 31 is electrically connected with reflector 15 by P type contact hole, deposited n-type electrode 32 on part first insulating barrier 16 and in N-type contact hole, namely N-type electrode 32 is electrically connected with n type gallium nitride layer 11 by N-type contact hole;
P-type electrode 31 or N-type electrode 32 are formed the heat radiation groove 65 being through to the annular on the first insulating barrier 16 surface; The closed loop shape of heat radiation groove can be triangle, circle, quadrangle etc., and the heat radiation groove 65 of the present embodiment is formed in N-type electrode 32;
Step 7, as shown in Figure 8, form by spraying and photoetching process the surface that the second insulating barrier 22, second insulating barrier 22 covers P-type electrode 31, the surface of N-type electrode 32 and the first insulating barrier 16 between P-type electrode 31 and N-type electrode 32, and fill completely heat radiation groove 65;
The thickness of the second insulating barrier is 6 ~ 10um, material can adopt organic silica gel, organic silica gel does not absorb visible spectrum and possesses certain flexible material, can absorb the thermal stress causing inside of high-voltage chip to be damaged, thus ensure the reliability of high voltage LED chip work; Employing has the organic silica gel of low curing temperature (<200 DEG C), is applicable to thermal Finite device;
Step 8, as shown in figures 9 a and 9b, P-type electrode contact hole 29 and N-type electrode contact hole 28 is gone out at the second insulating barrier 22 surface etching, and be through to the louvre 45 on N-type electrode 32 surface, this louvre 45 projection is in the horizontal plane positioned at heat radiation groove 65 inner peripheral surface (to be parallel to the plane of substrate surface for horizontal plane), the position of louvre is corresponding with the position of heat radiation groove, the groove 65 that dispels the heat in the present embodiment is formed in N-type electrode 32, therefore louvre correspondence is through to N-type electrode surface, when the groove type that dispels the heat is formed in P-type electrode, louvre also correspondence is through to P-type electrode surface,
Expose P-type electrode 31 surface bottom P-type electrode contact hole 29, bottom N-type electrode contact hole 28, expose N-type electrode 32 surface; P-type electrode contact hole 29 and N-type electrode contact hole 28 can be multiple;
Step 9, the N pad 26 adopting printing and electroplating technology manufacture mutually insulated and P pad 27 (Fig. 1), N pad 26 is symmetrical with P pad 27, N pad 26 and P pad 27 cover part second insulating barrier 22 on the surface and be filled in N-type electrode contact hole and P-type electrode contact hole, N pad 26 is contacted with N-type electrode 32 by N-type electrode contact hole, P pad 27 is contacted by P-type electrode contact hole and P-type electrode 31, meanwhile, N pad 26 and P pad 27 are partially filled full louvre and form heating column 55.Interval between P pad and N pad is more than or equal to 150um, and material can be aluminium or nickel or titanium or platinum or gold.
In the present embodiment, heating column is filled louvre by P pad and N pad and is formed, heating column and P pad, N pad is integrated, heating column and P pad, the material of N pad is identical, but the material that heating column also can adopt other conductive coefficient to be not less than 100W/ (mK) is made, heating column is filled in louvre, with N-type electrode and P pad, N pad contacts, the heat that luminescent layer 12 is produced by heating column 55 by P pad and N pad directly exports to P pad and N pad by the first insulating barrier, need not again through the second insulating barrier, make high-voltage chip radiating rate faster, radiating effect is better, heating is few.
Preferably, can by electroplate or typography covers tin paste layer on N pad and P bond pad surface, the thickness of tin paste layer is 50 ~ 100um, tin paste layer is made up of Sn, Ag, Cu, wherein the mass percent of Sn is the mass percent of 96.5, Ag is 3.0, and surplus is Cu.Because this tin cream material has less voidage, can effectively reduce heat dissipation channel thermal resistance, and possess extremely strong adhesion strength and conductive capability.And this tin paste layer belongs to the material of directly welding, be conducive to simplifying encapsulation step, and form stress buffer between high-voltage chip and PCB substrate.
Embodiment 2
As shown in Figure 10, the flip LED chips of the present embodiment comprises substrate 1 and is grown on n type gallium nitride layer 11, luminescent layer 12 and the P type gallium nitride layer 13 on substrate 1 surface successively, P type gallium nitride layer 13 covers current extending 15 ', and n type gallium nitride layer 11, luminescent layer 12 and P type gallium nitride layer 13 form epitaxial loayer.At epitaxial loayer and current extending 15 ' surface coverage first insulating barrier 16 '.First insulating barrier 16 ' above forms the P-type electrode 31 be electrically connected with current extending 15 ' and the N-type electrode 32 be electrically connected with n type gallium nitride layer 11.N-type electrode 32 is formed the heat radiation groove 65 of the annular being through to the first insulating barrier 16 ' surface.The first insulating barrier 16 ' on the surface of P-type electrode 31 and N-type electrode 32 and between P-type electrode and N-type electrode is coated with the second insulating barrier 22 on the surface, second insulating barrier 22 fills the groove 65 that completely dispels the heat, second insulating barrier 22 is formed the louvre 45 being through to N-type electrode surface, this louvre 45 projection is in the horizontal plane positioned at heat radiation groove 65.Second insulating barrier 22 is formed the N pad 26 be connected with N-type electrode 32 and the P pad 27 be connected with P-type electrode 31, be filled with heating column 55 in louvre 45, heating column 55 connects N-type electrode 32 and N pad 26, P pad 27.
The present embodiment place different from embodiment 1 is, P type gallium nitride layer 13 forms current extending 15 ', current expansion layer material is indium tin oxide (ITO), current extending 15 ' is electrically connected with P-type electrode 31, and the first insulating barrier 16 ' is for possessing the Bragg reflection mirror layer of insulation property.
Embodiment 3
As shown in Figure 11 a and Figure 11 b, the first five step of the preparation process of the present embodiment is identical with embodiment 1, and the place different from embodiment 1 is: the groove 65 that dispels the heat is positioned in the middle part of chip, and the groove that dispels the heat in embodiment 1 is positioned at chip two ends.Heat radiation groove 65 is formed in N-type electrode 32.As shown in figure 12, the second insulating barrier 22 is covered in P-type electrode 31, N-type electrode 32 and the first insulating barrier 16 between P-type electrode and N-type electrode on the surface, and fills the groove 65 that completely dispels the heat.
As shown in Figure 13 a and Figure 13 b, the second insulating barrier 22 is formed P-type electrode contact hole 29 and N-type electrode contact hole 28 and is through to the louvre 45 on N-type electrode 32 surface, louvre 45 projection is in the horizontal plane positioned at heat radiation groove 65.As shown in Figure 14 a and Figure 14 b, the second insulating barrier 22 is formed and is symmetrically arranged in the N pad 26 at chip two ends and P pad 27, N pad 26 is electrically connected with N-type electrode 32, P pad 27 is electrically connected with P-type electrode 31.Form heating column 55 at the middle part of chip, heating column 55 covers the second insulating barrier 22 in the middle part of chip on the surface, and fills full louvre 45, heating column 55 and N pad 26 and P pad 27 mutually isolated.By heating column 55, heat is directly exported to outside from the first insulating barrier 16.
Above embodiment is only in order to illustrate that the technical solution of the utility model is not intended to limit, although be described in detail the utility model with reference to above-described embodiment, those of ordinary skill in the field are to be understood that, still can modify to embodiment of the present utility model or equivalent replacement, and not departing from any amendment of the utility model spirit and scope or equivalent replacement, it all should be encompassed among right of the present utility model.
Claims (7)
1. flip LED chips, comprise substrate and be grown on n type gallium nitride layer, luminescent layer and the P type gallium nitride layer on described substrate surface successively, described n type gallium nitride layer, luminescent layer and P type gallium nitride layer form the epitaxial loayer of chip, and described P type gallium nitride layer is formed with reflector or current extending;
It is characterized in that, also comprise:
Cover first insulating barrier on described epitaxial loayer and described reflector or current extending surface;
The P-type electrode be electrically connected with described reflector or current extending, described P-type electrode is formed on described first insulating barrier;
The N-type electrode be electrically connected with described n type gallium nitride layer, described N-type electrode is formed on described first insulating barrier;
Be formed at the heat radiation groove of the annular in described P-type electrode or N-type electrode, described heat radiation groove is through to described first surface of insulating layer;
Be covered in the second insulating barrier on described P-type electrode and first surface of insulating layer of N-type electrode on the surface and between P-type electrode and N-type electrode, described second insulating barrier fills full described heat radiation groove, described second insulating barrier is formed the louvre being through to described P-type electrode or N-type electrode surface, the projection in the horizontal plane of described louvre is positioned at described heat radiation groove;
Be deposited on the N pad be connected on described second insulating barrier and with described N-type electrode;
Be deposited on the P pad be connected on described second insulating barrier and with described P-type electrode;
Fill the heating column of full described louvre, the top of described heating column is concordant with described second surface of insulating layer or be exposed to described second insulating barrier.
2. flip LED chips as claimed in claim 1, is characterized in that: the top of described heating column is concordant with described second surface of insulating layer and be connected with described P pad and N pad.
3. flip LED chips as claimed in claim 1, is characterized in that: described N pad and P pad portion are filled full described louvre and formed heating column.
4. flip LED chips as claimed in claim 2, is characterized in that: described heat radiation groove type to be formed in described N-type electrode and to be positioned at the two ends of chip.
5. flip LED chips as claimed in claim 1, is characterized in that: described heating column is covered on described second surface of insulating layer, and fills full described louvre, described heating column and described N pad and P pad mutually isolated.
6. flip LED chips as claimed in claim 5, is characterized in that: described heat radiation groove type to be formed in described N-type electrode and to be positioned at the middle part of chip.
7. upside-down mounting high voltage LED chip as claimed in claim 1, is characterized in that: also comprise
Run through described epitaxial loayer, expose the groove of described substrate surface;
Run through described P type gallium nitride, luminescent layer until the N electrode hole on n type gallium nitride layer surface;
Described first insulating barrier fills described groove and N electrode hole, described first insulating barrier is formed with the P type contact hole be connected with described reflector or current extending surface and the N-type contact hole be connected with described n type gallium nitride layer surface;
Described P-type electrode be deposited on part first insulating barrier and P type contact hole in, be electrically connected with reflector or current extending by P type contact hole;
Described N-type electrode be deposited on part first insulating barrier and N-type contact hole in, be electrically connected with n type gallium nitride layer by N-type contact hole;
Described second insulating barrier is formed with the N-type electrode contact hole be connected with N-type electrode surface and the P-type electrode contact hole be connected with P-type electrode surface;
Described N pad is deposited on interior with described N-type electrode contact hole on described second insulating barrier and is connected with described N-type electrode; Described P pad is deposited on interior with described P-type electrode contact hole on described second insulating barrier and is connected with described P-type electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520071245.3U CN204516759U (en) | 2015-01-30 | 2015-01-30 | Flip LED chips |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520071245.3U CN204516759U (en) | 2015-01-30 | 2015-01-30 | Flip LED chips |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204516759U true CN204516759U (en) | 2015-07-29 |
Family
ID=53714705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520071245.3U Withdrawn - After Issue CN204516759U (en) | 2015-01-30 | 2015-01-30 | Flip LED chips |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204516759U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104681704A (en) * | 2015-01-30 | 2015-06-03 | 大连德豪光电科技有限公司 | Flip LED (Light Emitting Diode) chip and production method thereof |
| CN106711316A (en) * | 2015-11-18 | 2017-05-24 | 晶元光电股份有限公司 | Light-emitting element |
| CN107452736A (en) * | 2016-05-27 | 2017-12-08 | 阿聚尔斯佩西太阳能有限责任公司 | Light emitting diode |
| CN110931610A (en) * | 2019-05-08 | 2020-03-27 | 深圳第三代半导体研究院 | Front-mounted integrated unit diode chip |
| CN112802953A (en) * | 2020-12-28 | 2021-05-14 | 厦门三安光电有限公司 | Light-emitting diode and preparation method thereof |
-
2015
- 2015-01-30 CN CN201520071245.3U patent/CN204516759U/en not_active Withdrawn - After Issue
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104681704A (en) * | 2015-01-30 | 2015-06-03 | 大连德豪光电科技有限公司 | Flip LED (Light Emitting Diode) chip and production method thereof |
| CN104681704B (en) * | 2015-01-30 | 2017-08-29 | 大连德豪光电科技有限公司 | Flip LED chips and preparation method thereof |
| CN106711316A (en) * | 2015-11-18 | 2017-05-24 | 晶元光电股份有限公司 | Light-emitting element |
| CN106711316B (en) * | 2015-11-18 | 2020-09-04 | 晶元光电股份有限公司 | Light emitting element |
| CN107452736A (en) * | 2016-05-27 | 2017-12-08 | 阿聚尔斯佩西太阳能有限责任公司 | Light emitting diode |
| CN107452736B (en) * | 2016-05-27 | 2019-06-18 | 阿聚尔斯佩西太阳能有限责任公司 | Light emitting diode |
| CN110931610A (en) * | 2019-05-08 | 2020-03-27 | 深圳第三代半导体研究院 | Front-mounted integrated unit diode chip |
| CN110931610B (en) * | 2019-05-08 | 2022-09-20 | 深圳第三代半导体研究院 | Front-mounted integrated unit diode chip |
| CN112802953A (en) * | 2020-12-28 | 2021-05-14 | 厦门三安光电有限公司 | Light-emitting diode and preparation method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104681704A (en) | Flip LED (Light Emitting Diode) chip and production method thereof | |
| CN104779339B (en) | Upside-down mounting high voltage LED chip and preparation method thereof | |
| CN204516759U (en) | Flip LED chips | |
| CN104300069B (en) | High voltage led chip and preparation method thereof | |
| CN205159352U (en) | Light emitting apparatus | |
| CN102683534B (en) | Vertical type alternating-current light-emitting diode device and manufacturing method thereof | |
| CN102130260B (en) | Luminous device and manufacturing method thereof | |
| CN106981550B (en) | Easy-packaging easy-heat-dissipation inverted high-voltage LED chip | |
| CN204596843U (en) | Upside-down mounting high voltage LED chip | |
| CN103066195A (en) | Inverted light emitting diode using graphene as thermal conductive layer | |
| TW200832765A (en) | Heat conducting slug having multi-step structure and the light emitting diode package using the same | |
| CN103236490B (en) | LED flip chip packaging, its manufacture method and use its encapsulating structure | |
| CN104638086A (en) | LED (light-emitting diode) chip of three-dimensional electrode structure with high current density | |
| CN111129256A (en) | Silver mirror-based flip high-voltage chip and manufacturing method thereof | |
| CN102593304B (en) | High-power light-emitting diode (LED) light using ceramic for radiating | |
| CN107293535A (en) | A kind of LED chip structure based on flip-chip packaged | |
| CN204538029U (en) | A kind of flip LED chips | |
| CN203536473U (en) | Flip chip structure of high-voltage LED chips | |
| CN202871856U (en) | Wafer-level LED chip packaging structure | |
| CN102214746B (en) | Method for manufacturing gallium nitride-based power LED (Light-Emitting Diode) chip | |
| CN105990390B (en) | A kind of flip LED chips and preparation method thereof | |
| CN204348753U (en) | A kind of high voltage LED chip | |
| CN204216064U (en) | A kind of light-emitting diode | |
| CN104064652A (en) | Light-emitting Element | |
| CN105932143B (en) | A kind of manufacturing method of flip LED chips |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20150729 Effective date of abandoning: 20170829 |