CN204422648U - A kind of modulation domain frequency counter - Google Patents
A kind of modulation domain frequency counter Download PDFInfo
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- CN204422648U CN204422648U CN201520111919.8U CN201520111919U CN204422648U CN 204422648 U CN204422648 U CN 204422648U CN 201520111919 U CN201520111919 U CN 201520111919U CN 204422648 U CN204422648 U CN 204422648U
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- counter
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Abstract
The utility model discloses a kind of modulation domain frequency counter, comprise the E counter of measured signal counting and the T counter to clock signal counting, preparation gate generator produces preparation signal strobe and is sent to E synchronous gate; Within the frequency measurement cycle, E synchronous gate triggers E latch when measured signal pulse arrives makes it latch the count value of E counter, and simultaneously E synchronous gate also triggers T synchronous gate and makes it start T latches T counter when clock signal pulse arrives; Measure ranking circuit and produce interpolation pulse when E synchronous gate triggers, this interpolation pulse terminates when T synchronous gate triggers; Measure ranking circuit when frequency measurement end cycle, startup storer stores the data in E latch and T latch respectively, finally calculates measured signal frequency by arithmetic processing circuit.Change preparation signal strobe rising edge and start counting, negative edge stops the working method of counting, can calculate the frequency change of adjacent 2 or the frequency change of any two points according to actual needs.
Description
Technical field
The present invention relates to a kind of modulation domain frequency counter, belong to frequency counter field.
Background technology
Waving map instrument, frequency domain test instrument and modulation domain testing tool three major types is divided at present for the instrument measuring electric signal.Waving map instrument: it is observed the time domain change of signal, voltage (amplitude) value of display time to time change; Frequency domain test instrument: the frequency domain change of its observation signal, shows the input signal amplitude value changed with frequency; Modulation domain testing tool: the change of its observation signal modulation domain, the frequency values of the signal of display time to time change.
At present, high resolution frequency counter mainly adopts measuring technique+analoging interpolation technology reciprocal to carry out frequency measurement.
As shown in Figure 1, f
xfor the frequency of measured signal, f
0for the frequency of reference clock, when the rising edge preparing signal strobe arrives, measured signal f
xopen counting door, carry out the counting of measured signal and time clock, interpolation expanding element carries out broadening counting.When the negative edge preparing signal strobe arrives, measured signal f
xclose counting door, stop the counting of measured signal and time clock, interpolation expanding element terminates broadening counting.Visible when needing the continuous coverage carrying out frequency, because low level time is longer in preparation signal strobe one-period, causes the step-by-step counting omitting measured signal when its low level, cannot continuous coverage be realized.
Summary of the invention
Goal of the invention: the present invention proposes a kind of modulation domain frequency counter, achieves the continuous coverage to measured signal frequency.
Technical scheme: the technical solution used in the present invention is a kind of modulation domain frequency counter, comprise the E counter of measured signal counting and the T counter to clock signal counting, preparation gate generator produces preparation signal strobe and is sent to E synchronous gate;
Within the frequency measurement cycle, E synchronous gate triggers E latch when measured signal pulse arrives makes it latch the count value of E counter, and simultaneously E synchronous gate also triggers T synchronous gate and makes it start T latches T counter when clock signal pulse arrives;
Measure ranking circuit and produce interpolation pulse when E synchronous gate triggers, this interpolation pulse terminates when T synchronous gate triggers;
Measure ranking circuit when frequency measurement end cycle, startup storer stores the data in E latch and T latch respectively, finally calculates measured signal frequency by arithmetic processing circuit.
Preferably, described preparation gate generator be one can the counter of heavy cartridges 24 preset numbers.
Preferably, described E counter is 32 ZDT counters, and described T counter is 32 ZDT counters.
Preferably, described measurement ranking circuit is the MAX7000 CPLD chip of altera corp, and described arithmetic processing circuit is the MAX7000 CPLD chip of altera corp.
The continuous frequency measuring method of a kind of modulation domain frequency counter, comprises the following steps:
Be a frequency measurement cycle with the time interval of preparing between signal strobe adjacent pulse, the pulse width of described preparation signal strobe is less than or equal to minimum interval between measured signal adjacent pulse;
In the frequency measurement cycle, when measured signal rising edge or negative edge arrive, between itself and clock signal on the horizon, formation time is poor, and the generation moment of setting interpolation pulse equals measured signal rising edge or negative edge moment, and interpolation pulse width equals the described mistiming;
In the frequency measurement cycle, obtain measured signal umber of pulse in this cycle by counter, then deduct by clock signal the initial time that interpolation pulse width obtains this cycle respectively;
Finally calculate measured signal frequency.
Preferably, described minimum measuring period is the time interval between preparation signal strobe adjacent pulse rising edge, or the time interval between negative edge.
Beneficial effect: the present invention changes preparation signal strobe rising edge and starts counting, negative edge stops the working method of counting, the frequency change of adjacent 2 or the frequency change of any two points can be calculated according to actual needs, namely the pulse width of preparation signal strobe is contracted to the minimum interval being less than measured signal adjacent pulse, makes frequency counter can continuous coverage measured signal frequency.
Accompanying drawing explanation
Fig. 1 is existing frequency counter working timing figure;
Fig. 2 is frequency counter working timing figure of the present invention;
Fig. 3 is the structural representation of frequency counter of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, illustrate the present invention further, these embodiments should be understood only be not used in for illustration of the present invention and limit the scope of the invention, after having read the present invention, the amendment of those skilled in the art to various equivalents of the present invention has all fallen within the application's claims limited range.
As shown in Figure 2, f
xfor the frequency of measured signal, f
0for the frequency of clock signal, all use 32 ZDT zero rolling counters forwards idle time to measured signal and clock signal, two counting chains do not count off and in measuring process.
Preparation signal strobe is produced by preparation gate generator, is continuous print owing to measuring, so preparation signal strobe is also produce continuously.When the rising edge preparing signal strobe arrives, counting door is opened in measured signal.Between the rising edge that preparation signal strobe is adjacent, E counter is to the rising edge counting of measured signal and in the pulse of first measured signal rising edge place generation interpolation, the pulse width of interpolation pulse is τ
n.
Between two adjacent rising edges of preparation signal strobe during this period of time in complete measurement to frequency input signal value.Therefore, each rising edge indication of preparation signal strobe the initial of one-shot measurement, also indicates the end of one-shot measurement, and both is simultaneously.
In one-shot measurement, when measured signal first rising edge arrives, the pulse of T counter to clock signal counts to get burst length n
tn.Because measured signal rising edge might not overlap in time with the pulse of next clock signal, therefore have a mistiming between the two, and the pulse width τ of interpolation pulse
nnamely be set as identical with this mistiming.And the definite moment corresponding to measured signal first rising edge is t
n, therefore can be obtained by sequential relationship: t
n=n
tn-τ
n.
Meanwhile E counter counts the rising edge of measured signal in this time measuring, due to be continuous coverage we be set in this time measure in measured signal first rising edge place, the count value of E counter is n
en, be so n to the count value of measured signal first rising edge place E counter in measurement next time
en+1.
Obtain the count value n of E counter
enwith the definite moment t corresponding to this rising edge
n.By t
nwith n
en, measured signal frequency f in the time period that can obtain one-shot measurement further
x:
The present invention changes preparation signal strobe rising edge and starts counting, negative edge stops the working method of counting, the frequency change (pulse width of preparation signal strobe is contracted to the minimum interval being less than measured signal adjacent pulse) of the frequency change of adjacent 2 or any two points can be calculated according to actual needs, make frequency counter can continuous coverage measured signal frequency.
Correspondingly, invention also discloses a kind of modulation domain frequency counter, it is input as measured signal and clock signal.CPU sends control signal to preparation gate generator, and this preparation gate generator sends continuous print preparation signal strobe to E synchronous gate.The pulse width of described preparation signal strobe should be less than the minimum value at measured signal adjacent pulse interval, and the interval of preparing between signal strobe adjacent pulse should equal the frequency measurement time.Because measurement is continual, so preparation signal strobe is also produce continuously.The frequency measurement cycle is exactly time interval of adjacent two rising edges of preparation signal strobe.Described preparation gate generator can use one can the counter of heavy cartridges 24 preset numbers.
Measured signal inputs E counter and E synchronous gate simultaneously.When the rising edge preparing signal strobe arrives, E synchronous gate is triggered, and then triggers E latch and make it preserve count value in E counter.Synchronization, E synchronous gate also triggers measures the rising edge that ranking circuit produces an interpolation pulse.
Clock signal inputs T counter and T synchronous gate simultaneously.While E synchronous gate triggers, trigger T synchronous gate when rising edge clock signal also just arrives, T synchronous gate triggers T latch makes it preserve count value in T counter.Synchronization, T synchronous gate also triggers measurement ranking circuit, the interpolation pulse shaping negative edge making it produce.
Described E counter and T counter are 32 ZDT counters.
Before next one preparation signal strobe rising edge arrives, measure ranking circuit flip-flop storage one and storer two by the pulse-width data of the count value in E latch and T latch, interpolation pulse stored in storer.Finally calculate frequency values by arithmetic processing circuit.Described measurement ranking circuit and arithmetic processing circuit all can use the MAX7000CPLD chip of altera corp, and its pin is less than 5ns to the delay of pin.
Claims (6)
1. a modulation domain frequency counter, is characterized in that, comprise the E counter of measured signal counting and the T counter to clock signal counting, preparation gate generator produces preparation signal strobe and is sent to E synchronous gate;
Within the frequency measurement cycle, E synchronous gate triggers E latch when measured signal pulse arrives makes it latch the count value of E counter, and simultaneously E synchronous gate also triggers T synchronous gate and makes it start T latches T counter when clock signal pulse arrives;
Measure ranking circuit and produce interpolation pulse when E synchronous gate triggers, this interpolation pulse terminates when T synchronous gate triggers;
Measure ranking circuit when frequency measurement end cycle, startup storer stores the data in E latch and T latch respectively, finally calculates measured signal frequency by arithmetic processing circuit.
2. modulation domain frequency counter according to claim 1, is characterized in that, described preparation gate generator be one can the counter of heavy cartridges 24 preset numbers.
3. modulation domain frequency counter according to claim 1, is characterized in that, described E counter is 32 ZDT counters.
4. modulation domain frequency counter according to claim 1, is characterized in that, described T counter is 32 ZDT counters.
5. modulation domain frequency counter according to claim 1, is characterized in that, described measurement ranking circuit is the MAX7000CPLD chip of altera corp.
6. modulation domain frequency counter according to claim 1, is characterized in that, described arithmetic processing circuit is the MAX7000CPLD chip of altera corp.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520111919.8U CN204422648U (en) | 2015-02-15 | 2015-02-15 | A kind of modulation domain frequency counter |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520111919.8U CN204422648U (en) | 2015-02-15 | 2015-02-15 | A kind of modulation domain frequency counter |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104635046A (en) * | 2015-02-15 | 2015-05-20 | 金陵科技学院 | Modulation domain frequency counter and continuous frequency measurement method thereof |
| CN106645945A (en) * | 2016-12-09 | 2017-05-10 | 中国电子科技集团公司第五十研究所 | Novel modulation domain analysis method based on FFT |
| CN106771652A (en) * | 2016-11-15 | 2017-05-31 | 中国电子科技集团公司第四十研究所 | A kind of short time interval modulation domain measurement time sequence design method |
| CN110988468A (en) * | 2019-12-18 | 2020-04-10 | 北京自动化控制设备研究所 | Frequency measurement device and method applied to inertial navigation system |
| CN113030567A (en) * | 2019-12-25 | 2021-06-25 | 航天科工惯性技术有限公司 | Frequency measurement method and device based on single chip microcomputer |
-
2015
- 2015-02-15 CN CN201520111919.8U patent/CN204422648U/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104635046A (en) * | 2015-02-15 | 2015-05-20 | 金陵科技学院 | Modulation domain frequency counter and continuous frequency measurement method thereof |
| CN106771652A (en) * | 2016-11-15 | 2017-05-31 | 中国电子科技集团公司第四十研究所 | A kind of short time interval modulation domain measurement time sequence design method |
| CN106771652B (en) * | 2016-11-15 | 2019-11-12 | 中国电子科技集团公司第四十一研究所 | A kind of short time interval modulation domain measurement time sequence design method |
| CN106645945A (en) * | 2016-12-09 | 2017-05-10 | 中国电子科技集团公司第五十研究所 | Novel modulation domain analysis method based on FFT |
| CN110988468A (en) * | 2019-12-18 | 2020-04-10 | 北京自动化控制设备研究所 | Frequency measurement device and method applied to inertial navigation system |
| CN110988468B (en) * | 2019-12-18 | 2022-01-11 | 北京自动化控制设备研究所 | Frequency measurement device and method applied to inertial navigation system |
| CN113030567A (en) * | 2019-12-25 | 2021-06-25 | 航天科工惯性技术有限公司 | Frequency measurement method and device based on single chip microcomputer |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150624 Termination date: 20180215 |