CN204244511U - LED drive current adjusting device - Google Patents
LED drive current adjusting device Download PDFInfo
- Publication number
- CN204244511U CN204244511U CN201420587128.8U CN201420587128U CN204244511U CN 204244511 U CN204244511 U CN 204244511U CN 201420587128 U CN201420587128 U CN 201420587128U CN 204244511 U CN204244511 U CN 204244511U
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- Prior art keywords
- resistance
- nmos tube
- termination
- pole
- connects
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Abstract
The utility model discloses a kind of LED drive current adjusting device.LED drive current adjusting device comprises the first resistance, the second resistance, the 3rd resistance, the 4th resistance, LED, fly-wheel diode, inductance, the first NMOS tube, the second NMOS tube, the 3rd NMOS tube, operational amplifier, error amplifier and output buffering.The LED drive current adjusting device utilizing the utility model to provide can stablize the drive current in LED well.
Description
Technical field
The utility model relates to integrated circuit technique, refers more particularly to LED drive current adjusting device.
Background technology
In LED drive power system, the stability of the upper electric current of LED is very important, is provided with drive current adjustment device with the electric current on stable LED for this reason.
Summary of the invention
The utility model is intended to solve the deficiencies in the prior art, provides a kind of adjusting device stablizing drive current in LED.
LED drive current adjusting device, comprises the first resistance, the second resistance, the 3rd resistance, the 4th resistance, LED, fly-wheel diode, inductance, the first NMOS tube, the second NMOS tube, the 3rd NMOS tube, operational amplifier, error amplifier and output buffering:
One termination input voltage VIN of described first resistance and one end of described second resistance and the N pole of described fly-wheel diode, the P pole of LED described in another termination and the positive input terminal of described error amplifier;
One termination input voltage VIN of described second resistance and one end of described first resistance and the N pole of described fly-wheel diode, the drain electrode of the first NMOS tube described in another termination and the negative input end of described error amplifier;
The negative input end of operational amplifier described in one termination of described 3rd resistance and the source electrode of described first NMOS tube, one end of the 4th resistance described in another termination and the drain electrode of described second NMOS tube;
One end of 3rd resistance described in one termination of described 4th resistance and the drain electrode of described second NMOS tube, other end ground connection;
The P pole of described LED connects one end of described first resistance and the positive input terminal of described error amplifier, and N pole connects one end of described inductance;
The P pole of described fly-wheel diode connects one end of described inductance and the drain electrode of described 3rd NMOS tube, and N pole connects one end of input voltage VIN and described first resistance and one end of described second resistance;
The N pole of one termination LED of described inductance, the P pole of fly-wheel diode described in another termination and the drain electrode of described 3rd NMOS tube;
The grid of described first NMOS tube connects the output of described operational amplifier, and drain electrode connects one end of described second resistance and the negative input end of described error amplifier, and source electrode connects the negative input end of described operational amplifier and one end of described 3rd resistance;
The grid of described second NMOS tube connects the described grid exporting output and described 3rd NMOS tube cushioned, and drain electrode connects one end of described 3rd resistance and one end of described 4th resistance, source ground;
The grid of described 3rd NMOS tube connects the described grid exporting output and described second NMOS tube cushioned, and drain electrode connects the P pole of described fly-wheel diode and one end of described inductance, source ground;
The positive input termination reference voltage V REF of described operational amplifier, the source electrode of the first NMOS tube described in negative input termination and one end of described 3rd resistance, export the grid of the first NMOS tube described in termination;
One end of first resistance described in the positive input termination of described error amplifier and the P pole of described LED, one end of the second resistance described in negative input termination and the drain electrode of described first NMOS tube, export the input exporting buffering described in termination;
The described input exporting buffering connects the output of described error amplifier, exports the grid of the 3rd NMOS tube and the grid of described second NMOS tube described in termination;
Described second resistance, described operational amplifier, described first NMOS tube, described 3rd resistance and described 4th resistance form the circuit producing reference current, make the voltage constant that this electric current produces on described second resistance, thus as the reference point of described first ohmically voltage;
Described first resistance, described second resistance, described error amplifier, described output buffering and described second NMOS tube form the main adjustment path of the electric current controlled in LED;
When the electric current in LED increases, described first ohmically electric current also increases, described first ohmically voltage just increases, now just increase with the difference of described second ohmically voltage, what connect due to described first resistance is the positive input terminal of error amplifier, the voltage of such error amplifier output reduces, the grid voltage of described 3rd NMOS tube is caused to reduce, the output current of described 3rd NMOS tube will be reduced like this, reach the electric current effect reduced in described LED, reach new balance;
When the electric current in LED reduces, described first ohmically electric current also reduces, described first ohmically voltage just reduces, now also increase with the difference of described second ohmically voltage, but what connect due to described first resistance is the positive input terminal of error amplifier, the voltage of such error amplifier output increases, the grid voltage of described 3rd NMOS tube is caused to increase, the output current of described 3rd NMOS tube will be increased like this, reach the electric current effect increased in described LED, reach new balance, now because the described output exporting buffering also can make described second NMOS tube conducting, make described 4th resistance short circuit to such an extent as to described ohmically electric current is increased, the negative input end of described error amplifier and the difference of positive input terminal is made to strengthen further, whole system is made to enter new poised state fast.
The LED drive current adjusting device utilizing the utility model to provide can stablize the drive current in LED well.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of LED drive current adjusting device of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model content is further illustrated.
LED drive current adjusting device, as shown in Figure 1, comprise the first resistance 101, second resistance 105, the 3rd resistance 108, the 4th resistance 109, LED 102, fly-wheel diode 104, inductance 103, first NMOS tube 107, second NMOS tube 110, the 3rd NMOS tube 113, operational amplifier 106, error amplifier 111 and export buffering 112:
One termination input voltage VIN of described first resistance 101 and described one end of second resistance 102 and the N pole of described fly-wheel diode 104, the P pole of LED 102 described in another termination and the positive input terminal of described error amplifier 111;
One termination input voltage VIN of described second resistance 105 and described one end of first resistance 101 and the N pole of described fly-wheel diode 104, the drain electrode of the first NMOS tube 107 described in another termination and the negative input end of described error amplifier 111;
The negative input end of operational amplifier 106 described in one termination of described 3rd resistance 108 and the source electrode of described first NMOS tube 107, one end of the 4th resistance 109 described in another termination and the drain electrode of described second NMOS tube 110;
One end of 3rd resistance 108 described in one termination of described 4th resistance 109 and the drain electrode of described second NMOS tube 110, other end ground connection;
The P pole of described LED 102 connects described one end of first resistance 101 and the positive input terminal of described error amplifier 111, and N pole connects one end of described inductance 103;
The P pole of described fly-wheel diode 104 connects one end of described inductance 103 and the drain electrode of described 3rd NMOS tube 113, and N pole connects one end of input voltage VIN and described first resistance 101 and one end of described second resistance 102;
The N pole of one termination LED 102 of described inductance 103, the P pole of fly-wheel diode 104 described in another termination and the drain electrode of described 3rd NMOS tube 113;
The grid of described first NMOS tube 107 connects the output of described operational amplifier 106, drain electrode connects described one end of second resistance 105 and the negative input end of described error amplifier 111, and source electrode connects the negative input end of described operational amplifier 106 and one end of described 3rd resistance 108;
The grid of described second NMOS tube 110 connects the output of described output buffering 112 and the grid of described 3rd NMOS tube 113, and drain electrode connects one end of described 3rd resistance 108 and one end of described 4th resistance 109, source ground;
The grid of described 3rd NMOS tube 113 connects the output of described output buffering 112 and the grid of described second NMOS tube 110, and drain electrode connects the P pole of described fly-wheel diode 104 and one end of described inductance 103, source ground;
The positive input termination reference voltage V REF of described operational amplifier 106, the source electrode of the first NMOS tube 107 described in negative input termination and one end of described 3rd resistance 108, export the grid of the first NMOS tube 107 described in termination;
One end of first resistance 101 described in the positive input termination of described error amplifier 111 and the P pole of described LED 102, one end of second resistance 105 described in negative input termination and the drain electrode of described first NMOS tube 107, export the input exporting buffering 112 described in termination;
The input of described output buffering 112 connects the output of described error amplifier 111, exports the grid of the 3rd NMOS tube 113 and the grid of described second NMOS tube 110 described in termination;
Described second resistance 105, described operational amplifier 106, described first NMOS tube 107, described 3rd resistance 108 and described 4th resistance 109 form the circuit producing reference current, make the voltage constant that this electric current produces on described second resistance 105, thus as the reference point of the voltage on described first resistance 101;
Described first resistance 101, described second resistance 105, described error amplifier 111, described output buffering 112 and described second NMOS tube 110 form the main adjustment path of the electric current regulated in LED;
When the electric current in LED increases, electric current on described first resistance 101 also increases, voltage on described first resistance 101 just increases, now just increase with the difference of the voltage on described second resistance 105, what connect due to described first resistance 101 is the positive input terminal of error amplifier 111, the voltage of such error amplifier output reduces, the grid voltage of described 3rd NMOS tube 113 is caused to reduce, the output current of described 3rd NMOS tube 113 will be reduced like this, reach the electric current effect reduced in described LED 102, reach new balance;
When the electric current in LED reduces, electric current on described first resistance 101 also reduces, voltage on described first resistance 101 just reduces, now also increase with the difference of the voltage on described second resistance 105, but what connect due to described first resistance 101 is the positive input terminal of error amplifier 111, the voltage of such error amplifier output increases, the grid voltage of described 3rd NMOS tube 113 is caused to increase, the output current of described 3rd NMOS tube 113 will be increased like this, reach the electric current effect increased in described LED 102, reach new balance, now because the output of described output buffering 112 also can make described second NMOS tube 110 conducting, make described 4th resistance 109 short circuit to such an extent as to the electric current on described resistance 105 is increased, the negative input end of described error amplifier 111 and the difference of positive input terminal is made to strengthen further, whole system is made to enter new poised state fast.
Claims (1)
1.LED drive current adjustment device, is characterized in that comprising the first resistance, the second resistance, the 3rd resistance, the 4th resistance, LED, fly-wheel diode, inductance, the first NMOS tube, the second NMOS tube, the 3rd NMOS tube, operational amplifier, error amplifier and output buffering:
One termination input voltage VIN of described first resistance and one end of described second resistance and the N pole of described fly-wheel diode, the P pole of LED described in another termination and the positive input terminal of described error amplifier;
One termination input voltage VIN of described second resistance and one end of described first resistance and the N pole of described fly-wheel diode, the drain electrode of the first NMOS tube described in another termination and the negative input end of described error amplifier;
The negative input end of operational amplifier described in one termination of described 3rd resistance and the source electrode of described first NMOS tube, one end of the 4th resistance described in another termination and the drain electrode of described second NMOS tube;
One end of 3rd resistance described in one termination of described 4th resistance and the drain electrode of described second NMOS tube, other end ground connection;
The P pole of described LED connects one end of described first resistance and the positive input terminal of described error amplifier, and N pole connects one end of described inductance;
The P pole of described fly-wheel diode connects one end of described inductance and the drain electrode of described 3rd NMOS tube, and N pole connects one end of input voltage VIN and described first resistance and one end of described second resistance;
The N pole of one termination LED of described inductance, the P pole of fly-wheel diode described in another termination and the drain electrode of described 3rd NMOS tube;
The grid of described first NMOS tube connects the output of described operational amplifier, and drain electrode connects one end of described second resistance and the negative input end of described error amplifier, and source electrode connects the negative input end of described operational amplifier and one end of described 3rd resistance;
The grid of described second NMOS tube connects the described grid exporting output and described 3rd NMOS tube cushioned, and drain electrode connects one end of described 3rd resistance and one end of described 4th resistance, source ground;
The grid of described 3rd NMOS tube connects the described grid exporting output and described second NMOS tube cushioned, and drain electrode connects the P pole of described fly-wheel diode and one end of described inductance, source ground;
The positive input termination reference voltage V REF of described operational amplifier, the source electrode of the first NMOS tube described in negative input termination and one end of described 3rd resistance, export the grid of the first NMOS tube described in termination;
One end of first resistance described in the positive input termination of described error amplifier and the P pole of described LED, one end of the second resistance described in negative input termination and the drain electrode of described first NMOS tube, export the input exporting buffering described in termination;
The described input exporting buffering connects the output of described error amplifier, exports the grid of the 3rd NMOS tube and the grid of described second NMOS tube described in termination.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420587128.8U CN204244511U (en) | 2014-10-08 | 2014-10-08 | LED drive current adjusting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420587128.8U CN204244511U (en) | 2014-10-08 | 2014-10-08 | LED drive current adjusting device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204244511U true CN204244511U (en) | 2015-04-01 |
Family
ID=52773946
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420587128.8U Expired - Fee Related CN204244511U (en) | 2014-10-08 | 2014-10-08 | LED drive current adjusting device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204244511U (en) |
-
2014
- 2014-10-08 CN CN201420587128.8U patent/CN204244511U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150401 Termination date: 20151008 |
|
| EXPY | Termination of patent right or utility model |