CN204229263U - A kind of bidirectional temperature control circuit - Google Patents
A kind of bidirectional temperature control circuit Download PDFInfo
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- CN204229263U CN204229263U CN201420758797.7U CN201420758797U CN204229263U CN 204229263 U CN204229263 U CN 204229263U CN 201420758797 U CN201420758797 U CN 201420758797U CN 204229263 U CN204229263 U CN 204229263U
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Abstract
The utility model discloses a kind of bidirectional temperature control circuit, wherein, the first universal input and output port connects the base stage of the 5th triode, and the collector of the 5th triode connects the base stage of the 6th triode; Power input connects collector, the grid of the first N-channel MOS FET pipe, the grid of the 2nd P channel mosfet pipe of the 6th triode respectively; The drain electrode of the first N-channel MOS FET pipe connects power output end; The source electrode of the first N-channel MOS FET pipe connects the source electrode of the 2nd P channel mosfet pipe; Second universal input and output port connects the base stage of the 7th triode, and the collector of the 7th triode connects the base stage of the 8th triode; Power input connects collector, the grid of the 3rd P channel mosfet pipe, the grid of the 4th N-channel MOS FET pipe of the 8th triode respectively; The drain electrode of the 4th N-channel MOS FET pipe connects power output end; The source electrode of the 3rd P channel mosfet pipe connects the source electrode of the 4th N-channel MOS FET pipe.By relay being replaced by MOSFET pipe, improve work efficiency, being specially adapted to semiconductor laser.
Description
Technical field
The utility model relates to laser field, in particular, and a kind of bidirectional temperature control circuit.
Background technology
In optical field, some semiconductor laser work are very high to the requirement of temperature, and optimum working temperature is usually about 20-30 degree; But take the forward and reverse control semiconductor cooler (TEC) of a kind of electric current can realize the control of this temperature.Usual control electric current is forward and reverse is with MCU detection laser actuator temperature, judge to realize with low and high level control GPIO (General Purpose InputOutput, universal input exports)-1, GPIO2 port attracting electric relay with actual demand temperature comparisons; But when needs big current, relay model volume is large, and moment operating current very large, usually at more than 50-100MA, the electric current that MCU provides cannot driven relay, needs the supply of additional accessory power supply could normal work.
But this complex circuit designs and volume is large, efficiency is low, the raising along with present miniaturization, power conservation requirement designs like this and is difficult to the standard of realizing ideal.Therefore, prior art needs to improve.
Utility model content
The utility model provides a kind of new bidirectional temperature control circuit, technical matters to be solved comprises: how to arrange MOSFET and manage (metal-oxide layer semiconductcor field effect transistor, Metal OxideSemiconductor Field Effect Transistor) circuit with substitute existing relay circuit, how the quantity of triode and position and connection thereof are set in this bidirectional temperature control circuit, in this bidirectional temperature control circuit, how to arrange N-channel MOS FET manage with quantity and the position of P channel mosfet pipe and be connected, in this bidirectional temperature control circuit, how to arrange positive pole output export with negative pole, how each MOSFET is set and manages the annexation etc. with each triode.
The technical solution of the utility model is as follows: a kind of bidirectional temperature control circuit, wherein, first universal input and output port connects the base stage of the 5th triode, and the collector of the 5th triode connects the base stage of the 6th triode, also connects power input by first the second resistance; Power input also connects collector, the grid of the first N-channel MOS FET pipe, the grid of the 2nd P channel mosfet pipe of the 6th triode respectively by second the second resistance; The drain electrode of the first N-channel MOS FET pipe connects power output end; The grounded drain of the 2nd P channel mosfet pipe; The source electrode of the first N-channel MOS FET pipe connects the source electrode of the 2nd P channel mosfet pipe, exports as positive pole; The emitter of the 5th triode, the grounded emitter of the 6th triode; Second universal input and output port connects the base stage of the 7th triode, and the collector of the 7th triode connects the base stage of the 8th triode, also connects power input by the 3rd the second resistance; Power input also connects collector, the grid of the 3rd P channel mosfet pipe, the grid of the 4th N-channel MOS FET pipe of the 8th triode respectively by the 4th the second resistance; The grounded drain of the 3rd P channel mosfet pipe; The drain electrode of the 4th N-channel MOS FET pipe connects power output end; The source electrode of the 3rd P channel mosfet pipe connects the source electrode of the 4th N-channel MOS FET pipe, exports as negative pole; The emitter of the 7th triode, the grounded emitter of the 8th triode.
Preferably, the 5th triode, the 6th triode, the 7th triode, the 8th triode are NPN type triode.
Preferably, the model of NPN type triode is 3904.
Preferably, the emitter of the 5th triode is connected altogether with the emitter of the 6th triode.
Preferably, the emitter of the 7th triode is connected altogether with the emitter of the 8th triode.
Preferably, the drain electrode of the 2nd P channel mosfet pipe is connected altogether with the drain electrode of the 3rd P channel mosfet pipe.
Preferably, the first universal input and output port connects the base stage of the 5th triode by first the first resistance, and the second universal input and output port connects the base stage of the 7th triode by second the first resistance.
Preferably, the resistance of the first resistance and the second resistance is 1k Ω.
Preferably, the model of the first resistance is 0603.
Preferably, the model of the second resistance is 1206.
Preferably, the model of P channel mosfet pipe is Si7463, and the model of N-channel MOS FET pipe is Si7884.
Adopt such scheme, relay is replaced by MOSFET management and control system by the utility model, like this can reduced volume structure, turn reduce drive current, thus improve work efficiency, be specially adapted to the optical device that some thermal values are large and high to temperature requirement, especially semiconductor laser, has very high using value.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of an embodiment of the present utility model;
Fig. 2 is the schematic diagram of another embodiment of the present utility model.
Embodiment
For the ease of understanding the utility model, below in conjunction with the drawings and specific embodiments, the utility model is described in detail.It should be noted that, when element is stated " being fixed on " another element, it can directly on another element or can there is one or more element placed in the middle therebetween.When an element is stated " connection " another element, it can be directly connected to another element or can there is one or more element placed in the middle therebetween.The term " vertical " that this instructions uses, " level ", "left", "right" and similar statement are just for illustrative purposes.
Unless otherwise defined, all technology of using of this instructions and scientific terminology are identical with belonging to the implication that those skilled in the art of the present utility model understand usually.The object of the term used in instructions of the present utility model in this instructions just in order to describe specific embodiment is not for limiting the utility model.The term "and/or" that this instructions uses comprises arbitrary and all combinations of one or more relevant Listed Items.
As shown in Figure 1, an embodiment of the present utility model is, a kind of bidirectional temperature control circuit, wherein, first universal input and output port GPIO-1 connects the base stage of the 5th triode Q5, the collector of the 5th triode Q5 connects the base stage of the 6th triode Q6, also connects power input Vin by first the second resistance R1; Power input Vin also connects collector, the grid of the first N-channel MOS FET pipe Q1, the grid of the 2nd P channel mosfet pipe Q2 of the 6th triode Q6 respectively by second the second resistance R2.
The drain electrode of the first N-channel MOS FET pipe Q1 connects power output end VOUT-TEC; Such as, power output end VOUT-TEC outputs to semiconductor cooler.The grounded drain of the 2nd P channel mosfet pipe Q2; The source electrode of the first N-channel MOS FET pipe Q1 connects the source electrode of the 2nd P channel mosfet pipe Q2, exports, such as, for connecting the positive pole TEC+ of semiconductor cooler as positive pole; And for example, after the source electrode of source electrode connection the 2nd P channel mosfet pipe Q2 of the first N-channel MOS FET pipe Q1, also connect the 3rd resistance, it is for connecting the positive pole TEC+ of semiconductor cooler; The emitter of the 5th triode Q5, the grounded emitter of the 6th triode Q6.
Second universal input and output port GPIO-2 connects the base stage of the 7th triode Q7, and the collector of the 7th triode Q7 connects the base stage of the 8th triode Q8, also connects power input Vin by the 3rd the second resistance R3; Power input Vin also connects collector, the grid of the 3rd P channel mosfet pipe Q3, the grid of the 4th N-channel MOS FET pipe Q4 of the 8th triode Q8 respectively by the 4th the second resistance R4.
The grounded drain of the 3rd P channel mosfet pipe Q3; The drain electrode of the 4th N-channel MOS FET pipe Q4 connects power output end VOUT-TEC; Such as, power output end VOUT-TEC outputs to semiconductor cooler.The source electrode of the 3rd P channel mosfet pipe Q3 connects the source electrode of the 4th N-channel MOS FET pipe Q4, exports, such as, for connecting the negative pole TEC-of semiconductor cooler as negative pole; And for example, after the source electrode of source electrode connection the 4th N-channel MOS FET pipe Q4 of the 3rd P channel mosfet pipe Q3, also connect the 4th resistance, it is for connecting the negative pole TEC-of semiconductor cooler; The emitter of the 7th triode Q7, the grounded emitter of the 8th triode Q8.
Like this, utilize the one high and one low level of GPIO-1/GPIO-2 port to exchange, output current forward and reverse supply TEC can be controlled smoothly; Such as, when GPIO-1 exports high level, Q5 conducting, Q6 cut-off, Q1 conducting, Q2 cut-off; Electric current flows to TEC+ from VOUT-TEC; GPIO-2 output low level, Q7 cut-off, Q8 conducting, Q3 conducting, Q4 cut-off, electric current flows to ground from TEC-; Otherwise then output current direction exchanges.In order to solve the high level realizing the first universal input and output port and the second universal input and output port how better, the technical matters that low level switches, preferably, before first universal input and output port and the second universal input and output port, also synchronous switching circuit is set, for switching between the first state and the second state, wherein, described first state is that the first universal input and output port exports high level, second universal input and output port output low level, described second state is the first universal input and output port output low level, second universal input and output port exports high level.Such as, described synchronous switching circuit comprises a linked switch, and it arranges two circuits of association, and one is the circuit being communicated with described first state, and another is the circuit being communicated with described second state.And for example, described synchronous switching circuit comprises a change-over switch.Like this, can realize switching between the first state and the second state easily.Preferably, described synchronous switching circuit comprises an electric-controlled switch.In order to solve the technical matters of temperature instruction, preferably, described bidirectional temperature control circuit also arranges a temperature indicator (TI), for real-time displays temperature; And for example, described temperature indicator (TI) arranges LED display device, and by the LED lamplight displays temperature of different colours, such as ruddiness represents that temperature is too high, and green glow represents normal, and blue light represents that temperature is too low etc.; Like this, the technique effect of effective indicated temperature can be reached.
In order to solve the technical matters of how Optimization Design of Electronic Circuits, as shown in Figure 2, another embodiment of the present utility model is, a kind of bidirectional temperature control circuit, wherein, first universal input and output port GPIO-1 connects the base stage of the 5th triode Q5 by first the first resistance R5, and the second universal input and output port GPIO-2 connects the base stage of the 7th triode Q7 by second the first resistance R6.Like this, the rectification and voltage division realizing the base stage of the 5th triode Q5, the base stage input of the 7th triode Q7 is contributed to.
In order to solve the technical matters of how Optimization Design of Electronic Circuits, preferably, the 5th triode, the 6th triode, the 7th triode, the 8th triode are NPN type triode.Preferably, each NPN type triode model is identical, and such as, the model of NPN type triode is 3904.Like this, structure is simple, and replaceability is high, is easy to stock and safeguards.
In order to the technical matters how better ground wire solved in optimized circuit connects, preferably, the emitter of the 5th triode is connected altogether with the emitter of the 6th triode.Preferably, the emitter of the 7th triode is connected altogether with the emitter of the 8th triode.Preferably, the emitter of each triode connects altogether.Like this, structure is simple, is easy to produce.
In order to the technical matters how better ground wire solved in optimized circuit connects, preferably, the drain electrode of the 2nd P channel mosfet pipe is connected altogether with the drain electrode of the 3rd P channel mosfet pipe.Preferably, the emitter of each triode and the drain electrode of each P channel mosfet pipe connect altogether.Like this, structure is simple, is convenient to the manufacture of realizing circuit design and production.
Preferably, the resistance of the first resistance and the second resistance is 1k Ω.Preferably, the first resistance and the second resistance are Chip-R.Preferably, the model of the first resistance is 0603, and its power is 1/10W.Preferably, the model of the second resistance is 1206, and its power is 1/4W.
Preferably, the model of P channel mosfet pipe is Si7463, and the model of N-channel MOS FET pipe is Si7884.
Further, embodiment of the present utility model also comprises, each technical characteristic of the various embodiments described above, the bidirectional temperature control circuit be mutually combined to form, such as by utilizing the conducting of MCU port low and high level control metal-oxide-semiconductor, ending to have come the forward and reverse control of electric current, metal-oxide-semiconductor and MOSFET pipe, thus realize plain type miniaturization, high efficiency bidirectional temperature control circuit, the optical device that thermal value is large and high to temperature requirement can be widely used in, such as semiconductor laser etc.
It should be noted that, preferred embodiment of the present utility model is given in instructions of the present utility model and accompanying drawing thereof, but, the utility model can be realized by many different forms, be not limited to the embodiment described by this instructions, these embodiments not as the extra restriction to the utility model content, provide the object of these embodiments be make the understanding of disclosure of the present utility model more comprehensively thorough.Further, above-mentioned each technical characteristic continues combination mutually, is formed not in above-named various embodiment, is all considered as the scope that the utility model instructions is recorded; Further, for those of ordinary skills, can be improved according to the above description or convert, and all these improve and convert the protection domain that all should belong to the utility model claims.
Claims (10)
1. a bidirectional temperature control circuit, is characterized in that,
First universal input and output port connects the base stage of the 5th triode, and the collector of the 5th triode connects the base stage of the 6th triode, also connects power input by first the second resistance;
Power input also connects collector, the grid of the first N-channel MOS FET pipe, the grid of the 2nd P channel mosfet pipe of the 6th triode respectively by second the second resistance;
The drain electrode of the first N-channel MOS FET pipe connects power output end;
The grounded drain of the 2nd P channel mosfet pipe;
The source electrode of the first N-channel MOS FET pipe connects the source electrode of the 2nd P channel mosfet pipe, exports as positive pole;
The emitter of the 5th triode, the grounded emitter of the 6th triode;
Second universal input and output port connects the base stage of the 7th triode, and the collector of the 7th triode connects the base stage of the 8th triode, also connects power input by the 3rd the second resistance;
Power input also connects collector, the grid of the 3rd P channel mosfet pipe, the grid of the 4th N-channel MOS FET pipe of the 8th triode respectively by the 4th the second resistance;
The grounded drain of the 3rd P channel mosfet pipe;
The drain electrode of the 4th N-channel MOS FET pipe connects power output end;
The source electrode of the 3rd P channel mosfet pipe connects the source electrode of the 4th N-channel MOS FET pipe, exports as negative pole;
The emitter of the 7th triode, the grounded emitter of the 8th triode.
2. bidirectional temperature control circuit according to claim 1, it is characterized in that, the 5th triode, the 6th triode, the 7th triode, the 8th triode are NPN type triode.
3. bidirectional temperature control circuit according to claim 2, it is characterized in that, the model of NPN type triode is 3904.
4. bidirectional temperature control circuit according to claim 1, it is characterized in that, the emitter of the 5th triode is connected altogether with the emitter of the 6th triode.
5. bidirectional temperature control circuit according to claim 1, it is characterized in that, the emitter of the 7th triode is connected altogether with the emitter of the 8th triode.
6. bidirectional temperature control circuit according to claim 1, it is characterized in that, the drain electrode of the 2nd P channel mosfet pipe is connected altogether with the drain electrode of the 3rd P channel mosfet pipe.
7. bidirectional temperature control circuit according to claim 1, it is characterized in that, first universal input and output port connects the base stage of the 5th triode by first the first resistance, and the second universal input and output port connects the base stage of the 7th triode by second the first resistance.
8. bidirectional temperature control circuit according to claim 7, it is characterized in that, the resistance of the first resistance and the second resistance is 1k Ω.
9. bidirectional temperature control circuit according to claim 8, it is characterized in that, the model of the first resistance is 0603.
10. bidirectional temperature control circuit according to claim 8, it is characterized in that, the model of the second resistance is 1206.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420758797.7U CN204229263U (en) | 2014-12-05 | 2014-12-05 | A kind of bidirectional temperature control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420758797.7U CN204229263U (en) | 2014-12-05 | 2014-12-05 | A kind of bidirectional temperature control circuit |
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| CN204229263U true CN204229263U (en) | 2015-03-25 |
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| CN201420758797.7U Expired - Fee Related CN204229263U (en) | 2014-12-05 | 2014-12-05 | A kind of bidirectional temperature control circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117096726A (en) * | 2023-08-29 | 2023-11-21 | 山西大学 | Current drive control circuit of semiconductor laser |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117096726A (en) * | 2023-08-29 | 2023-11-21 | 山西大学 | Current drive control circuit of semiconductor laser |
| CN117096726B (en) * | 2023-08-29 | 2024-05-24 | 山西大学 | Current drive control circuit of semiconductor laser |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: CHEN YANMIN Free format text: FORMER OWNER: SHENZHEN JIGUANG SHIJI SCIENCE + TECHNOLOGY CO., LTD. Effective date: 20150618 |
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| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20150618 Address after: 100000 No. 5 West Garden Road, Beijing Information Technology College, Beijing, Chaoyang District Patentee after: Chen Yanmin Address before: 518000 Guangdong city of Shenzhen province Nanshan District Xi Li Light Road No. 1089 in the middle of integrated circuit industry garden Room 408 Patentee before: Shenzhen aurora Centrix Technology Ltd. |
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| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20151010 Address after: 621000 Jiuzhou Road, Fucheng District, Sichuan, Mianyang, China, No. 303 Patentee after: SINOLASER PROJECTION TECHNOLOGY CO., LTD. Address before: 100000 No. 5 West Garden Road, Beijing Information Technology College, Beijing, Chaoyang District Patentee before: Chen Yanmin |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150325 Termination date: 20181205 |