CN204180381U - A kind of pcb board structure about via hole anti-pad - Google Patents
A kind of pcb board structure about via hole anti-pad Download PDFInfo
- Publication number
- CN204180381U CN204180381U CN201420613489.5U CN201420613489U CN204180381U CN 204180381 U CN204180381 U CN 204180381U CN 201420613489 U CN201420613489 U CN 201420613489U CN 204180381 U CN204180381 U CN 204180381U
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- pad
- holding wire
- planar layers
- adjacent planar
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Abstract
The utility model discloses a kind of pcb board structure about via hole anti-pad, comprise signals layer, the holding wire adjacent planar layers adjacent with described signals layer and with described signals layer non-conterminous non-signal line adjacent planar layers, the first anti-pad that described holding wire adjacent planar layers is arranged is corresponding with the second anti-pad that described non-signal line adjacent planar layers is arranged, it is characterized in that, described first anti-pad is different from the etched-off area of described second anti-pad, the etched-off area upper end of described first anti-pad caves inward, form holding wire routing region.The utility model by reducing the etched-off area of the anti-pad in holding wire adjacent planar layers, reduce through anti-pad holding wire to other signal disturbing and through the holding wire of anti-pad by the risk of other signal disturbing; Ensure that the impedance of the holding wire through anti-pad simultaneously, reduce the risk of the signal quality variation brought by change in the instantaneous impedance.
Description
[technical field]
The utility model relates to a kind of pcb board structure about via hole anti-pad.
[background technology]
Printed circuit board (Printed Circuit Board, pcb board), also known as printed circuit board (PCB), printed substrate, is the physical support of electronic product and the important component part of Signal transmissions.Plated-through hole (Plated through hole in pcb board; PTH) impedance usually can be more much lower than the impedance of transmission line; in order to increase the impedance of PTH; itself and transmission line impedance are matched; our common way be by PTH around metal flat empty; empty area larger, PTH impedance is higher.The region emptied is called the anti-pad of PTH by us.
Through the holding wire of anti-pad owing to there is no metal flat reference, can cause walking line impedence higher, have a strong impact on signal quality.
Complete metal flat is except providing signal backflow as a reference plane, also play the effect of isolated interference, and excessive etched-off area can make the holding wire through anti-pad become interference source, the holding wire through anti-pad also can be made to be more vulnerable to interference.
Above problem, is worth solving.
[utility model content]
In order to overcome the deficiency of existing technology, the utility model provides a kind of pcb board structure about via hole anti-pad, and when ensureing PTH impedance, the signal line impedance solved through anti-pad suddenlys change and disturbs the problem increased.
Technical solutions of the utility model are as described below:
A kind of pcb board structure about via hole anti-pad, comprise signals layer, the holding wire adjacent planar layers adjacent with described signals layer and with described signals layer non-conterminous non-signal line adjacent planar layers, the first anti-pad that described holding wire adjacent planar layers is arranged is corresponding with the second anti-pad that described non-signal line adjacent planar layers is arranged, and the first signal via that described first anti-pad is arranged is corresponding with the secondary signal via hole that described second anti-pad is arranged, described signals layer comprises holding wire, one end of described holding wire is connected with the porose disc on described first signal via outer, it is characterized in that,
Described first anti-pad is different from the etched-off area of described second anti-pad, the etched-off area upper end of described first anti-pad caves inward, form holding wire routing region, one end of described holding wire is connected with the porose disc on described first signal via outer by described holding wire routing region.
According to the utility model of said structure, it is characterized in that, the minimum spacing of described first signal via and described holding wire routing region is not less than 4mil.
According to the utility model of said structure, its beneficial effect is, by reducing the etched-off area of the anti-pad in holding wire adjacent planar layers, reduce through anti-pad holding wire to other signal disturbing and through the holding wire of anti-pad by the risk of other signal disturbing; The etched-off area simultaneously reduced forms holding wire routing region, holding wire is through anti-pad cabling, by this holding wire routing region, but not the etched-off area of anti-pad, ensure that the impedance of the holding wire through anti-pad, reduce the risk of the signal quality variation brought by change in the instantaneous impedance, ensure that the impedance continuity of whole signalling channel simultaneously to greatest extent.
[accompanying drawing explanation]
Fig. 1 is structure vertical view of the present utility model.
Fig. 2 is described signals layer structure vertical view after the utility model layering.
Fig. 3 is described holding wire adjacent plane Rotating fields vertical view after the utility model layering.
Fig. 4 is described non-signal line adjacent plane Rotating fields vertical view after the utility model layering.
Fig. 5 is the enlarged diagram of the first anti-pad described in the utility model.
In the drawings, 1, signals layer; 2, holding wire adjacent planar layers; 3, non-signal line adjacent planar layers; 4, the first anti-pad; 5, the first signal via; 6, the second anti-pad; 7, secondary signal via hole; 8, porose disc; 9, holding wire; 10, holding wire routing region; The minimum spacing of L, the first signal via and described holding wire routing region.
[embodiment]
Below in conjunction with accompanying drawing and execution mode, the utility model is conducted further description:
As shown in Figures 1 to 4, a kind of pcb board structure about via hole anti-pad, comprise signals layer 1, the holding wire adjacent planar layers 2 adjacent with described signals layer 1 and with described signals layer 1 non-conterminous non-signal line adjacent planar layers 3, in described holding wire adjacent planar layers 2 arrange the first anti-pad 4 and described non-signal line adjacent planar layers 3 on arrange the second anti-pad 6 corresponding, and the first signal via 5 that described first anti-pad 4 is arranged is corresponding with the secondary signal via hole 7 that described second anti-pad 6 is arranged, described signals layer 1 comprises holding wire 9, one end of described holding wire 9 is connected with the porose disc 8 on described first signal via 5 outer, it is characterized in that, described first anti-pad 4 is different from the etched-off area of described second anti-pad 6, the etched-off area upper end of described first anti-pad 4 caves inward, form holding wire routing region 10, one end of described holding wire 9 is connected with the porose disc 8 on described first signal via 5 outer by described holding wire routing region 10.
As shown in Figure 5, described first signal via 5 is not less than 4mil with the minimum spacing L of described holding wire routing region 10, meets cabling requirement to ensure that holding wire 9 can be connected with the described porose disc 8 on described first via hole 5 outer.
The utility model by reducing the etched-off area of the anti-pad in holding wire adjacent planar layers, reduce through anti-pad holding wire to other signal disturbing and through the holding wire of anti-pad by the risk of other signal disturbing.The etched-off area simultaneously reduced forms holding wire routing region, holding wire is through anti-pad cabling, by this holding wire routing region, but not the etched-off area of anti-pad, ensure that the impedance of the holding wire through anti-pad, reduce the risk of the signal quality variation brought by change in the instantaneous impedance, ensure that the impedance continuity of whole signalling channel simultaneously to greatest extent.
In the utility model, such as the descriptor such as " first ", " second ", not represents sequencing, is only the same structure distinguishing different parts, can not be considered as the restriction to protection range of the present utility model.
Should be understood that, for those of ordinary skills, can be improved according to the above description or convert, and all these improve and convert the protection range that all should belong to the utility model claims.
By reference to the accompanying drawings exemplary description is carried out to the utility model patent above; the realization of obvious the utility model patent is not subject to the restrictions described above; as long as have employed the various improvement that method is conceived and technical scheme is carried out of the utility model patent; or the design of the utility model patent and technical scheme directly applied to other occasion, all in protection range of the present utility model without to improve.
Claims (2)
1. the pcb board structure about via hole anti-pad, comprise signals layer, the holding wire adjacent planar layers adjacent with described signals layer and with described signals layer non-conterminous non-signal line adjacent planar layers, the first anti-pad that described holding wire adjacent planar layers is arranged is corresponding with the second anti-pad that described non-signal line adjacent planar layers is arranged, and the first signal via that described first anti-pad is arranged is corresponding with the secondary signal via hole that described second anti-pad is arranged, described signals layer comprises holding wire, one end of described holding wire is connected with the porose disc on described first signal via outer, it is characterized in that,
Described first anti-pad is different from the etched-off area of described second anti-pad, the etched-off area upper end of described first anti-pad caves inward, form holding wire routing region, one end of described holding wire is connected with the porose disc on described first signal via outer by described holding wire routing region.
2. the pcb board structure about via hole anti-pad according to claim 1, is characterized in that, the minimum spacing of described first signal via and described holding wire routing region is not less than 4mil.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420613489.5U CN204180381U (en) | 2014-10-23 | 2014-10-23 | A kind of pcb board structure about via hole anti-pad |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420613489.5U CN204180381U (en) | 2014-10-23 | 2014-10-23 | A kind of pcb board structure about via hole anti-pad |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204180381U true CN204180381U (en) | 2015-02-25 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420613489.5U Active CN204180381U (en) | 2014-10-23 | 2014-10-23 | A kind of pcb board structure about via hole anti-pad |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204180381U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107155258A (en) * | 2017-04-25 | 2017-09-12 | 安徽宏鑫电子科技有限公司 | A kind of asymmetric via printed circuit board |
| CN108668434A (en) * | 2018-06-22 | 2018-10-16 | 晶晨半导体（深圳）有限公司 | Without branch's alternative resistance circuit plate and electronic device |
| CN108770239A (en) * | 2018-08-09 | 2018-11-06 | 郑州云海信息技术有限公司 | A kind of PCB vias anti-pad setting method |
| CN110087386A (en) * | 2019-05-30 | 2019-08-02 | 苏州浪潮智能科技有限公司 | A kind of pcb board and a kind of terminal |
-
2014
- 2014-10-23 CN CN201420613489.5U patent/CN204180381U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107155258A (en) * | 2017-04-25 | 2017-09-12 | 安徽宏鑫电子科技有限公司 | A kind of asymmetric via printed circuit board |
| CN107155258B (en) * | 2017-04-25 | 2019-05-10 | 安徽宏鑫电子科技有限公司 | A kind of asymmetry via hole printed circuit board |
| CN108668434A (en) * | 2018-06-22 | 2018-10-16 | 晶晨半导体（深圳）有限公司 | Without branch's alternative resistance circuit plate and electronic device |
| CN108770239A (en) * | 2018-08-09 | 2018-11-06 | 郑州云海信息技术有限公司 | A kind of PCB vias anti-pad setting method |
| CN110087386A (en) * | 2019-05-30 | 2019-08-02 | 苏州浪潮智能科技有限公司 | A kind of pcb board and a kind of terminal |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 518000, 12H-12I, 12th Floor, Kangjia Research Building, 28 Science and Technology South 12 Road, Nanshan District, Shenzhen City, Guangdong Province Patentee after: Shenzhen Yibo Science and Technology Co., Ltd. Address before: 518000, 12H-12I, 12th Floor, Kangjia Research Building, 28 Science and Technology South 12 Road, Nanshan District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Yi Bo Science and Technology Ltd. |
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| CP02 | Change in the address of a patent holder | ||
| CP02 | Change in the address of a patent holder |
Address after: 11F, Metro financial technology building, 9819 Shennan Avenue, Shenda community, Yuehai street, Nanshan District, Shenzhen, Guangdong 518000 Patentee after: EDADOC Co.,Ltd. Address before: 518000, 12H-12I, 12th Floor, Kangjia Research Building, 28 Science and Technology South 12 Road, Nanshan District, Shenzhen City, Guangdong Province Patentee before: EDADOC Co.,Ltd. |