CN204168283U - The zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable - Google Patents
The zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable Download PDFInfo
- Publication number
- CN204168283U CN204168283U CN201420540473.6U CN201420540473U CN204168283U CN 204168283 U CN204168283 U CN 204168283U CN 201420540473 U CN201420540473 U CN 201420540473U CN 204168283 U CN204168283 U CN 204168283U
- Authority
- CN
- China
- Prior art keywords
- frequency
- zero intermediate
- treatment circuit
- adjustable
- numeric field
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Superheterodyne Receivers (AREA)
Abstract
The utility model discloses the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable, it comprises analog domain treatment circuit and numeric field treatment circuit, the output of analog domain treatment circuit is connected with numeric field treatment circuit, input signal carries out amplifying and frequency-conversion processing at analog domain, signal after frequency-conversion processing is divided into two paths of signals after numeric field carries out analog-to-digital conversion, after two paths of signals carries out double conversion and filtering process respectively, export zero intermediate frequency signals.The utility model can solve the multiple technical bottlenecks in zero intermediate frequency narrow-band receiver, and as problems such as low frequency noises, DC maladjustment, signal aliasing, signal filterings, and it is adjustable to realize bandwidth.
Description
Technical field
The utility model relates to a kind of zero intermediate frequency receiving circuit, particularly relates to the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable.
Background technology
Along with the fast development of the microelectric techniques such as SiGe and cmos semiconductor technique, and the appearance of some novel circuit technology and new algorithm, zero-if architecture obtains comprehensive research and analysis at wireless communication field.Zero-if architecture is very potential developing direction in radio-frequency structure, has very large commercial value.
Zero intermediate frequency reciver has that volume is little, cost is low, power consumption is little, structure is simple, be easy to single-chip integration etc. advantage, be subject to extensive concern in the field of wireless communication, also should see simultaneously, zero intermediate frequency receives structure and also there are some problems, as higher in the DC maladjustment problem of zero intermediate frequency, the design difficulty of the low-frequency noise of zero intermediate frequency on the impact of narrow band signal, arrowband/bandwidth tunable filter, be difficult to realize for the frequency overlapped-resistable filter of high resolution A/D sampling, these problems also need to do more deep analysis and research.
Utility model content
The purpose of this utility model is to overcome the deficiencies in the prior art, there is provided a kind of multiple technical bottlenecks that can solve in zero intermediate frequency narrow-band receiver, the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth as low frequency noises, DC maladjustment, signal aliasing, signal filtering problem is adjustable.
The purpose of this utility model is achieved through the following technical solutions:
The zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable, it comprises analog domain treatment circuit and numeric field treatment circuit, the output of analog domain treatment circuit is connected with numeric field treatment circuit, input signal carries out amplifying and frequency-conversion processing at analog domain, signal after frequency-conversion processing is divided into two paths of signals after numeric field carries out analog-to-digital conversion, after two paths of signals carries out double conversion and filtering process respectively, export zero intermediate frequency signals.
Described analog domain treatment circuit comprises amplifier and frequency mixer, and the input of amplifier is connected with input signal, and the output of amplifier is connected with frequency mixer, and the output of frequency mixer is connected with rear class numeric field treatment circuit.
Described numeric field treatment circuit comprises an analog to digital converter, two frequency mixers and frequency mixer A, frequency mixer B, and two filters and filter A, filter B, frequency mixer is for solving low frequency noises in zero-if architecture and DC maladjustment problem, in numeric field filtering, the exponent number solving the filter that analog domain filtering faces is high, circuit scale large and be not easy stable problem, the output of analog to digital converter is connected with two frequency mixers respectively, and frequency mixer A is connected with filter A and filter B respectively with the output of frequency mixer B.
Described analog to digital converter is the continuous mode segma-delta ADC carrying anti-aliasing function, to solve the signal aliasing problem of ADC sampling.
The local oscillation signal of described analog domain frequency conversion, the local oscillation signal of numeric field frequency conversion, ADC sampling clock produce by same frequency synthesizer, are provided by frequency division.
The beneficial effects of the utility model are: the utility model adopts and realizes double conversion at analog domain and numeric field, finally produce the mode that zero intermediate frequency exports, solve the problem of the low frequency noises in zero intermediate frequency narrow-band receiver, DC maladjustment, signal aliasing, signal filtering, and can accomplish that bandwidth is adjustable, what reduce receiver realizes difficulty, reduce circuit scale, reduce power consumption and cost.
Accompanying drawing explanation
Fig. 1 is circuit theory diagrams of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the technical solution of the utility model is described in further detail, but protection range of the present utility model is not limited to the following stated.
As shown in Figure 1, the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable, it comprises analog domain treatment circuit and numeric field treatment circuit, the output of analog domain treatment circuit is connected with numeric field treatment circuit, input signal carries out amplifying and frequency-conversion processing at analog domain, signal after frequency-conversion processing is divided into two paths of signals after numeric field carries out analog-to-digital conversion, after two paths of signals carries out double conversion and filtering process respectively, exports zero intermediate frequency signals.
Wherein, analog domain treatment circuit comprises amplifier and frequency mixer, and the input of amplifier is connected with input signal, and the output of amplifier is connected with frequency mixer, and the output of frequency mixer is connected with rear class numeric field treatment circuit.
Numeric field treatment circuit comprises an analog to digital converter, two frequency mixers and frequency mixer A, frequency mixer B, and two filters and filter A, filter B, frequency mixer is for solving low frequency noises in zero-if architecture and DC maladjustment problem, in numeric field filtering, the exponent number solving the filter that analog domain filtering faces is high, circuit scale large and be not easy stable problem, the output of analog to digital converter is connected with two frequency mixers respectively, and frequency mixer A is connected with filter A and filter B respectively with the output of frequency mixer B.
The local oscillation signal of analog domain frequency conversion, the local oscillation signal of numeric field frequency conversion, ADC sampling clock produce by same frequency synthesizer, are provided by frequency division, as frequency input signal be 10MHz time, local oscillation signal frequency can adopt the frequency of 16.455MHz.
Analog to digital converter adopts the continuous mode segma-delta ADC carrying anti-aliasing function, can solve the signal aliasing problem in ADC sampling; Realize second time frequency conversion at numeric field by frequency mixer, effectively can solve the low frequency noises in zero-if architecture and DC maladjustment problem; If narrow band signal carries out filtering at analog domain, the exponent number of filter can be very high, causes circuit scale large and be not easy to stablize, by adopting the mode of carrying out filtering at numeric field, effectively can address this problem, realizing the adjustable flexibly of bandwidth simultaneously.
Claims (5)
1. the zero intermediate frequency narrow-band reception circuit that a bandwidth is adjustable, it is characterized in that: it comprises analog domain treatment circuit and numeric field treatment circuit, the output of analog domain treatment circuit is connected with numeric field treatment circuit, input signal carries out amplifying and frequency-conversion processing at analog domain, signal after frequency-conversion processing is divided into two paths of signals after numeric field carries out analog-to-digital conversion, after two paths of signals carries out double conversion and filtering process respectively, export zero intermediate frequency signals.
2. the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth according to claim 1 is adjustable, it is characterized in that: described analog domain treatment circuit comprises amplifier and frequency mixer, the input of amplifier is connected with input signal, the output of amplifier is connected with frequency mixer, and the output of frequency mixer is connected with rear class numeric field treatment circuit.
3. the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth according to claim 1 is adjustable, it is characterized in that: described numeric field treatment circuit comprises an analog to digital converter, two frequency mixers and frequency mixer A, frequency mixer B, and two filters and filter A, filter B, the output of analog to digital converter is connected with two frequency mixers respectively, and frequency mixer A is connected with filter A and filter B respectively with the output of frequency mixer B.
4. the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth according to claim 3 is adjustable, is characterized in that: described analog to digital converter is the continuous mode segma-delta ADC carrying anti-aliasing function.
5. the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth according to Claims 2 or 3 is adjustable, it is characterized in that: the local oscillation signal of described analog domain frequency conversion, the local oscillation signal of numeric field frequency conversion, ADC sampling clock produce by same frequency synthesizer, are provided by frequency division.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420540473.6U CN204168283U (en) | 2014-09-19 | 2014-09-19 | The zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420540473.6U CN204168283U (en) | 2014-09-19 | 2014-09-19 | The zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable |
Publications (1)
Publication Number | Publication Date |
---|---|
CN204168283U true CN204168283U (en) | 2015-02-18 |
Family
ID=52541931
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201420540473.6U Expired - Fee Related CN204168283U (en) | 2014-09-19 | 2014-09-19 | The zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN204168283U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105490691A (en) * | 2014-09-19 | 2016-04-13 | 成都振芯科技股份有限公司 | Bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit |
CN109687827A (en) * | 2018-12-14 | 2019-04-26 | 北京无线电测量研究所 | A kind of zero intermediate frequency filtering amplifying device with direct current calibration |
-
2014
- 2014-09-19 CN CN201420540473.6U patent/CN204168283U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105490691A (en) * | 2014-09-19 | 2016-04-13 | 成都振芯科技股份有限公司 | Bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit |
CN109687827A (en) * | 2018-12-14 | 2019-04-26 | 北京无线电测量研究所 | A kind of zero intermediate frequency filtering amplifying device with direct current calibration |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN205232209U (en) | Signal reception circuit, phased array antenna and trackside unit based on zero intermediate frequency | |
WO2012092516A3 (en) | Methods and systems for interference rejection for low signals | |
CN204168283U (en) | The zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable | |
CN204272098U (en) | Shortwave frequency conversion channel | |
CN102928856A (en) | Global positioning system (GPS) and Beidou double-module navigation radio frequency receiving system | |
CN105490691A (en) | Bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit | |
CN102231635B (en) | Direct frequency conversion receiver | |
CN204131506U (en) | A kind of High Linear radio frequency reception treatment circuit | |
CN105680890B (en) | A kind of super low-power consumption lack sampling receiver for wireless communication node | |
CN104539264A (en) | Filtering method and filtering circuit applied to EPS system | |
CN203135854U (en) | Microwave reception front end assembly | |
CN202218220U (en) | Medium-frequency broadband receiver | |
Kim et al. | A digital-intensive receiver front-end using VCO-based ADC with an embedded 2nd-Order anti-aliasing Sinc filter in 90nm CMOS | |
CN202904020U (en) | GPS and Beidou dual-mode navigation radio-frequency reception system | |
CN203661047U (en) | A 2.4G direct down conversion receiver radio frequency front end device | |
CN203289419U (en) | C-wave band miniature high sensitivity reception module | |
CN203522649U (en) | Low-phase noise signal generator with switch filter | |
CN105490692A (en) | Bandwidth-adjustable zero-intermediate-frequency narrow-band receiving processing method | |
LU100924B1 (en) | A novel transceiver structure based on phase frequency detector | |
CN102545933A (en) | Two-stage frequency conversion broadband receiver | |
CN202978914U (en) | Zero intermediate frequency receiver | |
CN105490690B (en) | A kind of High Linear radio frequency reception processing circuit | |
Kim et al. | A Digital-Intensive Multimode Multiband Receiver Using a Sinc ${^ 2} $ Filter-Embedded VCO-Based ADC | |
CN202957815U (en) | Novel digital radio receiver device | |
CN205105247U (en) | New GMSK decoding circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150218 Termination date: 20190919 |