CN105490691A - Bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit - Google Patents
Bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit Download PDFInfo
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- CN105490691A CN105490691A CN201410480953.2A CN201410480953A CN105490691A CN 105490691 A CN105490691 A CN 105490691A CN 201410480953 A CN201410480953 A CN 201410480953A CN 105490691 A CN105490691 A CN 105490691A
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Abstract
The invention discloses a bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit. The bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit comprises an analog domain processing circuit and a digital domain processing circuit, wherein an output of the analog domain processing circuit is connected with the digital domain processing circuit; an input signal is subjected to amplification and frequency conversion processing in an analog domain; the signal being subjected to the frequency conversion processing is divided into two paths of signals after being subjected to analog-to-digital conversion in a digital domain; and zero-intermediate-frequency signals are output after the two paths of signals are subjected to secondary frequency conversion and filter processing respectively. Through adoption of the bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit, a plurality of technical bottleneck problems such as low-frequency noise interference, direct-current offset, signal aliasing and signal filtering in a zero-intermediate-frequency narrow-band receiver can be solved, and bandwidth adjustability is realized.
Description
Technical field
The present invention relates to a kind of zero intermediate frequency receiving circuit, particularly relate to the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable.
Background technology
Along with the fast development of the microelectric techniques such as SiGe and cmos semiconductor technique, and the appearance of some novel circuit technology and new algorithm, zero-if architecture obtains comprehensive research and analysis at wireless communication field.Zero-if architecture is very potential developing direction in radio-frequency structure, has very large commercial value.
Zero intermediate frequency reciver has that volume is little, cost is low, power consumption is little, structure is simple, be easy to single-chip integration etc. advantage, be subject to extensive concern in the field of wireless communication, also should see simultaneously, zero intermediate frequency receives structure and also there are some problems, as higher in the DC maladjustment problem of zero intermediate frequency, the design difficulty of the low-frequency noise of zero intermediate frequency on the impact of narrow band signal, arrowband/bandwidth tunable filter, be difficult to realize for the frequency overlapped-resistable filter of high resolution A/D sampling, these problems also need to do more deep analysis and research.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, there is provided a kind of multiple technical bottlenecks that can solve in zero intermediate frequency narrow-band receiver, the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth as low frequency noises, DC maladjustment, signal aliasing, signal filtering problem is adjustable.
The object of the invention is to be achieved through the following technical solutions:
The zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable, it comprises analog domain treatment circuit and numeric field treatment circuit, the output of analog domain treatment circuit is connected with numeric field treatment circuit, input signal carries out amplifying and frequency-conversion processing at analog domain, signal after frequency-conversion processing is divided into two paths of signals after numeric field carries out analog-to-digital conversion, after two paths of signals carries out double conversion and filtering process respectively, export zero intermediate frequency signals.
Described analog domain treatment circuit comprises amplifier and frequency mixer, and the input of amplifier is connected with input signal, and the output of amplifier is connected with frequency mixer, and the output of frequency mixer is connected with rear class numeric field treatment circuit.
Described numeric field treatment circuit comprises an analog to digital converter, two frequency mixers and frequency mixer A, frequency mixer B, and two filters and filter A, filter B, frequency mixer is for solving low frequency noises in zero-if architecture and DC maladjustment problem, in numeric field filtering, the exponent number solving the filter that analog domain filtering faces is high, circuit scale large and be not easy stable problem, the output of analog to digital converter is connected with two frequency mixers respectively, and frequency mixer A is connected with filter A and filter B respectively with the output of frequency mixer B.
Described analog to digital converter is the continuous mode segma-deltaADC carrying anti-aliasing function, to solve the signal aliasing problem of ADC sampling.
The local oscillation signal of described analog domain frequency conversion, the local oscillation signal of numeric field frequency conversion, ADC sampling clock produce by same frequency synthesizer, are provided by frequency division.
The invention has the beneficial effects as follows: the present invention adopts and realizes double conversion at analog domain and numeric field, finally produce the mode that zero intermediate frequency exports, solve the problem of the low frequency noises in zero intermediate frequency narrow-band receiver, DC maladjustment, signal aliasing, signal filtering, and can accomplish that bandwidth is adjustable, what reduce receiver realizes difficulty, reduce circuit scale, reduce power consumption and cost.
Accompanying drawing explanation
Fig. 1 is circuit theory diagrams of the present invention.
Embodiment
Below in conjunction with accompanying drawing, technical scheme of the present invention is described in further detail, but protection scope of the present invention is not limited to the following stated.
As shown in Figure 1, the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable, it comprises analog domain treatment circuit and numeric field treatment circuit, the output of analog domain treatment circuit is connected with numeric field treatment circuit, input signal carries out amplifying and frequency-conversion processing at analog domain, signal after frequency-conversion processing is divided into two paths of signals after numeric field carries out analog-to-digital conversion, after two paths of signals carries out double conversion and filtering process respectively, exports zero intermediate frequency signals.
Wherein, analog domain treatment circuit comprises amplifier and frequency mixer, and the input of amplifier is connected with input signal, and the output of amplifier is connected with frequency mixer, and the output of frequency mixer is connected with rear class numeric field treatment circuit.
Numeric field treatment circuit comprises an analog to digital converter, two frequency mixers and frequency mixer A, frequency mixer B, and two filters and filter A, filter B, frequency mixer is for solving low frequency noises in zero-if architecture and DC maladjustment problem, in numeric field filtering, the exponent number solving the filter that analog domain filtering faces is high, circuit scale large and be not easy stable problem, the output of analog to digital converter is connected with two frequency mixers respectively, and frequency mixer A is connected with filter A and filter B respectively with the output of frequency mixer B.
The local oscillation signal of analog domain frequency conversion, the local oscillation signal of numeric field frequency conversion, ADC sampling clock produce by same frequency synthesizer, are provided by frequency division, as frequency input signal be 10MHz time, local oscillation signal frequency can adopt the frequency of 16.455MHz.
Analog to digital converter adopts the continuous mode segma-deltaADC carrying anti-aliasing function, can solve the signal aliasing problem in ADC sampling; Realize second time frequency conversion at numeric field by frequency mixer, effectively can solve the low frequency noises in zero-if architecture and DC maladjustment problem; If narrow band signal carries out filtering at analog domain, the exponent number of filter can be very high, causes circuit scale large and be not easy to stablize, by adopting the mode of carrying out filtering at numeric field, effectively can address this problem, realizing the adjustable flexibly of bandwidth simultaneously.
Claims (5)
1. the zero intermediate frequency narrow-band reception circuit that a bandwidth is adjustable, it is characterized in that: it comprises analog domain treatment circuit and numeric field treatment circuit, the output of analog domain treatment circuit is connected with numeric field treatment circuit, input signal carries out amplifying and frequency-conversion processing at analog domain, signal after frequency-conversion processing is divided into two paths of signals after numeric field carries out analog-to-digital conversion, after two paths of signals carries out double conversion and filtering process respectively, export zero intermediate frequency signals.
2. the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth according to claim 1 is adjustable, it is characterized in that: described analog domain treatment circuit comprises amplifier and frequency mixer, the input of amplifier is connected with input signal, the output of amplifier is connected with frequency mixer, and the output of frequency mixer is connected with rear class numeric field treatment circuit.
3. the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth according to claim 1 is adjustable, is characterized in that:
Described numeric field treatment circuit comprises an analog to digital converter, two frequency mixers and frequency mixer A, frequency mixer B, and two filters and filter A, filter B, frequency mixer is for solving low frequency noises in zero-if architecture and DC maladjustment problem, in numeric field filtering, the exponent number solving the filter that analog domain filtering faces is high, circuit scale large and be not easy stable problem, the output of analog to digital converter is connected with two frequency mixers respectively, and frequency mixer A is connected with filter A and filter B respectively with the output of frequency mixer B.
4. the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth according to claim 3 is adjustable, is characterized in that:
Described analog to digital converter is the continuous mode segma-deltaADC carrying anti-aliasing function, to solve the signal aliasing problem of ADC sampling.
5. the zero intermediate frequency narrow-band reception circuit that a kind of bandwidth according to Claims 2 or 3 is adjustable, it is characterized in that: the local oscillation signal of described analog domain frequency conversion, the local oscillation signal of numeric field frequency conversion, ADC sampling clock produce by same frequency synthesizer, are provided by frequency division.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410480953.2A CN105490691A (en) | 2014-09-19 | 2014-09-19 | Bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit |
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| CN201410480953.2A CN105490691A (en) | 2014-09-19 | 2014-09-19 | Bandwidth-adjustable zero-intermediate-frequency narrow-band receiving circuit |
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| CN105490691A true CN105490691A (en) | 2016-04-13 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108344976A (en) * | 2018-01-08 | 2018-07-31 | 西安电子科技大学 | The hardware down sample method and system of narrow band signal, digital information processing system |
| US10756798B2 (en) * | 2016-08-04 | 2020-08-25 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and transmitter for transmit beamforming in a wireless communication system |
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| CN204168283U (en) * | 2014-09-19 | 2015-02-18 | 成都振芯科技股份有限公司 | The zero intermediate frequency narrow-band reception circuit that a kind of bandwidth is adjustable |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101266292A (en) * | 2008-05-08 | 2008-09-17 | 北京航空航天大学 | GNSS reflected signal frequency domain processing unit and method |
| CN101656562A (en) * | 2009-09-22 | 2010-02-24 | 武汉虹信通信技术有限责任公司 | Device and method for realizing elimination of self-excitation interference of repeater |
| CN201910922U (en) * | 2010-09-28 | 2011-07-27 | 北京交通大学 | High-speed data acquisition device for channel detection |
| CN102751998A (en) * | 2012-04-06 | 2012-10-24 | 华北电力大学 | Data intermediate frequency module based on software radio receiver |
| CN103457619A (en) * | 2013-07-16 | 2013-12-18 | 中国电子科技集团公司第四十一研究所 | Digital tuning receiving device and control method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US10756798B2 (en) * | 2016-08-04 | 2020-08-25 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and transmitter for transmit beamforming in a wireless communication system |
| CN108344976A (en) * | 2018-01-08 | 2018-07-31 | 西安电子科技大学 | The hardware down sample method and system of narrow band signal, digital information processing system |
| CN108344976B (en) * | 2018-01-08 | 2021-07-20 | 西安电子科技大学 | Hardware frequency-reduction sampling method and system for narrow-band signal and digital signal processing system |
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Application publication date: 20160413 |
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