CN103457623B - A kind of circuit of Zero intermediate frequency direct current compensation and method - Google Patents
A kind of circuit of Zero intermediate frequency direct current compensation and method Download PDFInfo
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- CN103457623B CN103457623B CN201310355188.7A CN201310355188A CN103457623B CN 103457623 B CN103457623 B CN 103457623B CN 201310355188 A CN201310355188 A CN 201310355188A CN 103457623 B CN103457623 B CN 103457623B
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Abstract
The invention belongs to analog signal processing technology field, be specifically related to a kind of carry out direct current to zero intermediate frequency reciver at intermediate frequency end and offset, the circuit of the DC component produced when removing mixing in real time and method.The DC component of the present invention by producing after elimination continuous wave frequency conversion in real time, makes intermediate-freuqncy signal only surplus alternating current component, thus can provide enough gains, zero intermediate frequency signals is amplified to the scope that applicable A/D converter gathers.
Description
Technical field
The invention belongs to analog signal processing technology field, be specifically related to a kind of carry out direct current to zero intermediate frequency reciver at intermediate frequency end and offset, the circuit of the DC component produced when removing mixing in real time and method.
Background technology
The basic functional principle of zero intermediate frequency reciver is: radiofrequency signal and the local oscillator identical with its carrier frequency, through a down-conversion Direct Conversion to zero intermediate frequency, then extracts the useful signal in zero intermediate frequency signals through amplification and low-pass filtering.
Compared with traditional superheterodyne receiver, the radiofrequency signal of zero intermediate frequency reciver does not have image frequency, does not need image-reject filter.Fundamental frequency signal after frequency conversion is in low frequency (generally lower than 10kHz), and amplifying circuit uses common operational amplifier, and the design of filter is also more simple, also decreases to the precision of ADC and the requirement of sample rate.Greatly reduce the requirement of Receiver Design like this, volume and power consumption also significantly reduce simultaneously.
Outside these advantages, there is a problem that must solve in zero intermediate frequency reciver.In the process of down-conversion, if radiofrequency signal is identical with the frequency of local oscillator, be then directly converted to direct current.The signal that zero intermediate frequency reciver frequency conversion produces is DC component and the superposing of the useful signal alternating current component of vanishing intermediate frequency (after the down-conversion) entrained by radiofrequency signal, and these DC component can make amplifying circuit saturated, cause useful signal to be exaggerated.Therefore, the elimination of DC component is the key of zero intermediate frequency reciver.
The main source of DC component problem comprises: the target reflection echo that receiver receives, local oscillator leakage and local oscillator at the multiple reflections of mixer, with band interference signal etc.
Direct current cancellation techniques main at present comprises that radio frequency offsets, digital canceller, AC coupled etc.It is introduce a road extra at receive path that radio frequency offsets, and its phase place is contrary with space leakage signal, and amplitude is substantially equal, when 2 signals are superimposed, leakage signal power is reduced.Digital canceller gathers intermediate-freuqncy signal with ADC, adds up the DC component of intermediate frequency, deducts corresponding DC component after obtaining DC component.AC coupled adds capacitance at intermediate frequency end to remove direct current.Radio frequency offsets the radio-frequency component need considering multiple source, complex structure.Digital canceller needs to consider that DC component amplifies saturated problem before ADC image data, cannot provide enough gains.Interchange has offseted significant limitation, is only applicable to IF signal frequency higher, because the characteristic of electric capacity is " resistance direct current, logical interchange ", direct current signal cannot pass through capacitance, and useful signal frequency is lower, larger by the loss of signal after capacitance.
Summary of the invention
For the deficiency of background technology, the invention provides and a kind ofly carry out method that direct current offsets and circuit at intermediate frequency end, the DC component produced after the frequency conversion of real-time elimination continuous wave, make intermediate-freuqncy signal only surplus alternating current component, thus enough gains can be provided, zero intermediate frequency signals is amplified to the scope that applicable A/D converter gathers.
Technical scheme of the present invention is:
A method for Zero intermediate frequency direct current compensation, its feature comprises the steps:
Step one: Received signal strength is converted to zero intermediate frequency;
Step 2: zero intermediate frequency signals raises level through adder, then merit is divided into two-way, one tunnel detects DC component through effective value converter and delivers to differential amplifier, differential amplifier is directly delivered in another road, two paths of signals exports difference through differential amplifier, obtains the zero intermediate frequency signals after cancellation DC component.
The method of Zero intermediate frequency direct current compensation as above, is characterized in that: in described step 2, the concrete grammar of adder is: set up adder circuit based on operational amplifier, for zero intermediate frequency signals increases the DC component of 0.7V.Its beneficial effect is: avoid zero intermediate frequency signals to occur negative voltage.
The method of Zero intermediate frequency direct current compensation as above, it is characterized in that: in described step 2, the concrete grammar of differential amplifier is: use operational amplifier to set up differential amplifier, adopt precision resister to build the balanced bridge of differential amplifier to reduce error, multiplication factor is 1.
A circuit for Zero intermediate frequency direct current compensation, comprises voltage follower I, adder, voltage follower II, voltage follower III, RMS-DC converter circuit, differential amplifier.Zero intermediate frequency signals following by inputting voltages device I.The input of adder is connected with the output of voltage follower I, and output is connected with voltage follower III with voltage follower II.The output of voltage follower II is connected with the in-phase input end of differential amplifier.The output of voltage follower III is connected with the input of RMS-DC converter circuit, and the output of RMS-DC converter circuit is connected with the inverting input of differential amplifier.
The invention has the beneficial effects as follows: all DC component produced after eliminating down-conversion in real time, make zero intermediate frequency signals only surplus alternating current component, the alternating current component that can be zero intermediate frequency signals by post-amplifier like this provides enough gains, amplifier saturation when avoiding DC component to cause amplifying.
Accompanying drawing explanation
Fig. 1 is the theory diagram of Zero intermediate frequency direct current compensation of the present invention;
Fig. 2 is application continuous-wave radar system composition frame chart of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described in detail.
Be illustrated in figure 1 the theory diagram of Zero intermediate frequency direct current compensation technology of the present invention.The direct following by inputting voltages device I of the zero intermediate frequency signals produced after down-conversion, then the level raising zero intermediate frequency by adder is about 0.7V, merit is divided into two-way again, and differential amplifier is directly delivered in a road, and another road is delivered to effective value converter and converted direct current to and deliver to differential amplifier.Two paths of signals carries out subtraction through differential amplifier, obtains the alternating current component of zero intermediate frequency signals, i.e. useful signal.
The input of voltage follower I directly connects the medium frequency output end mouth of down-conversion mixer, and the input impedance because of voltage follower can be considered infinitely great, the intermediate frequency end of frequency mixer can be made to output signal and at utmost transfer to rear class.
The input of adder connects the output of voltage follower I, and its effect is for zero intermediate frequency signals adds a DC component, raises zero intermediate frequency signals level, avoids zero intermediate frequency signals to occur negative voltage.According to test, when voltage effective value is about 0.7V, the precision of effective value converter is the highest, and therefore DC component gets about 0.7V.
After adder, signal is divided into two-way, respectively cushions through a voltage follower, and such benefit reduces influencing each other between two paths of signals.One road signal after voltage follower II, through effective value converter, input difference amplifier.Another road signal after voltage follower III, direct input difference amplifier.
Effective value converter is used for changing out the effective value of signal.For sinusoidal wave and DC stacked signal, when not having negative voltage, the effective value of signal equals the magnitude of voltage of direct current.Therefore, the magnitude of voltage that effective value converter exports is the DC component of zero intermediate frequency signals.The present invention program selects LTC1966, its transformed error lower than 0.25%,
Use operational amplifier to set up differential amplifier circuit, its balanced bridge adopts precision resister (being not less than 1% precision) to reduce error.Multiplication factor is set to 1, and such benefit is that each resistance value that balanced bridge uses is equal, is easy to coupling.
After differential amplifier, output signal the difference into two paths of signals.What export due to effective value converter be the DC component on another road, through differential amplifier, exports the intermediate-freuqncy signal namely not containing DC component.
A kind of Zero intermediate frequency direct current compensation technology, is applicable to the zero intermediate frequency radar system needing to remove the DC component that down-conversion produces.
Be illustrated in figure 2 the continuous-wave radar system composition frame chart applying direct current cancellation techniques of the present invention, be made up of transmitting antenna, reception antenna, frequency synthesizer, receiver, signal transacting, monitor terminal.Frequency synthesizer provides rf excitation signal by transmission antennas transmit, and is coupled out a road signal delivers to receiver as local oscillator after phase shifter.The signal that reception antenna receives delivers to receiver, and the alternating current component exporting zero intermediate frequency signals delivers to signal transacting.Signal transacting carries out analysis and calculation to the alternating current component gathered, and obtains target information, is shown by monitor terminal.
Claims (2)
1. a method for Zero intermediate frequency direct current compensation, comprises the steps:
Step one: Received signal strength is converted to zero intermediate frequency;
Step 2: zero intermediate frequency signals raises level through adder, then merit is divided into two-way, one tunnel detects DC component through effective value converter and delivers to differential amplifier, differential amplifier is directly delivered in another road, two paths of signals exports difference through differential amplifier, obtains the zero intermediate frequency signals after cancellation DC component;
It is characterized in that: in described step 2, the concrete grammar of adder is: set up adder circuit based on operational amplifier, for zero intermediate frequency signals increases the DC component of 0.7V; In described step 2, the concrete grammar of differential amplifier is: use operational amplifier to set up differential amplifier, and adopt precision resister to build the balanced bridge of differential amplifier to reduce error, multiplication factor is 1.
2. the circuit of a Zero intermediate frequency direct current compensation, comprise voltage follower I, adder, voltage follower II, voltage follower III, RMS-DC converter circuit, differential amplifier, zero intermediate frequency signals following by inputting voltages device I, the input of adder is connected with the output of voltage follower I, output is connected with voltage follower III with voltage follower II, it is characterized in that: the output of voltage follower II is connected with the in-phase input end of differential amplifier, the output of voltage follower III is connected with the input of RMS-DC converter circuit, the output of RMS-DC converter circuit is connected with the inverting input of differential amplifier,
The direct following by inputting voltages device I of described zero intermediate frequency signals, then input summer, described adder is the DC component that zero intermediate frequency signals increases 0.7V, two-way is divided into after adder, differential amplifier is delivered in one tunnel after voltage follower II cushions, another road is delivered to effective value converter and is obtained effective value and deliver to differential amplifier again after voltage follower III cushions, and two paths of signals carries out subtraction through differential amplifier, obtains the alternating current component of zero intermediate frequency signals.
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| CN201310355188.7A CN103457623B (en) | 2013-08-15 | 2013-08-15 | A kind of circuit of Zero intermediate frequency direct current compensation and method |
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| CN201310355188.7A CN103457623B (en) | 2013-08-15 | 2013-08-15 | A kind of circuit of Zero intermediate frequency direct current compensation and method |
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| CN103457623A CN103457623A (en) | 2013-12-18 |
| CN103457623B true CN103457623B (en) | 2015-09-23 |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107659326B (en) * | 2017-08-30 | 2020-12-04 | 南京理工大学 | Novel millimeter wave receiver output signal dynamic expansion device |
| CN109283494A (en) * | 2017-12-13 | 2019-01-29 | 武汉滨湖电子有限责任公司 | The high-power transmitting leakage of bistatic continuous wave radar inhibits device and suppressing method |
| CN108768910B (en) * | 2018-07-05 | 2023-05-23 | 上海晟矽微电子股份有限公司 | Frequency offset determining device and method |
| CN110031647B (en) * | 2019-05-07 | 2020-04-07 | 清华大学 | ASIC interface for capacitive grating type angular displacement sensor |
| CN114337699B (en) * | 2021-12-14 | 2023-05-09 | 中国电子科技集团公司第三十八研究所 | Self-adaptive carrier cancellation device and method for zero intermediate frequency transmitter |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1917380A (en) * | 2006-08-01 | 2007-02-21 | 华为技术有限公司 | Method for eliminating dc bias for receiver and signal process module |
| CN101068104A (en) * | 2007-03-23 | 2007-11-07 | 鼎芯通讯（上海）有限公司 | DC deviation eliminating device and method |
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| JP5610899B2 (en) * | 2010-07-28 | 2014-10-22 | パナソニック株式会社 | Receiving circuit and receiving apparatus having the same |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1917380A (en) * | 2006-08-01 | 2007-02-21 | 华为技术有限公司 | Method for eliminating dc bias for receiver and signal process module |
| CN101068104A (en) * | 2007-03-23 | 2007-11-07 | 鼎芯通讯（上海）有限公司 | DC deviation eliminating device and method |
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