CN202978914U - Zero intermediate frequency receiver - Google Patents
Zero intermediate frequency receiver Download PDFInfo
- Publication number
- CN202978914U CN202978914U CN 201220575091 CN201220575091U CN202978914U CN 202978914 U CN202978914 U CN 202978914U CN 201220575091 CN201220575091 CN 201220575091 CN 201220575091 U CN201220575091 U CN 201220575091U CN 202978914 U CN202978914 U CN 202978914U
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- input
- demodulator
- input end
- intermediate frequency
- zero intermediate
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- Expired - Lifetime
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- Circuits Of Receivers In General (AREA)
Abstract
The utility model provides a zero intermediate frequency receiver, relates to the field of electronic communication, and aims to solve the technical problems of large volume, high power consumption, ineffaceable direct current component in a signal, direct current component drifting and the like of the existing L band receiver. According to the zero intermediate frequency receiver provided by the utility model, the input end of a first filter (1) is connected with an external input signal, and the output end is orderly connected in series with an amplitude limiter (2), an amplifier (3) and a second filter (4) and then is connected with the first input end of a demodulator (5); the demodulator (5) is connected with an A/D converter (6) through I and Q channels; the input end of the A/D converter (6) is connected with the input end of a processor (7); the input end of the processor (7) is connected with the second input end of the demodulator (5); and the third input end of the demodulator (5) is connected with local oscillator input (11).
Description
Technical field
The utility model relates to electronic communication field, particularly a kind of zero intermediate frequency reciver for the L-band receiver.
Background technology
Existing most of receiver all adopts the medium frequency scheme, and the signal that receives is through the amplifier postfilter and be converted to Low Medium Frequency, and its maximum defective is to need frequency-selecting assembly and filter, and its volume ratio is larger, is unfavorable for the miniaturization of receiver; Simultaneously the signal of Low Medium Frequency being carried out digitlization also needs high-speed A/D conversion chip, and A/D power consumption at a high speed is also higher, is unfavorable for reducing power consumption.
If adopt the zero intermediate frequency scheme of general fashion, the flip-flop in signal can not be eliminated, and simple method is used the Capacitor apart direct current exactly, but the charge and discharge process of electric capacity makes again signal truly not transmit.
Summary of the invention
The utility model is intended to solve that existing L-band receiver exists that volume is large, power consumption is high, the flip-flop in signal can not be eliminated and the technical problem such as flip-flop drift, with provide a kind of volume little, low in energy consumption, do not exist zero intermediate frequency scheme flip-flop can not eliminate and the zero intermediate frequency reciver of the problem such as flip-flop drift.
The purpose of this utility model is achieved through the following technical solutions.
Zero intermediate frequency reciver of the present utility model, the input of filter 1 connects external input signal, its output is connected with the input one of demodulator 5 after being connected in series in turn amplitude limiter 2, amplifier 3, filter 24, demodulator 5 connects A/D converter 6 by I, Q passage, the input of A/D converter 6 connects the input of processor 7, the input of processor 7 connects the input two of demodulator 5, and the input three of demodulator 5 connects local oscillator input 11.
The beneficial effect of the utility model zero intermediate frequency reciver: the volume of receiver dwindles greatly, power consumption also reduces by 20%, has solved always bundle and has disturbed the direct current problem of zero intermediate frequency scheme and the problem of flip-flop drift.
Description of drawings
Fig. 1 structure principle chart of the present utility model
The number in the figure explanation:
1 filter one, 2 amplitude limiters, 3 amplifiers, 4 filters two, 5 demodulators, 6 A/D converters, 7 processors, 10 feed back and control, 11 local oscillators inputs
Embodiment
The utility model detailed construction, application principle, effect and effect with reference to accompanying drawing 1, are explained by following execution mode.
Consult shown in Figure 1, zero intermediate frequency reciver of the present utility model, the input of filter 1 connects external input signal, its output is connected with the input one of demodulator 5 after being connected in series in turn amplitude limiter 2, amplifier 3, filter 24, demodulator 5 connects A/D converter 6 by I, Q passage, the input of A/D converter 6 connects the input of processor 7, and the input of processor 7 connects the input two of demodulator 5, and the input three of demodulator 5 connects local oscillator input 11.
The signal that arrives by antenna reception passes through amplitude limiter, enter demodulation chip after amplifier and filter, then use twin-channel low speed A/D that I, Q signal are sampled, the digital signal that obtains enters processor, obtain the size of flip-flop after calculating by processor, carry out the flip-flop of feedback adjusting demodulator according to this flip-flop, make flip-flop be reduced to 0; Simultaneously this composition is dynamically adjusted, reduced the flip-flop that temperature drift brings.
Therefore, zero intermediate frequency reciver of the present utility model, have volume greatly dwindle, low in energy consumption, solved always bundle and disturbed the direct current problem of zero intermediate frequency scheme and the technological merits such as problem of flip-flop drift.
Claims (1)
1. zero intermediate frequency reciver, it is characterized in that: the input of filter one (1) connects external input signal, its output is connected with the input one of demodulator (5) after being connected in series in turn amplitude limiter (2), amplifier (3), filter two (4), demodulator (5) connects A/D converter (6) by I, Q passage, the input of A/D converter (6) connects the input of processor (7), the input of processor (7) connects the input two of demodulator (5), and the input three of demodulator (5) connects local oscillator input (11).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220575091 CN202978914U (en) | 2012-11-05 | 2012-11-05 | Zero intermediate frequency receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220575091 CN202978914U (en) | 2012-11-05 | 2012-11-05 | Zero intermediate frequency receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202978914U true CN202978914U (en) | 2013-06-05 |
Family
ID=48519931
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220575091 Expired - Lifetime CN202978914U (en) | 2012-11-05 | 2012-11-05 | Zero intermediate frequency receiver |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202978914U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107404326A (en) * | 2017-09-21 | 2017-11-28 | 天津光电通信技术有限公司 | A kind of superhet of combination software radio |
| CN110113067A (en) * | 2019-04-22 | 2019-08-09 | 智为博程电子科技(苏州)有限公司 | A kind of IQ disequilibrium regulating device and method for zero intermediate frequency reciver |
-
2012
- 2012-11-05 CN CN 201220575091 patent/CN202978914U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107404326A (en) * | 2017-09-21 | 2017-11-28 | 天津光电通信技术有限公司 | A kind of superhet of combination software radio |
| CN110113067A (en) * | 2019-04-22 | 2019-08-09 | 智为博程电子科技(苏州)有限公司 | A kind of IQ disequilibrium regulating device and method for zero intermediate frequency reciver |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130605 |