CN204154755U

CN204154755U - A kind of BGA package test jack

Info

Publication number: CN204154755U
Application number: CN201420588900.8U
Authority: CN
Inventors: 杨阳; 杨硕; 周津
Original assignee: No 8357 Research Institute of Third Academy of CASIC
Current assignee: No 8357 Research Institute of Third Academy of CASIC
Priority date: 2014-10-11
Filing date: 2014-10-11
Publication date: 2015-02-11
Anticipated expiration: 2024-10-11

Abstract

The utility model discloses a kind of BGA package test jack, it is characterized in that this socket comprises substrate, the programmable logic device (PLD) of burying in substrate and pin test point, described substrate is integrated PCB plate, substrate inside is provided with cabling, cabling is connected with the pin of programmable logic device (PLD), the upper face center of substrate is provided with slot, slot point is provided with in slot, described slot is used for inserting bga chip to be measured, the separation of described slot and the spherical pin spacing conformance to specifications of bga chip to be measured, the number of lines and columns of described slot point are greater than line number and the columns of the spherical pin encapsulation of bga chip to be measured respectively, the bottom surface of described substrate is provided with substrate draw-foot, and described programmable logic device (PLD) is connected with the spherical pin of substrate draw-foot and bga chip to be measured, described pin test point is drawn by programmable logic device (PLD), is evenly distributed on the top surface edge of substrate.

Description

A kind of BGA package test jack

Technical field

The utility model relates to a kind of test jack, is specially a kind of BGA package test jack.

Background technology

The pin of chip bga is measured to be needed will consider before pcb board design, and needs each pin carrying out measuring to draw a test point, uses when giving over to pcb board test.If do not draw test point when pcb board designs, so when system testing if there is problem, the equipment such as oscillograph just cannot be used to measure.

The pin-pitch specification of chip bga is limited, be generally several specification such as 1.27mm, 1mm, 0.8mm, 0.65mm, 0.5mm, 0.45mm, 0.4mm, 0.3mm, but under same specification, pin number and the distribution of bga chip have very large difference, the bga chip of a lot of non-standard encapsulation cannot put into the bga socket of standard, need the socket of special special format customized, this greatly adds testing cost and the cycle of small-lot chips.

Traditional board level testing system must reserve the test point of special pin, once determine to change; If need to retain the power of test to all BGA pins, need all pins all to draw test point.

Therefore provide one to can be used in non-standard encapsulation bga chip, and the test jack that identical, signal pins quantity carries out pin test with the different bga chip that distributes that distribute of measure-alike, power pins and ground pin become problem demanding prompt solution in prior art.

Utility model content

For the deficiencies in the prior art, the technical matters that the utility model quasi-solution is determined is, provide a kind of BGA package test jack, this socket can carry out power of test to the whole pin of chip bga, and is applicable to the bga chip of the off-gauge BGA package form in standard and certain limit.

The utility model solve the technical problem adopted technical scheme, a kind of BGA package test jack is provided, it is characterized in that this socket comprises substrate, the programmable logic device (PLD) of burying in substrate and pin test point, described substrate is integrated PCB plate, substrate inside is provided with cabling, cabling is connected with the pin of programmable logic device (PLD), the upper face center of substrate is provided with slot, slot point is provided with in slot, described slot is used for inserting bga chip to be measured, the separation of described slot and the spherical pin spacing conformance to specifications of bga chip to be measured, the number of lines and columns of described slot point are greater than line number and the columns of the spherical pin encapsulation of bga chip to be measured respectively, the bottom surface of described substrate is provided with substrate draw-foot, and described programmable logic device (PLD) is connected with the spherical pin of substrate draw-foot and bga chip to be measured, described pin test point is drawn by programmable logic device (PLD), is evenly distributed on the top surface edge of substrate.

Compared with prior art, the utility model has online programming ability, the spherical pin of specifying arbitrarily of bga chip to be measured can be led to pin test point, tested spherical pin can be changed, by the test using a small amount of pin test point can realize the spherical pin to all bga chips to be measured by programming simultaneously.The utility model also has good adaptability, identical in pin-pitch, when the row, column number of the spherical pin of bga chip to be measured is no more than the row, column number of slot point of slot in the utility model, the test of the bga chip to different number of pins type can be realized.

Accompanying drawing explanation

Fig. 1 is the vertical section structural representation of a kind of embodiment of the utility model BGA package test jack;

Fig. 2 is the plan structure schematic diagram of a kind of embodiment of the utility model BGA package test jack;

In figure, 1, substrate, 2, programmable logic device (PLD), 3, pin test point, 4, substrate draw-foot, 5, bga chip to be measured.

Embodiment

Describe the utility model further below in conjunction with embodiment and accompanying drawing thereof, specific embodiment is only to further explanation of the present utility model, does not limit protection domain of the present utility model with this.

The test jack of the utility model BGA package (is called for short socket, see Fig. 1-2) comprise substrate 1, the programmable logic device (PLD) 2 of burying in substrate and pin test point 3, described substrate 1 is the pcb board of high integration, substrate 1 inside is provided with cabling, cabling is connected with the pin of programmable logic device (PLD) 2, the upper face center of substrate 1 is provided with slot, slot point is provided with in slot, described slot is used for inserting bga chip 5 to be measured, state the separation of slot and the spherical pin spacing conformance to specifications of bga chip to be measured, the number of lines and columns of described slot point are greater than line number and the columns of the spherical pin encapsulation of bga chip to be measured respectively, the bottom surface of described substrate 1 is provided with substrate draw-foot 4, and the spherical pin of described programmable logic device (PLD) 2 and substrate draw-foot 4 and bga chip to be measured 5 is carried out logic and is connected, described pin test point 3 is drawn by programmable logic device (PLD) 2, is evenly distributed on the top surface edge of substrate 1.

The using method of the utility model socket is: when needs carry out functional test to bga chip to be measured, bga chip 5 to be measured is inserted in the slot of substrate 1, and adopt physical connection mode to be connected to test macro this socket, according to system, in advance programmable logic device (PLD) 2 is programmed, bga chip 5 to be measured is connected in default output pin test point 3 by logic;

When needing certain the spherical pin signal measuring bga chip 5 to be measured, need to programme to programmable logic device (PLD) 2, the spherical pin of bga chip to be measured is connected in the reserved pin test point 3 of BGA test jack by programmable logic device (PLD) 2, just can measures the state of this point;

When needing the type changing bga chip 5 to be measured, only needing again to programme to programmable logic device (PLD) 2, setting up the spherical pin of new bga chip to be measured 5 and the corresponding annexation of pin test point 3.

The quantity of the utility model pin test point 3 is relevant with the quantity of requirement of system design and bga chip to be measured, and maximum can the support of the quantity of pin test point 3 is tested the pin of all bga chips.

The software flow that the utility model realizes is: 1) be all GPIO pin being connected to the pin assignment programmable logic device (PLD) 2 of the bga chip to be measured 5 of substrate draw-foot 4; 2) for needing the pin assignment programmable logic device pin of the bga chip to be measured 5 being connected to pin test point 3; 3) in the internal logic of programmable logic device, by 1), 2) logical relation set up in two steps connects; 4) if need to change the Pin locations that bga chip 5 to be measured leads to pin test point 3, then the 2nd is returned) step resets; 5) the software programming of having write is entered in the program storage area of programmable logic device (PLD).

The test jack of the utility model BGA package, there is online programming ability, the spherical pin of specifying arbitrarily of bga chip 5 to be measured can be led to pin test point 3, possess the power of test of use a small amount of pin test point 3 to the spherical pin of all bga chips 5 to be measured, and the spherical pin of tested bga chip 5 can be changed by programming, and then the test of the spherical pin to all bga chips 5 to be measured can be realized easily.The utility model has good adaptability, identical in pin-pitch, when the line number of bga chip 5 spherical pin to be measured and columns are no more than line number and the columns of slot point in slot in the utility model respectively, the test of the bga chip to different number of pins type can be realized.

The utility model is not addressed part and is all applicable to prior art.

Claims

1. a BGA package test jack, it is characterized in that this socket comprises substrate, the programmable logic device (PLD) of burying in substrate and pin test point, described substrate is integrated PCB plate, substrate inside is provided with cabling, cabling is connected with the pin of programmable logic device (PLD), the upper face center of substrate is provided with slot, slot point is provided with in slot, described slot is used for inserting bga chip to be measured, the separation of described slot and the spherical pin spacing conformance to specifications of bga chip to be measured, the number of lines and columns of described slot point are greater than line number and the columns of the spherical pin encapsulation of bga chip to be measured respectively, the bottom surface of described substrate is provided with substrate draw-foot, and described programmable logic device (PLD) is connected with the spherical pin of substrate draw-foot and bga chip to be measured, described pin test point is drawn by programmable logic device (PLD), is evenly distributed on the top surface edge of substrate.