CN204090285U - Circuit board and via structure thereof - Google Patents
Circuit board and via structure thereof Download PDFInfo
- Publication number
- CN204090285U CN204090285U CN201420526379.5U CN201420526379U CN204090285U CN 204090285 U CN204090285 U CN 204090285U CN 201420526379 U CN201420526379 U CN 201420526379U CN 204090285 U CN204090285 U CN 204090285U
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- Prior art keywords
- circuit board
- circuit
- board substrate
- screen
- top layer
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- Expired - Lifetime
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- 239000000758 substrate Substances 0.000 claims abstract description 66
- 238000009413 insulation Methods 0.000 claims description 9
- 125000006850 spacer group Chemical group 0.000 claims description 4
- 238000000034 method Methods 0.000 description 10
- 238000012545 processing Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 9
- 238000013461 design Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000004080 punching Methods 0.000 description 3
- 241000208340 Araliaceae Species 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 2
- 235000003140 Panax quinquefolius Nutrition 0.000 description 2
- 238000002788 crimping Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 235000008434 ginseng Nutrition 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 241001074085 Scophthalmus aquosus Species 0.000 description 1
- 238000010009 beating Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000000805 composite resin Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052755 nonmetal Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000012958 reprocessing Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The utility model provides a kind of circuit board via structure and circuit board thereof, to be arranged on a circuit board substrate and to comprise the top layer circuit of the telltale hole be positioned on circuit board substrate, the upper surface being positioned at circuit board substrate and lower surface and be arranged at the internal layer circuit of described circuit board substrate.One deck ground path is at least comprised in described top layer circuit or described internal layer circuit.Described telltale hole periphery is surrounded with screen and is provided with dielectric between described telltale hole and described screen.Described screen is connected with described ground path.The utility model circuit board via structure is by arranging a screen in the periphery of telltale hole, utilize the contact of ground path in screen and circuit board, realize the function of shielding of screen, reduce the impact of signal disturbing, ensured the signal transmitting quality in screen inboard signal hole.
Description
Technical field
The utility model relates to art of printed circuit boards, particularly relates to circuit board and via structure thereof.
Background technology
Printed circuit board (PCB) (PCB) is important electronic unit, is the supporter of electronic devices and components, is the supplier of electronic devices and components electrical connection.Via hole is the critical component that multi-layer PCB veneer connects different layers cabling.Along with the continuous lifting of single board communication signal rate, require more and more higher to the Signal Integrity Design of veneer cabling, via hole and pad, to with high-speed signal transmission lines, usually screen can be passed through, obtain best shield effectiveness, but to high speed signal via hole, there is no extraordinary Shielding plan at present.Be a star moon hole scheme of beating hole, ground at high speed signal via hole periphery, but this kind of scheme is general to the effectiveness performance of aperture, ultra high speed signal transmission requirement cannot be met, especially cannot meet the test request of ultra high speed signal.
Therefore, necessaryly a kind of printed circuit plated-through-hole structure is provided to solve above-mentioned technical problem.
Summary of the invention
The purpose of this utility model is to solve above-mentioned part or all of technical problem, provides a kind of circuit board via structure of improvement.
For achieving the above object, the utility model adopts following technical scheme: a kind of circuit board via structure, to be arranged on a circuit board substrate and to comprise the top layer circuit of the telltale hole be positioned on circuit board substrate, the upper surface being positioned at circuit board substrate and lower surface and be arranged at the internal layer circuit of described circuit board substrate, one deck ground path is at least comprised in described top layer circuit or described internal layer circuit, described telltale hole periphery is surrounded with screen and is provided with dielectric between described telltale hole and described screen, and described screen is connected with described ground path.
Further, described screen ringwise, and with closed around mode around the periphery of described telltale hole.
Further, the hole wall of described telltale hole is with conductive layer, and described conductive layer is connected with at least one in the top layer circuit of described circuit board substrate upper surface and the top layer circuit of lower surface.
Further, the upper surface top layer connection of described conductive layer and described circuit board substrate, isolates with the lower surface top layer line insulation of described circuit board substrate; Upper surface top layer circuit and the lower surface top layer line insulation of described screen and described circuit board substrate are isolated.
Further, described ground path is at least two-layer, and it is all connected with described screen, and is provided with spacer medium between every layer of ground path.
Further, the hole wall of described telltale hole, with conductive layer, also comprises outlet circuit in described internal layer circuit, described conductive layer and described outlet connection.
Further, the upper surface top layer circuit of described telltale hole and described circuit board substrate and lower surface top layer line insulation are isolated.
Further, the quantity of described telltale hole is at least two, and the shape of described screen is circular or oval.
The utility model also provides a kind of circuit board, it comprises circuit board substrate and is arranged at the via structure on described circuit board substrate, described via structure comprises the top layer circuit of the telltale hole be positioned on circuit board substrate, the upper surface being positioned at circuit board substrate and lower surface and is arranged at the internal layer circuit of described circuit board substrate, described telltale hole periphery is surrounded with screen and is provided with dielectric between described telltale hole and described screen, at least comprise one deck ground path in described top layer circuit or described internal layer circuit, described screen is connected with described ground path.
Further, the hole wall of described telltale hole is with conductive layer, and described conductive layer is connected with at least one in the top layer circuit of described circuit board substrate upper surface and the top layer circuit of lower surface.
Compared with prior art, the utility model circuit board and via structure thereof are by arranging a screen in the periphery of telltale hole, utilize the contact of ground path in screen and circuit board, realize the function of shielding of screen, reduce the impact of signal disturbing, ensure the signal transmitting quality in screen inboard signal hole.
Accompanying drawing explanation
(A) in Fig. 1, (B) are respectively vertical view and the cross section view of the utility model circuit board via structure.
Fig. 2 is the processing process figure of the circuit board via structure in the utility model embodiment 1.
Fig. 3 is the processing process figure of the circuit board via structure in the utility model embodiment 2.
Embodiment
Shown in ginseng Fig. 1, the utility model provides a kind of circuit board via structure, its screen 30 being provided with circuit board substrate 10, being positioned at the telltale hole 20 of circuit board substrate 10 and being surrounded on described telltale hole 20 periphery.
Described circuit board substrate 10 is sandwich construction, and it is provided with at the top layer circuit 11 of circuit board substrate 10 upper and lower surface, the internal layer circuit 12 inside top layer circuit 11 and the spacer medium between each line layer 13.Described internal layer circuit 12 is positioned at the inside of described circuit board substrate 10, and described internal layer circuit 12 includes at least one deck ground path 14, can according to the difference of practical function, carry out different designs, internal layer circuit 12 shown in Fig. 1 is made up of two-layer ground path 14, and between the two by spacer medium insulation isolation.
Described telltale hole 20 is arranged perpendicular to the upper and lower surface of described circuit board substrate 10, and telltale hole 20 extends to the inside of circuit board substrate 10, and completely cuts off with the internal layer circuit 12 of circuit board substrate 10 inside.Described telltale hole 20 is rounded, and its hole wall contains conductive layer (material is copper), and this conductive layer is used for electrical connection, realizes the transmission of high speed signal.In addition, according to actual needs, the quantity of described telltale hole 20 can be two, also can be one or more, and depending on embody rule demand, and the screen 30 of described circular signal hole 20 and its periphery can in arranging (also can decentraction) with one heart.
Ringwise, it is surrounded on the periphery of described telltale hole 20 to described screen 30, and and be provided with dielectric 21 between telltale hole 20, making realizes between screen 30 and telltale hole 20 insulating isolates.Because described screen 30 is for playing the effect of shielded signal interference, therefore, described screen 30 is through is connected to during circuit board substrate 10 inside with the ground path 14 in described internal layer circuit 12.The shape of described screen 30 can according to simulation result, select and include but not limited to circle, ellipse and other various shapes, and in closed around mode (also can adopt non-enclosed) around the periphery of telltale hole 20, reach preferably shield effectiveness.And the material of described screen 30 is generally PCB chemical copper or electro-coppering, also comprise the shielding material that other can be attached to PCB inwall, such as: metal material and other nonmetal shielding material or the composite materials such as copper, nickel, palladium, gold.Described dielectric generally adopts epoxide resin material, also can according to the requirement of signal rate and effect, Ceramics material, Low DK material, resin composite materials and other meet the material that fixing and insulation property require.
Described telltale hole 20 and screen 30 are according to the different structure of circuit board substrate 10 inside, and structure with processing technology exist different, below underdraw the utility model preferably two embodiments:
Embodiment 1
Described internal layer circuit 12 is for being grounded function, and it comprises the two-layer ground path (also can be 1 layer or multilayer, depending on real needs, represent in figure with GND) between described top layer circuit (representing with Top, Bot in figure).Described telltale hole 20 by the upper surface vertically through lower surface to circuit board substrate of circuit board substrate, and is connected to top layer circuit Top, Bot of circuit board substrate upper and lower surface respectively, is connected to desired location by top layer circuit Top, Bot.Because internal layer circuit is made up of two-layer ground path GND, therefore, described screen 30 only need be connected with the ground path GND in internal layer circuit, can realize shielding action.
As shown in Figure 2, be the circuit board substrate of ground path GND for this internal layer circuit, telltale hole 20 will from top layer circuit Top, Bot outlet, its processing mode is comparatively simple, for two-layer ground path GND, as shown in the figure, this processing technology comprises A-G procedure successively:
A. punch: adopt conventional hole knockout, printed circuit board (PCB) is punched, forms the through hole of consistent circuit passband plate upper and lower surface;
B. electroplate in hole: adopt metallization slotted eye technique, as plating, the hole wall of through hole is metallized, form ring shielding layer 30, ring shielding layer 30 is directly contacted with the two-layer ground path GND of internal layer circuit, makes ring shielding layer 30 possess ground connection attribute;
C. screen is imbedded: for convenience of the processing of top layer circuit, use the mode of the dark milling/brill of control, screen 30 is disconnected with top layer circuit Top, Bot, then this slotted eye used Filled Dielectrics and polish, remove unnecessary screen with this, also make screen 30 be placed in circuit board substrate inside; Certainly, if top layer circuit Top, Bot are also ground path, then screen 30 and top layer circuit Top, Bot need not be disconnected or only breaking part, the pattern layout meeting top layer, high speed signal hole 20 requires, therefore, this operation is non-essential, is determined on a case-by-case basis;
D. consent: insert dielectric in through hole, makes dielectric be full of inside ring shielding layer 30, reaches insulation isolation effect;
E. two punchings: the dielectric inside ring shielding layer 30 is punched again, form endoporus, and endoporus is positioned at ring shielding layer 30;
F. second time electroplating: the hole wall of endoporus is electroplated, make the via hole form conductive layer, thus form the telltale hole 20 of transmit high-speed signals, simultaneously, further the hole wall after metallization is extended to circuit board substrate upper and lower surface, conductive layer is connected with top layer circuit Top, Bot;
G. showing methods: last, according to the graphics request of circuit board substrate, the lead line of telltale hole 20 is modified processing, such as, telltale hole 20 is insulated with the top layer circuit Bot of circuit board substrate lower surface and disconnects, to meet the requirement of graphic designs, but this operation is non-essential, is determined on a case-by-case basis.
So, namely the processing of the full-shield high speed via hole running through circuit board substrate is completed, the conductive layer of telltale hole 20 is connected to the top layer circuit Top of circuit board substrate upper surface, and be connected to desired location by top layer circuit Top, and described screen 30 is formed at the periphery of telltale hole 20, and the ground path GND in connecting circuit base board, and all insulate with top layer circuit Top, Bot and isolate, the effect of shielded signal interference can be played, ensure that telltale hole 20 has higher signal transmitting quality when transmit high-speed signals.
Embodiment 2
In the present embodiment, described internal layer circuit adopts another kind of design, be mainly used in the application demand of satisfied inner outlet, namely in described internal layer circuit except comprising ground path GND, also comprise outlet circuit Out, described ground path GND is used for contacting with screen 30, to reduce the signal disturbing between adjacent lines layer, and described outlet circuit Out is connected with telltale hole 20, for the signal of telltale hole 20 is caused desired location, therefore, one end of described telltale hole 20 need not the upper and lower surface of through whole circuit board substrate, only need through to outlet circuit Out position.
As shown in Figure 3, for the circuit board substrate of this inner outlet, its processing technology and embodiment 1 different, mainly comprise A-I procedure, be summarized as follows:
A. punch: punching process is carried out to circuit board substrate upper surface, form a blind hole, the degree of depth of described blind hole is comparatively shallower than the outlet circuit Out in circuit board substrate, namely described outlet circuit Out is positioned at the below of described blind hole, meanwhile, the lower surface of circuit board substrate is carried out to the disconnection of top layer circuit Top, Bot;
B. electroplate in hole: metalized is carried out to the inwall of blind hole, form ring shielding layer 30, and screen 30 contacts conducting with ground path GND;
C. screen is imbedded: for removing unnecessary screen (processing mode ginseng embodiment 1, repeats no more);
D. blind via bottom is holed: bore an aperture in the bottom (i.e. the Yu Houshang of circuit board) of blind hole, this operation is carried out mainly for the darker situation of blind hole, object conveniently circulates to gas when carrying out consent in ring shielding layer 30, guarantee consent effect, but this operation is non-essential, is determined on a case-by-case basis;
E. consent: namely fill dielectric in blind hole, method, with embodiment 1, repeats no more;
F. two punchings: the dielectric in ring shielding layer 30 is punched again, forms the through hole being positioned at inside ring shielding layer and through circuit board substrate upper and lower surface;
G. second time electroplating: metalized is carried out to the internal face of through hole and upper and lower surface, form the conductive layer on telltale hole 20 hole wall of connecting circuit base board upper and lower sides top layer circuit Top, Bot, and the through circuit board substrate of telltale hole 20 inner time, make conductive layer and described ground path GND conducting contact;
H. showing methods: according to the graphic designs demand of reality, disconnect telltale hole 20 and circuit Top, Bot junction, top layer, with embodiment 1, but this operation is non-essential, is determined on a case-by-case basis.
I. figure reprocessing: last, in order to reduce the impact of Stub effect, the conductive layer of the telltale hole 20 being positioned at outlet below circuit Out is removed, the upper surface top layer circuit of described telltale hole 20 and described circuit board substrate and lower surface top layer circuit are all insulated isolate, to obtain best via hole electric property, certainly, this operation is also non-essential, can depend on the circumstances.
So, what can complete inner outgoing line circuit base board crosses hole machined, high speed signal hole is made to be positioned at the inner side of ring shielding layer 30, simultaneously, screen 30 directly and ground path GND conducting, and the conductive layer of telltale hole 20 and the direct conducting of outlet circuit Out, thus realize the function from the inner outlet of circuit board substrate.
Certainly, described ground path, the position of outlet circuit can present different designs according to concrete needs, such as, except in the internal layer circuit being located at described circuit board substrate, described ground path also can be located in the circuit of described top layer, such as, when the inner outlet of circuit board, when the upper surface top layer circuit of circuit board substrate 10 is ground path, telltale hole 20 hole wall and this ground path insulate and isolate, and the side of telltale hole 20 is by crimping, welding, the modes such as grafting make hole wall be connected to signal line, the opposite side of telltale hole 20 is then connected directly to the outlet circuit in internal layer circuit, and when the upper and lower surperficial top layer circuit of circuit board substrate 10 is ground path, the both sides of described telltale hole 20 can be connected to signal line by the mode of crimping, welding or grafting, in addition, sometimes also breach can be formed on the shielding layer, outlet circuit for telltale hole is drawn, above via structure is other execution modes of the present utility model, does not repeat them here.
The above; it is only most preferred embodiment of the present utility model; not any pro forma restriction is done to the utility model; any those of ordinary skill in the art; do not departing under technical solutions of the utility model ambit; utilize the method content of above-mentioned announcement to make many possible variations and modification to technical solutions of the utility model, all belong to the scope of claims protection.
Claims (10)
1. a circuit board via structure, be arranged on a circuit board substrate, and comprise the top layer circuit of the telltale hole be positioned on circuit board substrate, the upper surface being positioned at circuit board substrate and lower surface and be arranged at the internal layer circuit of described circuit board substrate, it is characterized in that: in described top layer circuit or described internal layer circuit, at least comprise one deck ground path, described telltale hole periphery is surrounded with screen and is provided with dielectric between described telltale hole and described screen, and described screen is connected with described ground path.
2. circuit board via structure according to claim 1, is characterized in that: described screen ringwise, and with closed around mode around the periphery of described telltale hole.
3. according to the circuit board via structure described in claim 1 or 2, it is characterized in that: the hole wall of described telltale hole is with conductive layer, and described conductive layer is connected with at least one in the top layer circuit of described circuit board substrate upper surface and the top layer circuit of lower surface.
4. circuit board via structure according to claim 3, is characterized in that: the upper surface top layer connection of described conductive layer and described circuit board substrate, isolates with the lower surface top layer line insulation of described circuit board substrate; Upper surface top layer circuit and the lower surface top layer line insulation of described screen and described circuit board substrate are isolated.
5. according to the circuit board via structure described in claim 2, it is characterized in that: described ground path is at least two-layer, and it is all connected with described screen, and is provided with spacer medium between every layer of ground path.
6. circuit board via structure according to claim 1, is characterized in that: the hole wall of described telltale hole, with conductive layer, also comprises outlet circuit in described internal layer circuit, described conductive layer and described outlet connection.
7. according to the circuit board via structure described in claim 1 or 2, it is characterized in that: upper surface top layer circuit and the lower surface top layer line insulation of described telltale hole and described circuit board substrate are isolated.
8. circuit board via structure according to claim 7, is characterized in that: the quantity of described telltale hole is at least two, and the shape of described screen is circular or oval.
9. a circuit board, comprise circuit board substrate and be arranged at the via structure on described circuit board substrate, described via structure comprises the top layer circuit of the telltale hole be positioned on circuit board substrate, the upper surface being positioned at circuit board substrate and lower surface and is arranged at the internal layer circuit of described circuit board substrate, it is characterized in that: described telltale hole periphery is surrounded with screen and is provided with dielectric between described telltale hole and described screen, at least comprise one deck ground path in described top layer circuit or described internal layer circuit, described screen is connected with described ground path.
10. circuit board according to claim 9, is characterized in that: the hole wall of described telltale hole is with conductive layer, and described conductive layer is connected with at least one in the top layer circuit of described circuit board substrate upper surface and the top layer circuit of lower surface.
Priority Applications (1)
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CN201420526379.5U CN204090285U (en) | 2014-09-12 | 2014-09-12 | Circuit board and via structure thereof |
Applications Claiming Priority (1)
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CN201420526379.5U CN204090285U (en) | 2014-09-12 | 2014-09-12 | Circuit board and via structure thereof |
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CN204090285U true CN204090285U (en) | 2015-01-07 |
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CN201420526379.5U Expired - Lifetime CN204090285U (en) | 2014-09-12 | 2014-09-12 | Circuit board and via structure thereof |
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
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CN107124821A (en) * | 2017-07-13 | 2017-09-01 | 郑州云海信息技术有限公司 | A kind of via and its manufacture method and printed circuit board |
CN107548226A (en) * | 2017-08-22 | 2018-01-05 | 新华三技术有限公司 | A kind of printed circuit board (PCB) preparation technology and printed circuit board (PCB) |
CN108288979A (en) * | 2018-01-26 | 2018-07-17 | 武汉电信器件有限公司 | A kind of high speed signal test system |
CN110099509A (en) * | 2019-04-08 | 2019-08-06 | Oppo广东移动通信有限公司 | Circuit board and electronic equipment |
CN110300492A (en) * | 2019-07-25 | 2019-10-01 | 生益电子股份有限公司 | A kind of production method and PCB of PCB |
CN110392482A (en) * | 2018-04-18 | 2019-10-29 | 北大方正集团有限公司 | Circuit board |
CN111246671A (en) * | 2020-01-22 | 2020-06-05 | 惠州中京电子科技有限公司 | Plated through hole processing method for improving reliability of 5G high-frequency material |
-
2014
- 2014-09-12 CN CN201420526379.5U patent/CN204090285U/en not_active Expired - Lifetime
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
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CN107124821A (en) * | 2017-07-13 | 2017-09-01 | 郑州云海信息技术有限公司 | A kind of via and its manufacture method and printed circuit board |
CN107548226A (en) * | 2017-08-22 | 2018-01-05 | 新华三技术有限公司 | A kind of printed circuit board (PCB) preparation technology and printed circuit board (PCB) |
CN107548226B (en) * | 2017-08-22 | 2020-05-12 | 新华三技术有限公司 | Printed circuit board preparation process and printed circuit board |
CN108288979A (en) * | 2018-01-26 | 2018-07-17 | 武汉电信器件有限公司 | A kind of high speed signal test system |
CN108288979B (en) * | 2018-01-26 | 2022-01-14 | 武汉电信器件有限公司 | High-speed signal test system |
CN110392482A (en) * | 2018-04-18 | 2019-10-29 | 北大方正集团有限公司 | Circuit board |
CN110099509A (en) * | 2019-04-08 | 2019-08-06 | Oppo广东移动通信有限公司 | Circuit board and electronic equipment |
CN110300492A (en) * | 2019-07-25 | 2019-10-01 | 生益电子股份有限公司 | A kind of production method and PCB of PCB |
CN111246671A (en) * | 2020-01-22 | 2020-06-05 | 惠州中京电子科技有限公司 | Plated through hole processing method for improving reliability of 5G high-frequency material |
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Address after: 310052 Binjiang District Changhe Road, Zhejiang, China, No. 466, No. Patentee after: Xinhua three Technology Co., Ltd. Address before: 310052 Binjiang District Changhe Road, Zhejiang, China, No. 466, No. Patentee before: Huasan Communication Technology Co., Ltd. |