CN203950797U - 功率器件 - Google Patents

功率器件 Download PDF

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CN203950797U
CN203950797U CN201420301467.5U CN201420301467U CN203950797U CN 203950797 U CN203950797 U CN 203950797U CN 201420301467 U CN201420301467 U CN 201420301467U CN 203950797 U CN203950797 U CN 203950797U
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黄泽军
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Shenzhen Rui Jun Semiconductor Ltd By Share Ltd
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SHENZHEN RUICHIPS SEMICONDUCTOR CO Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • HELECTRICITY
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
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    • H01L2924/181Encapsulation

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Abstract

本实用新型公开一种功率器件,其包括有一框架、一芯片及一封装体,其中,所述框架包括有一载片、至少一位于所述载片上方的第一散热片及至少一连结所述载片边缘和第一散热片边缘的侧板;所述芯片设置于所述载片上且处于所述第一散热片的正下方,并通过引线而与所述框架的引脚形成电气连接;所述封装体包覆所述载片、第一散热片、侧板及芯片。藉由该第一散热片及侧板的设置,增加了整个器件的散热面积,提高了功率器件的散热效果,同时,使得该芯片处于由载片、第一散热片及侧板所围成的空间中,可以屏蔽外部电场,防止外部电磁辐射对于芯片的干扰,如此,有利于保证功率器件的工作性能,并延长功率器件的使用寿命。

Description

功率器件
技术领域
本实用新型涉及半导体技术领域,尤其是指一种具有良好的散热和抗电磁干扰性能的功率器件。
背景技术
作为电子行业应用最为广泛的电气元件之一,功率器件正沿着大功率化、高频化、高集成化的方向发展,故而,其是否具有良好的散热和抗电磁干扰设计就成为了影响功率器件工作性能和使用寿命的关键因素。图1为现有技术的功率器件的结构示意图,该功率器件包括有一散热片10、一设置于该散热片10之上且与该散热片10绝缘隔离的载片11、一通过焊锡12而设置于该载片11上的芯片13及一包覆该载片11和芯片13的封装体14,其中,该芯片13通过引线15而与引脚16形成电气连接。此类结构的功率器件存在如下两方面的问题:一者,芯片13工作时所产生的热量主要通过载片11并经由散热片10而散发出去,由于受到载片11和散热片10的尺寸限制,且散热途径单一,导致功率器件的散热效果不佳;二者,功率器件并未设计有屏蔽结构以防止外部电磁辐射对于芯片13的电磁干扰,外部电磁辐射容易对芯片13的工作造成负面影响。
故而,有需要对现有功率器件的结构进行改善,以满足市场上的使用需求。
发明内容
本实用新型在于解决现有功率器件所存在的散热和抗电磁干扰性能不佳的技术问题,提供一种具有良好散热效果、可有效防止外部电磁干扰的功率器件。
为解决上述技术问题,本实用新型采用如下所述的技术方案:一种功率器件,包括有一框架、一芯片及一封装体,其中,所述框架包括有一载片、至少一位于所述载片上方的第一散热片及至少一连结所述载片边缘和第一散热片边缘的侧板;所述芯片设置于所述载片上且处于所述第一散热片的正下方,并通过引线而与所述框架的引脚形成电气连接;所述封装体包覆所述载片、第一散热片、侧板及芯片。
上述功率器件中,自所述第一散热片的边缘向下延伸形成有至少一侧翼片。
上述功率器件中,所述侧翼片的下端抵接于所述载片。
上述功率器件中,所述封装体对应于所述第一散热片的上表面处形成有一开口,以露出所述第一散热片的上表面。
上述功率器件中,所述框架采用金属材料制备。
上述功率器件中,所述框架采用铜制备。
上述功率器件中,自所述载片的后边缘向上延伸而形成所述侧板,自所述侧板的上边缘向前延伸而形成所述第一散热片。
上述功率器件中,所述第一散热片的左右边缘分别向下延伸而各形成有一侧翼片。
上述功率器件中,所述功率器件还包括有一第二散热片,所述载片设置于所述第二散热片之上,并于所述载片和第二散热片之间形成一绝缘层。
上述功率器件中,所述绝缘层的厚度为0.3~0.8mm。
本实用新型的有益技术效果在于:藉由该第一散热片及侧板的设置,增加了整个器件的散热面积,提高了功率器件的散热效果,同时,使得该芯片处于由载片、第一散热片及侧板所围成的空间中,可以屏蔽外部电场,防止外部电磁辐射对于芯片的干扰,如此,有利于保证功率器件的工作性能,并延长功率器件的使用寿命。
附图说明
图1是现有功率器件的结构示意图。
图2是本实用新型功率器件的剖视结构示意图。
图3是本实用新型功率器件的分解结构示意图。
图4是本实用新型功率器件的框架的结构示意图。
图5是本实用新型功率器件的框架的另一些实施例的结构示意图。
图6是用于测试不同结构功率器件的散热器的温升曲线图。
具体实施方式
为使本领域的普通技术人员更加清楚地理解本实用新型所要解决的技术问题、技术方案和有益技术效果,以下结合附图和实施例对本实用新型做进一步的阐述。
参阅图2至图4,在一些实施例中,该功率器件包括有一框架20、一芯片30及一封装体40,其中,该框架20包括有一载片21、一位于该载片21上方的第一散热片22及一连结该载片21边缘和第一散热片22边缘的侧板23,该芯片30设置于该载片21上且处于该第一散热片22的正下方,并通过引线31而与该框架20的引脚24形成电气连接,该封装体40包覆该载片21、第一散热片22、侧板23及芯片30。一般地,该芯片30通过焊锡32而固定于该载片21之上。
在一些实施例中,自该载片21的后边缘210向上延伸而形成该侧板23,再自该侧板23的上边缘230向前延伸而形成该第一散热片22,三者的厚度相同。该框架20可选用诸如铜、银、铝、铝合金等之类的金属材料制备,优选可为铜。在附图所示的实施例中,根据框架20的结构,选用合适的金属板冲切裁成所需形状,如图4所示,再将侧板23、第一散热片22依次折叠而形成本实用新型的框架20,并在封装完毕后,裁切去除引脚24之间的连筋24’。
采用如上述结构的框架20,藉由该第一散热片22及侧板23的设置,增加了整个器件的散热面积,提高了功率器件的散热效果,同时,使得该芯片30处于由载片21、第一散热片22及侧板23所围成的空间中,可以屏蔽外部电场,防止外部电磁辐射对于芯片23的干扰,如此,有利于保证功率器件的工作性能,并延长功率器件的使用寿命。
优选地,自该第一散热片22的边缘向下延伸形成有至少一侧翼片25,藉由该侧翼片25的设置,可进一步增加功率器件的散热面积以提高散热效果,并进一步提高屏蔽外部电场的效果。优选地,该侧翼片25的下端250抵接于该载片21,防止在封装过程中第一散热片22折叠过度而压触到引线31。在如图2至图4所示的这些实施例中,自该第一散热片22的左右边缘分别向下延伸而各形成有一侧翼片25。
在一些优选实施例中,该封装体40对应于该第一散热片22的上表面处形成有一开口41,以露出该第一散热片22的上表面,从而提升该功率器件的散热效果。在一些实施例中,该封装体40也可将第一散热片22完成包覆于其内部,当然,相比于设置有开口41的功率器件,其散热效果会降低。
根据一些优选的实施例,功率器件还包括有一第二散热片50,该框架20的载片21设置于该第二散热片50之上,并藉由该封装体40而于该载片21和第二散热片50之间形成一绝缘层42,从而将该载片21绝缘隔离于该第二散热片50。形成该封装体40的塑封材料可采用环氧树脂材料,当然,也可选用现有技术中其他合适的材料,在注射塑封材料以形成该封装体40时,半熔融状态的塑封材料注入填满于该载片21和第二散热片50之间的间隙,并在冷却成型后形成该绝缘层42,此绝缘层42也构成该封装体40的一部分。
该绝缘层42的厚度越大,其绝缘性越好(耐压性越高),但同时,功率器件的散热性能则越差。对绝缘层厚度不同的各个功率器件进行测试,得出表1的实验数据,可知,当绝缘层42的厚度为0.1~0.2mm时,功率器件的散热性能最好,但绝缘性能最差,而当绝缘层42的厚度为0.9~1.0mm时,第二散热片50的工作温度过高,超过功率器件正常工作的最高温度,故而,绝缘层42的厚度保持在0.3~0.8mm为宜,既实现了绝缘要求又满足了散热要求。
表1:
芯片功率(w) 绝缘层厚度(mm) 载片温度(℃) 第二散热片温度(℃) 耐压性(V)
60 0.1 74 76 500
60 0.2 76 77 1000
60 0.3 76 79 2500
60 0.4 77 81 3000
60 0.5 78 83 3500
60 0.6 79 84 4000
60 0.7 81 86 4500
60 0.8 87 87 5000
60 0.9 89 93 5500
60 1.0 91 96 6000
在一些优选实施例中,该第二散热片50与该绝缘层42的接触部500的侧壁处形成有多个半圆孔501,如此,可增加封装体40与第二散热片50的接触面积,增强两者之间的结合力,保证该第二散热片50与封装体40的牢固结合,避免两者之间的松动甚至剥离。在一些实施例中,该半圆孔501的直径设计为1.5mm,同一侧壁处相邻二半圆孔501之间的距离为1.4mm。
该框架20和第二散热片50可选用同一或不同金属材料制备,在一些优选实施例中,基于材料成本、散热性能和加工性能的综合考虑,可选用纯铜制备框架20,而选用铝合金制备第二散热片50。由于该框架20的主体被塑封于该封装体40之中,其对于制备材料的有着更高的导热性能的要求,故可选用导热系数更高的金属,例如纯铜;由于该第二散热片50的主体大部可裸置于该封装体40之外,故可选用导热系数相对次之的金属,例如铝合金。铝合金具有材料成本低、加工性能好、容易对其表面加工处理的优点,适合用于作为第二散热片50的制备材料。
在如图2所示的功率器件中,自该载片21的后边缘向上延伸形成该侧板23,再自该侧板23的上边缘向前延伸形成该第一散热片22,当然,本领域技术人员在此基础之上可以理解,也可自该载片21的左边缘和/或右边缘向上延伸形成侧板23,并自该侧板23的上边缘向合适方向延伸而形成第一散热片22,该第一散热片22可以是一片,也可以是二片甚至多片。图5示出了另一些优选实施例的框架20的结构,参阅附图,自该载片21的左边缘和右边缘分别向上延伸而形成有二侧板23,自二侧板23的上边缘分别向该载片21的中间处延伸而形成有二第一散热片22,芯片设置于该载片21之上并处于由第二散热片22、侧板23和载片21围成的容置空间之中。
下面说明结构如图2至图4所示的功率器件的生产流程,在下面的描述中,将如图2至图4所示的功率器件称为RUPAK Ⅰ功率器件,而将与RUPAK Ⅰ功率器件区别仅在于是否设有开口41的功率器件称为RUPAK Ⅱ功率器件,此两种功率器件的生产工艺基本相同。显而易见地,在下面说明的基础上,本领域技术人员可以清楚理解本实用新型其他实施例的功率器件的生产工艺。
步骤一:组装功率器件核心部分。通过焊锡32将芯片30固定于框架20的载片21上,并使用引线31(键合线)将芯片31和引脚24进行焊接而形成适当的电气连接,从而构成功率器件的核心部分。
步骤二:折叠侧板23和第一散热片22,将该第一散热片22折至该芯片30的正上方。
步骤三:塑封成型。将上述功率器件核心部分和第二散热片50置放于下模具上,合模(将上模具下压于下模具上)后将半熔融状态的塑封材料注入模具中,填满载片21和第二散热片50之间的间隙及整个模腔,并在冷却成型后脱模。由于RUPAK Ⅰ功率器件的封装体40上形成有一开口41以露出该第一散热片22的上表面,在塑封时需将该第一散热片22紧贴于该下模具上,如此该下模具会对该第一散热片22产生一向上的压力,容易导致该载片21上翘,而无法保证载片21和第二散热片50之间的间隙(即绝缘层42的厚度)处于0.3~0.8mm之内,故而,在RUPAK Ⅰ功率器件塑封时,还需在上模具特定位置设计用于抵压载片21的顶针,藉由该顶针抵压该载片21而防止载片21上翘。形成该载片21和第二散热片50之间的绝缘层42,主要依靠下模具用于置放框架20和第二散热片50的部位的阶梯结构实现。
步骤四:针对于RUPAK Ⅰ功率器件,使用流质状态的塑封材料注入顶针孔,固化成型后封堵顶针孔。
分别选用芯片相同的本实用新型的RUPAK Ⅰ功率器件、RUPAK Ⅱ功率器件以及现有TO220封装形式功率器件、TO220F封装形式功率器件各6只,分别组装成简单工作系统,并各自固定于同一型号的散热器上,然后使用同一控制器设定相同的输入功率和输出负载分别驱动四个工作系统运作,并每隔相同一段时间测试每一散热器相同位置上的温度,如散热器的温度越高,说明同样环境相同工作时间内消耗同等功率的工作系统散发到散热器的热量越多,即工作系统和散热器构成的系统总热阻小。图6示出了各个散热器的温升曲线,其中T1为相应于RUPAK Ⅰ功率器件的散热器的温升曲线,T2为相应于RUPAKⅡ功率器件的散热器的温升曲线,T3为相应于TO220封装形式功率器件的散热器的温升曲线,T4为相应于TO220F封装形式功率器件的散热器的温升曲线。从附图可以看出,TO220F封装形式功率器件的散热性能最差,TO220封装形式功率器件的散热性能明显比RUPAK Ⅰ功率器件和RUPAK Ⅱ功率器件的散热性能差,由于RUPAK Ⅱ功率器件的第一散热片22全塑封于封装体40之内,其散热性能相对于RUPAK Ⅰ功率器件有所不如。可见,本实用新型的功率器件相比于现有技术的功率器件,其散热性能有着大幅度的提高。
以上所述仅为本实用新型的优选实施例,而非对本实用新型做任何形式上的限制。本领域的技术人员可在上述实施例的基础上施以各种等同的更改和改进,凡在权利要求范围内所做的等同变化或修饰,均应落入本实用新型的保护范围之内。

Claims (10)

1.一种功率器件,其特征在于包括有:
一框架(20),其包括有一载片(21)、至少一位于所述载片(21)上方的第一散热片(22)及至少一连结所述载片(21)边缘和第一散热片(22)边缘的侧板(23);
一芯片(30),其设置于所述载片(21)上且处于所述第一散热片(22)的正下方,并通过引线(31)而与所述框架(20)的引脚(24)形成电气连接;
一封装体(40),其包覆所述载片(21)、第一散热片(22)、侧板(23)及芯片(30)。
2.如权利要求1所述的功率器件,其特征在于:自所述第一散热片(22)的边缘向下延伸形成有至少一侧翼片(25)。
3.如权利要求2所述的功率器件,其特征在于:所述侧翼片(25)的下端抵接于所述载片(21)。
4.如权利要求1所述的功率器件,其特征在于:所述封装体(40)对应于所述第一散热片(22)的上表面处形成有一开口(41),以露出所述第一散热片(22)的上表面。
5.如权利要求1~4任一项所述的功率器件,其特征在于:所述框架(20)采用金属材料制备。
6.如权利要求5所述的功率器件,其特征在于:所述框架(20)采用铜制备。
7.如权利要求1~4任一项所述的功率器件,其特征在于:自所述载片(21)的后边缘(210)向上延伸而形成所述侧板(23),自所述侧板(23)的上边缘(230)向前延伸而形成所述第一散热片(22)。
8.如权利要求7所述的功率器件,其特征在于:所述第一散热片(22)的左右边缘分别向下延伸而各形成有一侧翼片(25)。
9.如权利要求1所述的功率器件,其特征在于:所述功率器件还包括有一第二散热片(50),所述载片(21)设置于所述第二散热片(50)之上,并于所述载片(21)和第二散热片(50)之间形成一绝缘层(42)。
10.如权利要求9所述的功率器件,其特征在于:所述绝缘层(42)的厚度为0.3~0.8mm。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105304589A (zh) * 2014-06-06 2016-02-03 深圳市锐骏半导体有限公司 功率器件

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105304589A (zh) * 2014-06-06 2016-02-03 深圳市锐骏半导体有限公司 功率器件

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