CN203859142U

CN203859142U - LED chip

Info

Publication number: CN203859142U
Application number: CN201420219498.6U
Authority: CN
Inventors: 柴广跃
Original assignee: Shenzhen University
Current assignee: Shenzhen University
Priority date: 2014-04-28
Filing date: 2014-04-28
Publication date: 2014-10-01
Anticipated expiration: 2024-04-28

Abstract

The utility model discloses an LED chip. The LED chip comprises a plurality of LED light-emitting epitaxial structures which are electrically isolated; P type electrodes and N type electrodes of the plurality of LED light-emitting epitaxial structures are electrically connected in turn; the P type electrodes and the N type electrodes respectively comprise first P type electrodes and first N type electrodes of at least two LED light-emitting epitaxial structures at the edges of the LED chip; the upper surfaces of the plurality of LED light-emitting epitaxial structures include a first region and a second region; the first region includes the upper surfaces of the first P type electrodes and the upper surfaces of the first N type electrodes; the second region includes regions except the first region; the second region is provided with a first insulation dielectric film layer; the first P type electrodes and the first N electrode types are respectively provided with an extending portion in an extending manner; and the extending portions extend upwards along the side wall of the first insulating dielectric film layer and extend inwardly along the edge of the first insulating dielectric film layer. With the LED chip of the above structure adopted, encapsulation difficulty can be decreased, and a high-voltage work mode can be realized.

Description

A kind of LED chip

Technical field

The utility model relates to technical field of semiconductors, particularly relates to a kind of LED chip.

Background technology

The structure of LED chip of the prior art comprises positive assembling structure and inverted structure.Wherein, the LED chip of positive assembling structure need paste substrate on shell in the time of encapsulation, and luminous zone is to the distance of heat radiation shell, and therefore thermal resistance is large, is unfavorable for heat radiation.Therefore, in order to improve radiating effect, conventionally select inverted structure, the LED chip of inverted structure is welded direct to chip electrode on shell electrode in the time of encapsulation, has very low thermal resistance.But the LED chip operating voltage of inverted structure is low, light efficiency is compared with low and electrode spacing is little, causes encapsulation difficulty.

Utility model content

The technical problem that the utility model mainly solves is to provide a kind of LED chip, can realize high-pressure work pattern, can overcome in addition the little and shortcoming of the encapsulation difficulty that causes of electrode spacing.

For solving the problems of the technologies described above, the technical scheme that the utility model adopts is: provide a kind of LED chip, the LED epitaxial light emission structure that it comprises substrate and is arranged on the multiple electrical isolation on described substrate.Each LED epitaxial light emission structure comprises P type electrode and N-type electrode, and P type electrode and the N-type electrode of multiple described LED epitaxial light emission structures are electrically connected successively by electric connection line.Described P type electrode and N-type electrode comprise respectively a P type electrode separately and the first N-type electrode of at least two LED epitaxial light emission structures that are positioned at LED chip edge, the upper surface of multiple described LED epitaxial light emission structures comprises first area and second area, described first area comprises a described upper surface for P type electrode and the upper surface of described the first N-type electrode, and described second area comprises the region except described first area; On described second area, be provided with the first dielectric rete; A described P type electrode and the first N-type electrode are extended with respectively an extension, and described extension upwards and from the edge of the first dielectric rete extends internally along the sidewall of described the first dielectric rete.

Wherein, sidewall surfaces between the P of each described LED epitaxial light emission structure type electrode and N-type electrode, and be provided with the second dielectric rete on the sidewall of LED epitaxial light emission structure between P type electrode and the N-type electrode of two adjacent LED epitaxial light emission structures.

Wherein, described the first dielectric rete and described the second dielectric rete comprise respectively at least one deck silicon nitride film, silicon oxide film, pellumina, aluminium nitride film or polymer insulating film.

Wherein, the summation of the projected area of extension on described LED chip is not less than 80% of LED chip area.

Wherein, described extension is by a kind of or at least two kinds of metal levels that form in chromium, nickel, titanium, tungsten, gold, silver, aluminium or copper.

Wherein, described metal level comprises two the first metal layers that are positioned at directly over a described P type electrode and described the first N-type electrode and two the second metal levels that extend internally along the first dielectric rete surface from two described the first metal layer ends respectively, wherein, on described the second metal level, be electroplate with thickening layer, described thickening layer formed by gold or by copper and on thin gold layer form.

Wherein, on described thickening layer, be provided with the solder layer being formed by gold-tin alloy.

The beneficial effects of the utility model are: the situation that is different from prior art, LED chip of the present utility model is electrically connected by electric connection line successively by P type electrode and the N-type electrode of the LED epitaxial light emission structure of multiple electrical isolation, and be provided with the first dielectric rete on the region outside a P type electrode and the first N-type electrode separately of at least two LED epitaxial light emission structures at LED chip edge, the one P type electrode and the first N-type electrode are extended with respectively an extension, extension upwards and from the edge of the first dielectric rete extends internally along the sidewall of the first dielectric rete.Therefore, by multiple LED epitaxial light emission structure electrical connections, strengthen as the distance between a P type electrode and the first N-type electrode of the encapsulated electrode of LED chip, thereby reduce the difficulty of encapsulation, and operating voltage can be formed by the operating voltage of multiple LED epitaxial light emission structures, realizes high-pressure work pattern.

Brief description of the drawings

Fig. 1 is the structural representation of a kind of LED chip of providing of the utility model embodiment;

Embodiment

Refer to Fig. 1, Fig. 1 is the structural representation of a kind of LED chip of providing of the utility model embodiment.As shown in Figure 1, the LED chip 10 of the present embodiment comprises substrate 11 and the LED epitaxial light emission structure 12 that is arranged on the multiple electrical isolation on substrate 11.Wherein, each LED epitaxial light emission structure 12 comprises P type electrode 121 and N-type electrode 122, the P type electrode 121 of multiple LED epitaxial light emission structures 12 and N-type electrode 122 are electrically connected successively by electric connection line 13, the operating voltage of LED chip 10 can be formed by the operating voltage of multiple LED epitaxial light emission structures 12, thereby realize high-pressure work pattern.In the present embodiment, described P type electrode 121 and N-type electrode 122 comprise respectively a P type electrode 1211 and the first N-type electrode 1221 separately of two LED epitaxial light emission structures 12 at the edge that is positioned at LED chip 10.

In the present embodiment, the upper surface of the luminous epitaxial loayer 12 of multiple LED comprises first area 100 and second area 101.Wherein, first area 100 comprises a upper surface for P type electrode 1211 and the upper surface of the first N-type electrode 1221, and second area 101 comprises except 100Wai region, first area.On second area 101, be provided with the surfacing of the first dielectric rete 14, the first insulating medium layers 14, be not subject to external action thereby protected at the LED of second area 101 epitaxial light emission structure 12 and electric connection line 13.

In other embodiments, first area 100 can also comprise a upper surface for P type electrode 1211 and the upper surface of the first N-type electrode 1221 separately of the plural LED epitaxial light emission structure 12 at the edge that is positioned at LED chip 10.The number of the LED epitaxial light emission structure 12 specifically comprising is determined by actual conditions, does not repeat them here.

In the present embodiment, a P type electrode 1211 and the first N-type electrode 1221 extend respectively an extension 120, and extension 120 upwards and from the edge of the first dielectric rete 14 extends internally along the sidewall of the first dielectric rete 14.The one P type electrode 1211 and the first N-type electrode 1221 are electrically connected with external circuit as the encapsulated electrode of LED chip 10 respectively with its extension 120 separately.

In the present embodiment, the extension 120 on the first N-type electrode 1221 directly upwards and from the edge of the first dielectric rete 14 extends internally along the sidewall of the first dielectric rete 14 at the upper surface of the first N-type electrode 1221.In other embodiments, the first N-type electrode 1221 and its extension 120 also can be communicated with to realize by borehole on LED epitaxial light emission structure 12.

Optionally, the summation of the projected area of extension 120 on LED chip 10 is not less than 80% of LED chip 10 areas, is electrically connected to facilitate with external circuit.

Therefore, in the present embodiment, by connecting line 13, multiple LED epitaxial light emission structures 12 are electrically connected, strengthen the distance between the encapsulated electrode of LED chip 10, further, described extension 120 has strengthened the area that the encapsulated electrode of LED chip 10 is electrically connected with external circuit, thereby has reduced the difficulty of encapsulation.

Further, according to mentality of designing of the present utility model, can design the LED chip 10 of multiple different voltages, meet the different needs.

Optionally, substrate 11 can be Sapphire Substrate, carborundum (SiC) substrate, silicon (Si) substrate, gallium nitride (CaN) substrate or aluminium nitride (AlN) substrate.

In the present embodiment, each LED epitaxial light emission structure 12 also comprises from substrate 11 n type gallium nitride layer 123 that up set gradually and that width is identical, luminescent layer 124 and P type gallium nitride layer 125.Wherein, P type electrode 121 is arranged on P type gallium nitride layer 125, and is electrically connected with P type gallium nitride layer 125, and N-type electrode 122 is arranged on substrate 11 and with n type gallium nitride layer 123 and is electrically connected.

In other optional embodiment, the width of n type gallium nitride layer 123 can be set to be greater than the width of luminescent layer 124 and P type gallium nitride layer 125.N type gallium nitride layer 123 is electrically connected with N-type electrode 122 with respect to luminescent layer 124 and the outstanding part of P type gallium nitride 125.

In other optional embodiment, N-type electrode 122 can also be arranged on P type gallium nitride layer 125 and with P type gallium nitride layer 125 and insulate.The through hole that one conducting is set on P type gallium nitride layer 125 and luminescent layer 123, through hole exposes n type gallium nitride layer 123 and surface is provided with megohmite insulant, and N-type electrode 122 is electrically connected with n type gallium nitride layer 123 by through hole.

Optionally, between multiple LED epitaxial light emission structures 12, be provided with groove 16, and sidewall surfaces between the P of each LED epitaxial light emission structure 12 type electrode 121 and N-type electrode 122, and be provided with the second dielectric rete 17 on the sidewall of LED epitaxial light emission structure 12 between P type electrode 121 and the N-type electrode 122 of two adjacent LED epitaxial light emission structures 12, to realize the electrical isolation between multiple LED epitaxial light emission structures 12, further ensure the insulating properties between each LED epitaxial light emission structure 12 own P type electrode 121 and N-type electrode 122.

Optionally, the first dielectric rete 14 and the second dielectric rete 17 comprise respectively at least one deck silicon nitride film, silicon oxide film, pellumina, aluminium nitride film or polymer insulating film.And by thickness and the refractive index of design the first dielectric rete 14, the second dielectric rete 17 or both combinations, make the first insulating medium layer 14 and the second insulating medium layer 17 there is high reflectance.Therefore, can improve the light extraction efficiency of LED chip 10.

In other optional embodiment, in order to save cost and the materials cost of design, also the first dielectric rete 14 and the second dielectric rete 17 can be set to single layer structure, and thickness and the refractive index of the first dielectric rete 14 and the second dielectric rete 17 not designed.

Optionally, extension 120 is by one or both metal levels that form 20 in chromium, nickel, titanium, tungsten, gold, silver, aluminium or copper.Wherein, metal level 20 comprises two the first metal layers 201 that are positioned at directly over a P type electrode and the first N-type electrode and two the second metal levels 202 that extend internally from two the first metal layer 201 ends along the first dielectric rete 14 surfaces respectively.Wherein, the first metal layer 201 is mutually vertical with the second metal level 202.

Optionally, electroplate a thickening layer 30 on the second metal level 202, thickening layer 30 is by gold or form, or by copper layer and on thin gold layer form.The thickness of thickening layer 30 is preferably greater than 0.3 micron.One solder layer being made up of gold-tin alloy 40 is further set on thickening layer 30, is electrically connected to facilitate with external circuit.

In a further embodiment, solder layer 40 also can be set, now on copper thickening layer, plate the thin gold layer of one deck, to protect.Wherein, the thickness of thin gold layer is preferably 1000 dusts.

Be appreciated that described the first N-type electrode 1221 can, by the existing mode of offering through hole on LED epitaxial light emission structure 12, be communicated with the N-type layer in LED epitaxial light emission structure 12.Now, 120 of described extensions have been saved material without starting to extend internally from the edge of described LED chip 10, and have dwindled the volume of LED chip 10.

The foregoing is only embodiment of the present utility model; not thereby limit the scope of the claims of the present utility model; every equivalent structure or conversion of equivalent flow process that utilizes the utility model specification and accompanying drawing content to do; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.

Claims

1. a LED chip, comprise substrate and the LED epitaxial light emission structure that is arranged on the multiple electrical isolation on described substrate, wherein, each LED epitaxial light emission structure comprises P type electrode and N-type electrode, P type electrode and the N-type electrode of multiple described LED epitaxial light emission structures are electrically connected successively by electric connection line, it is characterized in that:

Described P type electrode and N-type electrode comprise respectively a P type electrode separately and the first N-type electrode of at least two LED epitaxial light emission structures that are positioned at LED chip edge, the upper surface of multiple described LED epitaxial light emission structures comprises first area and second area, described first area comprises a described upper surface for P type electrode and the upper surface of described the first N-type electrode, and described second area comprises the region except described first area; On described second area, be provided with the first dielectric rete; A described P type electrode and the first N-type electrode are extended with respectively an extension, and described extension upwards and from the edge of the first dielectric rete extends internally along the sidewall of described the first dielectric rete.

2. LED chip according to claim 1, it is characterized in that, sidewall surfaces between the P of each described LED epitaxial light emission structure type electrode and N-type electrode, and be provided with the second dielectric rete on the sidewall of LED epitaxial light emission structure between P type electrode and the N-type electrode of two adjacent LED epitaxial light emission structures.

3. LED chip according to claim 2, is characterized in that, described the first dielectric rete and described the second dielectric rete comprise respectively at least one deck silicon nitride film, silicon oxide film, pellumina, aluminium nitride film or polymer insulating film.

4. LED chip according to claim 1, is characterized in that, the summation of the projected area of described extension on described LED chip is not less than 80% of described LED chip area.

5. LED chip according to claim 1, is characterized in that, described extension is by a kind of or at least two kinds of metal levels that form in chromium, nickel, titanium, tungsten, gold, silver, aluminium or copper.

6. LED chip according to claim 5, it is characterized in that, described metal level comprises two the first metal layers that are positioned at directly over a described P type electrode and described the first N-type electrode and two the second metal levels that extend internally along the first dielectric rete surface from two described the first metal layer ends respectively, wherein, on described the second metal level, be electroplate with thickening layer, described thickening layer formed by gold or by copper and on thin gold layer form.

7. LED chip according to claim 6, is characterized in that, is provided with the solder layer being made up of gold-tin alloy on described thickening layer.