CN203839363U - 一种超薄二极管引脚 - Google Patents

一种超薄二极管引脚 Download PDF

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CN203839363U
CN203839363U CN201420273532.8U CN201420273532U CN203839363U CN 203839363 U CN203839363 U CN 203839363U CN 201420273532 U CN201420273532 U CN 201420273532U CN 203839363 U CN203839363 U CN 203839363U
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王双
夏明�
王毅
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Yangzhou Yangjie Electronic Co Ltd
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Yangzhou Yangjie Electronic Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

一种超薄二极管引脚。提供了一种通电能力强，增加焊接面，可适用于大芯片的超薄二极管引脚。包括引脚一、引脚二和封装体，所述引脚一和所述引脚二呈片状，所述引脚一包括内端面一和外端面一，所述引脚二包括内端面二和外端面二，所述内端面一连接所述封装体的一端，所述内端面二连接所述封装体的另一端，所述内端面一的端部设有方形凹槽一，还包括镶块一，设于所述凹槽一内，所述镶块一的平面面积＞所述内端面一的平面面积。本实用新型为二极管提供了新的设计理念，将传统的引脚由直上直下式设计，变更为引脚与芯片接触的地方局部增大，即为镶块。在不影响封装的前提下，尽可能的将镶块的平面面积增大，使用大芯片，产品的通电流能力可得到提高。

Description

一种超薄二极管引脚
技术领域
本实用新型涉及二极管，尤其涉及太阳能光伏用的超薄二极管的引脚。
背景技术
目前电子类行业，产品外观正在向小型化，微型化方向发展，产品能力正在向高效率，低能耗的方向发展，这使得我们的半导体器件在产品外形已经到很小的条件下，增加我们产品的芯片尺寸，来提高产品的通电能力。传统的产品结构多为直上直下式设计（如图13-15所示），由于设计本身局限，在遇到大芯片封装需要增大底部铜材面积，增加铜材面积又受到了产品体积小的限制，所以无法实现。
实用新型内容
本实用新型针对以上问题，提供了一种通电能力强，增加焊接面，可适用于大芯片的超薄二极管引脚。
实用新型的技术方案是：包括引脚一、引脚二和封装体，所述引脚一和所述引脚二呈片状，所述引脚一包括内端面一和外端面一，所述引脚二包括内端面二和外端面二，所述内端面一连接所述封装体的一端，所述内端面二连接所述封装体的另一端，所述内端面一的端部设有方形凹槽一，还包括镶块一，设于所述凹槽一内，所述镶块一的平面面积＞所述内端面一的平面面积。
所述镶块一的端面超出所述内端面一的端面。
所述镶块一的宽度＞所述内端面一的宽度。
所述镶块一的宽度＜所述封装体的宽度。
所述引脚二上设有镶块二，所述内端面二的端部设有方形凹槽二，所述镶块二设于所述凹槽二内，所述镶块二的平面面积＞所述内端面二的平面面积。
所述镶块二的端面超出所述内端面二的端面。
所述镶块二的宽度＞所述内端面二的宽度。
所述镶块二的宽度＜所述封装体的宽度。
所述外端面一和所述外端面二分别设有通孔，所述通孔中至少有一个为腰孔，另一个为圆孔或腰孔。
本实用新型构思巧妙，为二极管提供了新的设计理念，将传统的引脚由直上直下式设计，变更为引脚与芯片接触的地方局部增大，即为镶块。在不影响封装的前提下，根据具体的产品要求，尽可能的将镶块的平面面积增大，使用大芯片，产品的通电流能力可得到提高。同时本实用新型可不用改变二极管外形尺寸及客户端焊盘（将芯片焊接在引脚上的设备）尺寸，实现工装、设备的通用性，降低生产成本。
附图说明
图1是本实用新型第一种实施方式的结构示意图，
图2是图1的左视图，
图3是图1的后视图，
图4是图1中内端面一与外端面一的结构示意图，
图5是图4的左视图，
图6是图1中引脚一的结构示意图，
图7是图6的左视图，
图8是本实用新型第一种实施方式的进一步优化方案的结构示意图，
图9是图1中内端面二与外端面二的结构示意图，
图10是图9的左视图，
图11是本实用新型第二种实施方式的结构示意图，
图12是图11的左视图，
图13是本实用新型背景技术的结构示意图，
图14是图13的左视图，
图15是图13的后视图；
图中1是封装体，2是引脚一，21是内端面一，211是凹槽一，22是外端面一，23是镶块一，3是引脚二，31是内端面二，311是凹槽二，32是外端面二，33是镶块二，4是芯片，5是跳线，6是腰孔，7是圆孔。
具体实施方式
本实用新型第一种实施方式如图1-7所示，包括引脚一2、引脚二3、封装体1、芯片4和跳线5，所述引脚一2和所述引脚二3呈片状，所述引脚一2包括内端面一21和外端面一22，所述内端面一21的端部设有方形凹槽一211，所述引脚二3包括内端面二31和外端面二32，所述内端面一21连接所述封装体1的一端，所述内端面二31连接所述封装体1的另一端；
还包括镶块一23、设于所述凹槽一211内、与所述内端面一21形成断差面，所述镶块一23的平面面积＞所述内端面一21的平面面积，所述镶块一23的端面超出所述内端面一21的端面，所述镶块一23的宽度＞所述内端面一21的宽度，所述镶块一23的宽度＜所述封装体1的宽度，所述镶块一23的上平面与所述外端面一22的上平面平齐。
本实用新型第一种实施方式的进一步优化方案如图6-10所示，即在所述引脚二3上设有镶块二33，实现所述超薄二极管能适用于多种产品（例如双芯片式），所述内端面二31的端部设有方形凹槽二311，所述镶块二33设于所述凹槽二311内、与所述外端面二32形成断差面，所述镶块二33的平面面积＞所述内端面二31的平面面积，所述镶块二33的端面超出所述内端面二31的端面，所述镶块二33的宽度＞所述内端面二31的宽度，所述镶块二33的宽度＜所述封装体1的宽度，所述镶块二33的上平面与所述外端面二32的上平面平齐。为考虑生产的便利性及成本，所述镶块一23两侧相对所述内端面一21和所述镶块二33两侧相对所述内端面二31对称设置为最佳。
所述芯片4设于所述镶块一23和/或所述镶块二33上，所述跳线5设于所述芯片4和所述引脚一2和/或引脚二3上，起连接作用。
本实用新型第二种实施方式如图11-12所示，所述外端面一22和所述外端面二32分别设有通孔，所述通孔中至少有一个为腰孔6，另一个为圆孔7或腰孔6，当超薄二极管固定在集成电路板上时，可以通过所述通孔进行固定，而设置所述腰孔6的目的则在于防止出现安装偏差时，留有调节余量。

Claims (9)

1.一种超薄二极管引脚，包括引脚一、引脚二和封装体，所述引脚一和所述引脚二呈片状，所述引脚一包括内端面一和外端面一，所述引脚二包括内端面二和外端面二，所述内端面一连接所述封装体的一端，所述内端面二连接所述封装体的另一端，其特征在于，所述内端面一的端部设有方形凹槽一，还包括镶块一、设于所述凹槽一内，所述镶块一的平面面积＞所述内端面一的平面面积。
2.根据权利要求1所述的一种超薄二极管引脚，其特征在于，所述镶块一的端面超出所述内端面一的端面。
3.根据权利要求1所述的一种超薄二极管引脚，其特征在于，所述镶块一的宽度＞所述内端面一的宽度。
4.根据权利要求1所述的一种超薄二极管引脚，其特征在于，所述镶块一的宽度＜所述封装体的宽度。
5.根据权利要求1所述的一种超薄二极管引脚，其特征在于，所述引脚二上设有镶块二，所述内端面二的端部设有方形凹槽二，所述镶块二设于所述凹槽二内，所述镶块二的平面面积＞所述内端面二的平面面积。
6.根据权利要求5所述的一种超薄二极管引脚，其特征在于，所述镶块二的端面超出所述内端面二的端面。
7.根据权利要求5所述的一种超薄二极管引脚，其特征在于，所述镶块二的宽度＞所述内端面二的宽度。
8.根据权利要求5所述的一种超薄二极管引脚，其特征在于，所述镶块二的宽度＜所述封装体的宽度。
9.根据权利要求1所述的一种超薄二极管引脚，其特征在于，所述外端面一和所述外端面二分别设有通孔，所述通孔中至少有一个为腰孔，另一个为圆孔或腰孔。
CN201420273532.8U 2014-05-26 2014-05-26 一种超薄二极管引脚 Expired - Fee Related CN203839363U (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108540086A (zh) * 2018-01-18 2018-09-14 浙江人和光伏科技有限公司 一种太阳能电池接线盒的导电模块

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108540086A (zh) * 2018-01-18 2018-09-14 浙江人和光伏科技有限公司 一种太阳能电池接线盒的导电模块

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