CN203786480U - Power supply control circuit - Google Patents
Power supply control circuit Download PDFInfo
- Publication number
- CN203786480U CN203786480U CN201420124285.5U CN201420124285U CN203786480U CN 203786480 U CN203786480 U CN 203786480U CN 201420124285 U CN201420124285 U CN 201420124285U CN 203786480 U CN203786480 U CN 203786480U
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- China
- Prior art keywords
- npn triode
- resistance
- pin
- control circuit
- flip flop
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Abstract
The utility model relates to a power supply control circuit, which comprises a trigger and a triode Q2, wherein a pin Q<-> of the trigger is connected to a MOS transistor Q5, a pin R of the trigger is connected to a level control circuit, a pin CLK of the trigger is connected to a collector electrode of the triode Q2, an emitting electrode of the triode Q2 is grounded, a grounding end of the emitting electrode of the triode Q2 is connected to a switch K1 in series through a resistor R5, a base electrode of the triode Q2 is connected with the switch K1 through a resistor R4, a switch on-off detection circuit is connected between the resistor R4 and the switch K1, a capacitor E2 is further connected between the base electrode of the triode Q2 and the resistor R5, a resistor R6 and a resistor R7, which are mutually connected in series, are further connected between the base electrode of the triode Q2 and the pin CLK of the trigger, an external power supply PWR-CON is connected between the resistor R6 and the resistor R7, and the external power supply PWR-CON is connected with a pin D of the trigger at the same time. The power supply control circuit can play a very good protection effect on a battery, and realizes delayed power on/off at the same time.
Description
Technical field
The utility model relates to a kind of control circuit, relates in particular a kind of power control circuit of time check instrument.
Background technology
Time check instrument, for the precision of checking time, is used for some and counts field accurately, as rocket launching, satellite navigation, astronomical clock etc. need the field that time precision is high.Time check instrument is inlayed battery in all understanding, to prevent unexpected power-off, equipment is caused to damage; In order to protect battery and internal electrical device; in time check instrument, need to design a power supply control protection electric circuit, for the protection of battery, avoided putting and reduced battery life; also to reach the object of delay switch machine, for reducing the unexpected switching on and shutting down of electrical part, bring electrical part loss simultaneously.
Utility model content
The utility model provides a kind of power control circuit, for the protection of battery with reach delay switch machine, and battery and internal electrical device is fragile, the life-span is short problem in settling time tester.
For solving above-mentioned technical matters, the utility model by the following technical solutions: a kind of power control circuit, comprises d type flip flop and NPN triode Q2, the pin of d type flip flop
be connected with P channel MOS tube Q5, the pin R of described d type flip flop is connected with level control circuit, the pin CLK of described d type flip flop connects the collector of NPN triode Q2, the grounded emitter of described NPN triode Q2, the earth terminal of the emitter of described NPN triode Q2 is serially connected with K switch 1 by resistance R 5, the base stage of described NPN triode Q2 is connected with K switch 1 by resistance R 4, between described resistance R 4 and K switch 1, be also connected with switch on and off testing circuit, between the base stage of described NPN triode Q2 and resistance R 5, be also connected with electric capacity E2, between the base stage of described NPN triode Q2 and the pin CLK of d type flip flop, be also connected with two resistance R 6 and resistance R 7 that are mutually connected in series, between described resistance R 6 and resistance R 7, connect external power source PWR-CON, external power source PWR-CON is connected with the pin D of d type flip flop simultaneously.
Described level control circuit comprises NPN triode Q3, the collector of NPN triode Q3 is connected with the pin R of d type flip flop, between the collector of described NPN triode Q3 and the pin R of d type flip flop, by resistance R 15, be connected with external power source PWR-CON, the grounded emitter of described NPN triode Q3, the base stage of described NPN triode Q3 connects soft switch P WR-OFF by resistance R 17, the base terminal of described NPN triode Q3 is also connected with the electric capacity E3 of ground connection, the other end that described resistance R 17 is connected with the base stage of NPN triode Q3 is also parallel with stake resistance R9 and connects the resistance R 10 of external power source PWR-CON.
Described switch on and off testing circuit comprises NPN triode Q1, the base stage of NPN triode Q1 is connected to the common port of resistance R 4 and K switch 1 by resistance R 3, the collector of described NPN triode Q1 is connected with two resistance R in parallel 1 and resistance R 2, described resistance R 1 connects external detection signal input circuit, described resistance R 2 connects external power source PWR-CON, the grounded emitter of described NPN triode Q1, the collector and emitter of described NPN triode Q1 is also connected with electric capacity E1 in parallel and voltage stabilizing diode D6.
The pin of described d type flip flop
and between P channel MOS tube Q5, be also connected with resistance and be the R12 of 100 kilo-ohms.
Described d type flip flop model is CD4013.
Described NPN triode Q1, NPN triode Q2 and NPN triode Q3 all adopt 9013 type triodes.
Compared with prior art, the beneficial effects of the utility model are: this power control circuit of the utility model design, can play a very good protection to battery, and realize delay switch machine simultaneously, protect normally cut-offfing of internal electrical device.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Fig. 1 is structural representation of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further described.
Embodiment
A kind of power control circuit as shown in Figure 1, comprises d type flip flop and NPN triode Q2, the pin of d type flip flop
be connected with P channel MOS tube Q5, the pin R of described d type flip flop is connected with level control circuit, the pin CLK of described d type flip flop connects the collector of NPN triode Q2, the grounded emitter of described NPN triode Q2, the earth terminal of the emitter of described NPN triode Q2 is serially connected with K switch 1 by resistance R 5, the base stage of described NPN triode Q2 is connected with K switch 1 by resistance R 4, between described resistance R 4 and K switch 1, be also connected with switch on and off testing circuit, between the base stage of described NPN triode Q2 and resistance R 5, be also connected with electric capacity E2, between the base stage of described NPN triode Q2 and the pin CLK of d type flip flop, be also connected with two resistance R 6 and resistance R 7 that are mutually connected in series, between described resistance R 6 and resistance R 7, connect external power source PWR-CON, external power source PWR-CON is connected with the pin D of d type flip flop simultaneously.Described level control circuit comprises NPN triode Q3, the collector of NPN triode Q3 is connected with the pin R of d type flip flop, between the collector of described NPN triode Q3 and the pin R of d type flip flop, by resistance R 15, be connected with external power source PWR-CON, the grounded emitter of described NPN triode Q3, the base stage of described NPN triode Q3 connects soft switch P WR-OFF by resistance R 17, the base terminal of described NPN triode Q3 is also connected with the electric capacity E3 of ground connection, the other end that described resistance R 17 is connected with the base stage of NPN triode Q3 is also parallel with stake resistance R9 and connects the resistance R 10 of external power source PWR-CON.Described switch on and off testing circuit comprises NPN triode Q1, the base stage of NPN triode Q1 is connected to the common port of resistance R 4 and K switch 1 by resistance R 3, the collector of described NPN triode Q1 is connected with two resistance R in parallel 1 and resistance R 2, described resistance R 1 connects external detection signal input circuit, described resistance R 2 connects external power source PWR-CON, the grounded emitter of described NPN triode Q1, the collector and emitter of described NPN triode Q1 is also connected with electric capacity E1 in parallel and voltage stabilizing diode D6.The pin of described d type flip flop
and between P channel MOS tube Q5, be also connected with resistance and be the R12 of 100 kilo-ohms.Described d type flip flop model is CD4013.Described NPN triode Q1, NPN triode Q2 and NPN triode Q3 all adopt 9013 type triodes.
In the present embodiment, because tester is built-in with battery, circuit is powered all the time, and when K switch 1 is closed, the CLK pin level saltus step from low to high of d type flip flop, causes pin
output low level, P channel MOS tube Q5 conducting, power supply starts power supply to the device; When K switch 1 disconnects, external detection signal input circuit detects on off state and disconnects, and soft switch P WR-OFF connects and output low level, makes NPN triode Q3 conducting, at the RST of d type flip flop pin input high level, it is resetted, and at pin
output high level, makes P channel MOS tube Q5 cut-off turn-off apparatus power supply.
Thereby the present embodiment can be controlled pin by adding level control circuit
the height of output pad, thereby can control conducting and the cut-off of P channel MOS tube Q5, add switch on and off testing circuit simultaneously switch K1 is carried out to break-make detection, thereby can cross while putting battery is disconnected to the effect of playing protection battery at internal cell, simultaneously, when K switch 1 is closed, the delay that the connecting circuit of holding by CLK can realize power supply is communicated with, make the saltus step from low to high of CLK pin level, guarantee that the slow start of tester is until enter duty, simultaneously when K switch 1 disconnects, can control d type flip flop by level control circuit and make its reset, thereby can realize closing of tester, when switching on and shutting down by delayed mode, to reduce the loss of unexpected switching on and shutting down to tester internal electrical device, fabulous protection internal electrical device, security and practicality greatly improve.
Be as mentioned above embodiment of the present utility model.The utility model is not limited to above-mentioned embodiment, and anyone should learn the structural change of making under enlightenment of the present utility model, every with the utlity model has identical or close technical scheme, within all falling into protection domain of the present utility model.
Claims (6)
1. a power control circuit, is characterized in that: comprise d type flip flop and NPN triode Q2, the pin of d type flip flop
be connected with P channel MOS tube Q5, the pin R of described d type flip flop is connected with level control circuit, the pin CLK of described d type flip flop connects the collector of NPN triode Q2, the grounded emitter of described NPN triode Q2, the earth terminal of the emitter of described NPN triode Q2 is serially connected with K switch 1 by resistance R 5, the base stage of described NPN triode Q2 is connected with K switch 1 by resistance R 4, between described resistance R 4 and K switch 1, be also connected with switch on and off testing circuit, between the base stage of described NPN triode Q2 and resistance R 5, be also connected with electric capacity E2, between the base stage of described NPN triode Q2 and the pin CLK of d type flip flop, be also connected with two resistance R 6 and resistance R 7 that are mutually connected in series, between described resistance R 6 and resistance R 7, connect external power source PWR-CON, external power source PWR-CON is connected with the pin D of d type flip flop simultaneously.
2. a kind of power control circuit according to claim 1, it is characterized in that: described level control circuit comprises NPN triode Q3, the collector of NPN triode Q3 is connected with the pin R of d type flip flop, between the collector of described NPN triode Q3 and the pin R of d type flip flop, by resistance R 15, be connected with external power source PWR-CON, the grounded emitter of described NPN triode Q3, the base stage of described NPN triode Q3 connects soft switch P WR-OFF by resistance R 17, the base terminal of described NPN triode Q3 is also connected with the electric capacity E3 of ground connection, the other end that described resistance R 17 is connected with the base stage of NPN triode Q3 is also parallel with stake resistance R9 and connects the resistance R 10 of external power source PWR-CON.
3. a kind of power control circuit according to claim 1, it is characterized in that: described switch on and off testing circuit comprises NPN triode Q1, the base stage of NPN triode Q1 is connected to the common port of resistance R 4 and K switch 1 by resistance R 3, the collector of described NPN triode Q1 is connected with two resistance R in parallel 1 and resistance R 2, described resistance R 1 connects external detection signal input circuit, described resistance R 2 connects external power source PWR-CON, the grounded emitter of described NPN triode Q1, the collector and emitter of described NPN triode Q1 is also connected with electric capacity E1 in parallel and voltage stabilizing diode D6.
4. a kind of power control circuit according to claim 1, is characterized in that: the pin of described d type flip flop
and between P channel MOS tube Q5, be also connected with resistance and be the R12 of 100 kilo-ohms.
5. a kind of power control circuit according to claim 1, is characterized in that: described d type flip flop model is CD4013.
6. a kind of power control circuit according to claim 1, is characterized in that: described NPN triode Q1, NPN triode Q2 and NPN triode Q3 all adopt 9013 type triodes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420124285.5U CN203786480U (en) | 2014-03-19 | 2014-03-19 | Power supply control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420124285.5U CN203786480U (en) | 2014-03-19 | 2014-03-19 | Power supply control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203786480U true CN203786480U (en) | 2014-08-20 |
Family
ID=51322647
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420124285.5U Expired - Fee Related CN203786480U (en) | 2014-03-19 | 2014-03-19 | Power supply control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203786480U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103823358A (en) * | 2014-03-19 | 2014-05-28 | 成都引众数字设备有限公司 | Power supply control circuit |
| CN107471255A (en) * | 2017-07-17 | 2017-12-15 | 合肥智灵机器人有限公司 | Power panel, robot for robot |
| WO2020001479A1 (en) * | 2018-06-28 | 2020-01-02 | 南京中兴软件有限责任公司 | Startup circuit and terminal |
-
2014
- 2014-03-19 CN CN201420124285.5U patent/CN203786480U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103823358A (en) * | 2014-03-19 | 2014-05-28 | 成都引众数字设备有限公司 | Power supply control circuit |
| CN103823358B (en) * | 2014-03-19 | 2016-04-20 | 成都引众数字设备有限公司 | Power control circuit |
| CN107471255A (en) * | 2017-07-17 | 2017-12-15 | 合肥智灵机器人有限公司 | Power panel, robot for robot |
| WO2020001479A1 (en) * | 2018-06-28 | 2020-01-02 | 南京中兴软件有限责任公司 | Startup circuit and terminal |
| CN110661517A (en) * | 2018-06-28 | 2020-01-07 | 中兴通讯股份有限公司 | Starting-up circuit and terminal thereof |
| CN110661517B (en) * | 2018-06-28 | 2022-09-30 | 中兴通讯股份有限公司 | Starting-up circuit and terminal thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140820 Termination date: 20150319 |
|
| EXPY | Termination of patent right or utility model |