CN203761265U - Power switch for time check meter - Google Patents
Power switch for time check meter Download PDFInfo
- Publication number
- CN203761265U CN203761265U CN201420124670.XU CN201420124670U CN203761265U CN 203761265 U CN203761265 U CN 203761265U CN 201420124670 U CN201420124670 U CN 201420124670U CN 203761265 U CN203761265 U CN 203761265U
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- resistance
- pin
- field effect
- effect transistor
- chip
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Abstract
The utility model discloses a power switch for a time check meter, comprising a chip MC 34063A. The DRC pin and the SWC pin of the chip MC 34063A are connected together, and are connected to a grid electrode of a field effect transistor through a resistor R4. The VCC pin of the chip MC 34063A is connected to a grounding capacitance C1 and a grounding capacitance C2. The CII pin of the chip MC 34063A is connected to a branch circuit. The TC pin of the chip MC 34063A is connected to a grounding capacitance C3. The IPK pin of the chip MC 34063A is connected to a source electrode of the field effect transistor. A resistor R5 is disposed between the grid electrode and the source electrode of the field effect. The drain electrode of the field effect transistor is connected to the cathode of a diode. The anode of the diode is grounded, and the drain electrode of the field effect transistor is connected to power supply through inductance. The common terminal of the inductance and the power supply is connected to a grounding capacitance C4 and a grounding capacitance C5. The power switch for a time check meter is advantageous in that anti-interference capability is strong and output stability is high.
Description
Technical field
The utility model relates to a kind of mains switch, relates in particular a kind of mains switch for time check instrument.
Background technology
Time check instrument, for the precision of checking time, is used for some and counts field accurately, as rocket launching, satellite navigation, astronomical clock etc. need the field that time precision is high.Mains switch is the vitals of time check instrument.Mains switch is Switching Power Supply.Because the instructions for use degree of time check instrument is higher, in use, external interference easily impacts the service precision of time check instrument, especially in mains switch department, its mains switch control switch pipe turn on and off time ratio, to maintain regulated output voltage, because switching tube generally adopts MOSFET, its switching tube open the impact that shutoff is very easily subject to external interference so that affect the output stability of mains switch.
Utility model content
The utility model provides a kind of mains switch for time check instrument, and its antijamming capability is strong, and output stability is high.
For solving above-mentioned technical problem, the utility model by the following technical solutions:
Mains switch for time check instrument, it comprises chip MC34063A, the DRC pin of described chip MC34063A is connected with SWC pin and by resistance R 4, is connected on the grid of field effect transistor, on the VCC pin of described chip MC34063A, be connected with ground capacity C1 and ground capacity C2, the CII pin of described chip MC34063A is connected on bleeder circuit, the SWE pin of described chip MC34063A and the equal ground connection of GND pin, on the TC pin of described chip MC34063A, be connected with ground capacity C3, the IPK pin of described chip MC34063A is connected on the source electrode of field effect transistor and by resistance R 1 and is connected with power supply, between the grid of described field effect and source electrode, be connected with resistance R 5, the drain electrode of described field effect transistor is connected on the negative electrode of diode, the plus earth of described diode, the drain electrode of described field effect transistor is connected on power supply by inductance, described inductance and the common port of power supply are connected with ground capacity C4 and ground capacity C5.
Further technical scheme is:
As preferably, described bleeder circuit comprises resistance R 2 and resistance R 3, described resistance R 2 and resistance R 3 are in series, the non-common port of described resistance R 3 is connected on power supply, the non-common end grounding of described resistance R 2, described resistance R 2 and the common port of resistance R 3 are connected on the CII pin of chip MC34063A.
Further, the resistance value ratio of described resistance R 2 and resistance R 3 is 3:1.
Further, described resistance C1 and resistance C4 are polar capacitor.
Compared with prior art, the beneficial effects of the utility model are: the utility model utilizes chip MC34063A to be connected two ground capacities with peripheral circuit and at power end, make the antijamming capability of this mains switch strong, make turning on and off of field effect transistor not be vulnerable to the impact of external interference, guarantee the stability of output, i.e. the reliability of time tester.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Fig. 1 is circuit diagram of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further described.Execution mode of the present utility model includes but not limited to the following example.
[embodiment]
The mains switch for time check instrument as shown in Figure 1, it comprises chip MC34063A, the DRC pin of described chip MC34063A is connected with SWC pin and by resistance R 4, is connected on the grid of field effect transistor, on the VCC pin of described chip MC34063A, be connected with ground capacity C1 and ground capacity C2, the CII pin of described chip MC34063A is connected on bleeder circuit, the SWE pin of described chip MC34063A and the equal ground connection of GND pin, on the TC pin of described chip MC34063A, be connected with ground capacity C3, the IPK pin of described chip MC34063A is connected on the source electrode of field effect transistor and by resistance R 1 and is connected with power supply, between the grid of described field effect and source electrode, be connected with resistance R 5, the drain electrode of described field effect transistor is connected on the negative electrode of diode, the plus earth of described diode, the drain electrode of described field effect transistor is connected on power supply by inductance, described inductance and the common port of power supply are connected with ground capacity C4 and ground capacity C5.Chip MC34063A is comprised of the controlled oscillator of pedestal generator, comparator, the duty ratio with temperature compensation function, rest-set flip-flop and High-current output switch etc.The capacitance size of capacitor C 3 determines the frequency of oscillation height of the oscillator of chip MC34063A, determines the make-and-break time of field effect transistor.IPK pin is for monitoring the peak current of field effect transistor, to control the pulse output of oscillator.CII pin, by bleeder circuit service voltage, utilizes bleeder circuit to CII pin supply circuit, can guarantee the stable of magnitude of voltage.The comparator that the internal reference voltage of the voltage of CII pin and chip MC34063A is sent into the inside of chip MC34063A simultaneously carries out voltage ratio, when CII pin voltage is during lower than internal reference voltage, comparator is output as leaping voltage, open the control gate of rest-set flip-flop, rest-set flip-flop is under the driving of oscillator, drive field effect transistor conducting, reach the object of automatic control.When CII pin voltage is during higher than internal reference voltage, the control gate of rest-set flip-flop is locked, field effect transistor cut-off.The VCC pin of chip MC34063A is connected on power supply, utilizes two ground capacities, and capacitor C 1 and capacitor C 2 play decoupling effect, reduces the harmful effect of the internal resistance of source to load, and identical, capacitor C 4 and capacitor C 5 also play the object of antagonism High-frequency Interference.Diode pair voltage carries out clamper, and field effect transistor is protected.
Described bleeder circuit comprises resistance R 2 and resistance R 3, described resistance R 2 and resistance R 3 are in series, the non-common port of described resistance R 3 is connected on power supply, the non-common end grounding of described resistance R 2, described resistance R 2 and the common port of resistance R 3 are connected on the CII pin of chip MC34063A.The dividing potential drop of utilizing resistance R 2 and resistance R 3, its circuit structure is simple, with low cost, also makes voltage stabilization.
Described resistance R 2 and the resistance value ratio of resistance R 3 are 3:1.At power end, for it provides the voltage of 5V, in order to meet the voltage request of CII pin, avoid the extra voltage source that provides, the resistance value ratio of resistance R 2 and resistance R 3 is 3:1.
Described resistance C1 and resistance C4 are polar capacitor.Adopt the cooperation of polar capacitor and general electric capacity, can improve the ability of antagonism High-frequency Interference.And the capacitance of polar capacitor is larger, the ability that suppresses temperature drift is stronger.
In the present embodiment, as one group of preferred scheme, it is the resistance of 33 ohm, 3.6 kilohms, 1.2 kilohms, 470 ohm, 1 kilohm that resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5 can adopt respectively resistance; It is the electric capacity of 100 μ F, 0.1 μ F, 470pF, 470 μ F, 0.1 μ F that capacitor C 1, capacitor C 2, capacitor C 3, capacitor C 4, capacitor C 5 can adopt capacitance.Diode can adopt IN5817; Field effect transistor can adopt FDD4243.Through emulation, adopt the electronic device of above-mentioned specification, but the performance of circuit reaches optimum.
Be as mentioned above embodiment of the present utility model.The utility model is not limited to above-mentioned execution mode, and anyone should learn the structural change of making under enlightenment of the present utility model, every with the utlity model has identical or close technical scheme, within all falling into protection range of the present utility model.
Claims (4)
1. for the mains switch of time check instrument, it is characterized in that: it comprises chip MC34063A, the DRC pin of described chip MC34063A is connected with SWC pin and by resistance R 4, is connected on the grid of field effect transistor, on the VCC pin of described chip MC34063A, be connected with ground capacity C1 and ground capacity C2, the CII pin of described chip MC34063A is connected on bleeder circuit, the SWE pin of described chip MC34063A and the equal ground connection of GND pin, on the TC pin of described chip MC34063A, be connected with ground capacity C3, the IPK pin of described chip MC34063A is connected on the source electrode of field effect transistor and by resistance R 1 and is connected with power supply, between the grid of described field effect and source electrode, be connected with resistance R 5, the drain electrode of described field effect transistor is connected on the negative electrode of diode, the plus earth of described diode, the drain electrode of described field effect transistor is connected on power supply by inductance, described inductance and the common port of power supply are connected with ground capacity C4 and ground capacity C5.
2. the mains switch for time check instrument according to claim 1, it is characterized in that: described bleeder circuit comprises resistance R 2 and resistance R 3, described resistance R 2 and resistance R 3 are in series, the non-common port of described resistance R 3 is connected on power supply, the non-common end grounding of described resistance R 2, described resistance R 2 and the common port of resistance R 3 are connected on the CII pin of chip MC34063A.
3. the mains switch for time check instrument according to claim 2, is characterized in that: described resistance R 2 and the resistance value ratio of resistance R 3 are 3:1.
4. according to the mains switch for time check instrument described in claim 1 or 3, it is characterized in that: described resistance C1 and resistance C4 are polar capacitor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201420124670.XU CN203761265U (en) | 2014-03-19 | 2014-03-19 | Power switch for time check meter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201420124670.XU CN203761265U (en) | 2014-03-19 | 2014-03-19 | Power switch for time check meter |
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CN203761265U true CN203761265U (en) | 2014-08-06 |
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CN201420124670.XU Expired - Fee Related CN203761265U (en) | 2014-03-19 | 2014-03-19 | Power switch for time check meter |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113985771A (en) * | 2021-10-25 | 2022-01-28 | 华能澜沧江水电股份有限公司 | Rolling slats door control system of total powerstation observation station |
-
2014
- 2014-03-19 CN CN201420124670.XU patent/CN203761265U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113985771A (en) * | 2021-10-25 | 2022-01-28 | 华能澜沧江水电股份有限公司 | Rolling slats door control system of total powerstation observation station |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140806 Termination date: 20150319 |
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EXPY | Termination of patent right or utility model |