CN203775242U - Data communication adapter in electric and electronic filter - Google Patents

Abstract

The utility model provides a data communication adapter in an electric and electronic filter. The electric and electronic filter is equipped with a digital signal processor control module. The data communication adapter comprises an ARM processor chip with an Ethernet controller. The ARM processor chip is connected with the digital signal processor control module in the electric and electronic filter. The ARM processor chip is also connected with an Ethernet control chip. The data communication adapter helps to overcome defects of the prior art. The ARM processor chip with an Ethernet controller is adopted, and the ARM processor chip and the Ethernet control chip together form the communication adapter, and SPI serial peripheral interface bus data is converted through the adapter into data that satisfies an Ethernet format and is sent out, and an Ethernet transmission protocol belongs to a UDP. The communication adapter has a simple structure and meets demands of real-time and highly precise monitoring.

Description

Data (communication) adapter unit in a kind of power electronics filters

Technical field

The utility model relates to data communication technology field, particularly relates to the transfer of data in power electronics filters.

Background technology

At present, at digital signal processor (the Digital Signal Processor that adopts company of Texas Instrument (TI), DSP) when chip TMS 320 F 2812 is as Technics of Power Electronic Conversion circuit controller core, for the operation conditions of supervisory control device, can adopt serial communication.This mode is simple in structure, but can not meet the requirement of speed, precision and communication distance.

Utility model content

The technical problems to be solved in the utility model is to provide a kind of real-time, high-precision data (communication) adapter unit for power electronics filters.

In order to solve the problems of the technologies described above, the technical solution of the utility model is to provide data (communication) adapter unit in a kind of power electronics filters, in power electronics filters, be provided with DSP CONTROL module, it is characterized in that: comprise the arm processor chip with ethernet controller, arm processor chip is connected with the DSP CONTROL module in described power electronics filters, and arm processor chip is also connected with ethernet control chip.

Preferably, described arm processor chip is connected with the DSP CONTROL module in described power electronics filters by SPI Serial Peripheral Interface (SPI).

In the power electronics filters that the utility model provides, the arm processor chip with ethernet controller controller and ethernet controller DP83848 are formed a communication adapter by data (communication) adapter unit, arm processor chip is communicated by letter by SPI Serial Peripheral Interface (SPI) with the DSP control module in power electronics filters, Ethernet interface is communicated by letter with host computer, data to be sent are sent to computer terminal in Ethernet mode, and adopt Labview design host computer to show data, realize real-time, the high-precision monitoring of power electronics filters data.

The device that the utility model provides has overcome the deficiencies in the prior art, adopt with arm processor chip and the ethernet controller chip of ethernet controller and form a communication adapter, convert SPI serial peripheral interface bus data to meet ethernet format data by this adapter and send, Ethernet host-host protocol adopts udp user datagram protocol.This communication adapter is not only simple in structure, and meets needs real-time, High Precision Monitor.

Brief description of the drawings

Fig. 1 is the hardware connection diagram of LPC1768 and DP83848;

Fig. 2 is system Ethernet transmission flow figure;

Fig. 3 is that system Ethernet is accepted flow chart;

Fig. 4 is the SPI Serial Peripheral Interface (SPI) communication schematic diagram of DSP and arm processor;

Fig. 5 is that in power electronics filters, data (communication) adapter unit uses schematic diagram.

Embodiment

For the utility model is become apparent, hereby with a preferred embodiment, and coordinate accompanying drawing to be described in detail below.

For the service data of the Technics of Power Electronic Conversion circuit controller of Real-time Collection based on DSP (digital signal processor), the utility model provides a kind of ethernet communication solution by ARM (processor) chip+ethernet PHY (physical layer control chip) controller chip.Adopt the SPI in (Serial Peripheral Interface (SPI)) serial line interface of the SPI in DSP and ARM to carry out exchanges data, utilize in ARM with Emac (ethernet controller) controller and ethernet control chip DP83848 design ethernet controller, realize ethernet communication.Consider the problem such as simplified system and traffic rate, UDP (User Datagram Protoco (UDP)) agreement is most suitable communication protocol.In order to facilitate data observation, adopt Labview to design Ethernet host computer interface.

For the design of ethernet controller, the function of not only wanting taking into account system to possess, also will consider the factor such as price, volume.In the present embodiment, adopt the main control chip of ARM chip LPC1768 as Ethernet.It adopts low power dissipation design, supply power voltage 3.3v; Dominant frequency can reach 100Mhz; Harvard's bus structures; Support JTAG (combined testing action group) debugging; In sheet, there is 512KB Flash memory, 64KB data storage; Adopt LQFP (the slim four flat packaging technology) encapsulation format of 100Pin.Ethernet control chip adopts the 10/100Mb/s ethernet controller DP83848 of National Semiconductor (National Semiconductor) design, and the hardware connection diagram of LPC1768 and DP83848 as shown in Figure 1.

Ethernet controller DP83848 controls ethernet link layer, and the agreement that LPC1768 completes other layers regulates, and ethernet controller is controlled by LPC1768, completes whole ethernet communication transmission.In the time realizing communication, first control DP83848 and reset, and make the initialization of register in chip.In the time meeting transmission and acceptable conditions, system starts to send and accept data.In the time meeting the following conditions, ethernet controller interrupts to LPC1768 application, and frame data send and finish, receive frame data or the event such as make mistakes occurs.In master controller, have no progeny, event is according to the processing of classifying of the content of interrupt status register.Completing by LPC1768 internal processes that communication data packing unpacks processed, and after system reset, in order to set up address mapping, carries out transfer of data, and first program sends address resolution protocol (ARP) request, and internal interrupt is carried out timing renewal.Program in LPC1768, with the packing of udp protocol form, is sent in DP83848, and chip controls data link layer outputs to data in local area network (LAN) thus.Otherwise in the time having data to come from local area network (LAN), DP83848 produces external interrupt, main control chip can be made to this respective handling.Transmission flow flow chart as shown in Figure 2, is accepted FB(flow block) as shown in Figure 3.

The communication of DSP and ARM is to carry out Ethernet transmission for the data of DSP being sent in ARM, therefore using ARM as SPI slave, carries out communication using DSP as main frame, and connection diagram as shown in Figure 4.When DSP control module adopts spi bus mode and ARM module to carry out communication, communication data adopts the packet of designed, designed to send, packet once can send four data that transmitted by power electronics filters, this packet contains frame and CRC (cyclic redundancy check (CRC)) verification end to end, ensures that data communication is complete does not make mistakes.

In host computer design, we adopt Labview to carry out Software for Design, require 4 passages to show data.When data are sent to host computer, Labview program utilizes its powerful data-handling capacity by data decomposition, and utilize its conveniently graphic display interface take out four groups of data and show.PC termination is subject to the Ethernet data being sent by slave computer, and Labview unpacks the packet transmitting, and removes end to end and verification frame, and data are divided into four-way four data situation of power electronics filters are presented to PC end with graphics mode.

As shown in Figure 5, when data (communication) adapter unit uses in the power electronics filters that the utility model provides, the DSP control module in power electronics filters is drawn to spi bus and be connected with data (communication) adapter unit.Now, power electronics filters sends to data adapter unit by four data by SPI communication modes.Data adapter unit becomes to meet ethernet format data by this SPI data transaction send to PC end by RJ-45 (network interface card interface), and the Labview display routine in PC unpacks this packet, delivers to four-way graphic alphanumeric display and shows.

Claims (2)

1. data (communication) adapter unit in a power electronics filters, in power electronics filters, be provided with DSP CONTROL module, it is characterized in that: comprise the arm processor chip with ethernet controller, arm processor chip is connected with the DSP CONTROL module in described power electronics filters, and arm processor chip is also connected with ethernet control chip.

2. data (communication) adapter unit in a kind of power electronics filters as claimed in claim 1, is characterized in that: described arm processor chip is connected with the DSP CONTROL module in described power electronics filters by SPI Serial Peripheral Interface (SPI).