CN203243361U

CN203243361U - IEEE1394-Ethernet protocol converter

Info

Publication number: CN203243361U
Application number: CN 201320279363
Authority: CN
Inventors: 王珊; 程志洪; 常扬; 朱永强; 孙志刚; 刘国栋; 马飞; 朱辰
Original assignee: CETC 54 Research Institute
Current assignee: CETC 54 Research Institute
Priority date: 2013-05-21
Filing date: 2013-05-21
Publication date: 2013-10-16
Anticipated expiration: 2023-05-21

Abstract

The utility model relates to an IEEE1394-Ethernet protocol converter, which belongs to the field of embedded technology, and comprises a power module, a crystal oscillator, a reset module and a protocol conversion core, wherein the protocol conversion core is used for converting input gigabit Ethernet data into IEEE1394 data and outputting the IEEE1394 data to an IEEE1394 bus, and converting input IEEE1394 data into gigabit Ethernet data; the power module is used for providing various voltages form the protocol conversion core; the crystal oscillator is used for providing a 66M clock; and the reset module is used for providing correct power-up sequence when resetting the protocol conversion core. The IEEE1394-Ethernet protocol converter has the advantages of good real-time property, high transmission speed, portability and flexibility, high reliability, large application space and the like, and can solve the problem that the gigabit Ethernet products cannot communicate and connect with IEEE1394 bus interface products.

Description

A kind of IEEE1394-Ethernet protocol converter

Technical field

The utility model relates to a kind of IEEE1394-Ethernet protocol converter, belongs to field of embedded technology.

Background technology

The IEEE1394 bus is a kind of high-speed serial bus, and as far back as 1985, Apple took up research, 1986 by Michael Teener(Apple Computer, Inc.) draw up, be used for the real time high-speed digital interface of the image documentation equipments such as digital camera, substitute parallel bus SCSI.At present, up-to-date using standard is IEEE1394, and the IEEE1394 bus has that real-time is good, transmission rate is high, reliability is high, expansion is easy, installation is simple, and upgradability is good, support the advantages such as hot plug, become one of primary candidate's bussing technique of aviation observing and controlling of future generation, industrial control field.

Gigabit Ethernet is a kind of bus-type local area network (LAN), is to develop on the basis of traditional ethernet and Fast Ethernet.Developed jointly by U.S. Xerox company and Stanford university in 1976 and succeed in developing.The technical standard of gigabit Ethernet is IEEE802.3z and IEEE802.3ab standard.CSMA/CD agreement, the original bandwidth of the 1000Mbps that provides are provided the Media access control method.

The IEEE1394 bus standard has defined three kinds of message transmission rates respectively near 100Mbps, 200Mbps, 400Mbps, so also be referred to as S100, S200, S400 in the standard.This speed can be carried out the Large Volume Data transmission such as video, audio-frequency information.IEEE1394 needs the digitized video field of high speed bandwidth to be widely used in Digital Video etc.But aspect the PC system is connected, only have apple Mac computer with IEEE1394 as standard configuration, also have some high-end PC to be equipped with IEEE1394 interfaces.Therefore the biggest obstacle of IEEE1394 development is that support that the PC mainboard directly provides IEEE1394 very little.And most of PC all is furnished with gigabit ethernet interface.So far do not have also to realize that the interconnected transducer of IEEE1394 interface product and gigabit ethernet interface product occurs.

Therefore, in existing gigabit Ethernet and IEEE1394 bussing technique, there is the interconnected problem of to communicate by letter between gigabit ethernet product and the IEEE1394 bus interface product.

The utility model content

The utility model provides a kind of IEEE1394-Ethernet protocol converter, to solve in existing gigabit Ethernet and the IEEE1394 bussing technique, has the interconnected problem of can not communicating by letter between Ethernet interface product and the IEEE1394 bus interface product.

In order to achieve the above object, the utility model adopts following technical proposals:

A kind of IEEE1394-Ethernet protocol converter comprises power module 2, crystal oscillator 3 and reseting module 4, it is characterized in that: also comprise protocol conversion nuclear 1; Protocol conversion nuclear 1 is used for becoming the IEEE1394 data to output to the IEEE1394 bus gigabit Ethernet data transaction of input, and the IEEE1394 data transaction of inputting is become the gigabit Ethernet data; Power module 2 is used to protocol conversion nuclear 1 that multiple voltage is provided; Crystal oscillator 3 is used to protocol conversion nuclear 1 that the 66M clock is provided; Reseting module 4 provides correct powering order when being used to protocol conversion nuclear 1 to reset.

Wherein, protocol conversion nuclear 1 comprises network transformer 5, ethernet physical layer chip 6, microprocessor 7, IEEE1394 logic link control chip 8, IEEE1394 physical chip 9, IEEE1394 transformer 10 and memory 12; Wherein, microprocessor 7 comprises Ethernet control interface 11 and PCI control interface 13;

Network transformer 5 outputs to ethernet physical layer chip 6 after the gigabit Ethernet data of receiving are reduced the dithering process of signal; The data of 6 pairs of inputs of ethernet physical layer chip carry out outputing to behind the framing Ethernet control interface 11 of microprocessor 7; Microprocessor 7 calls that handling procedure in the memory 12 is converted to after the IEEE1394 data the Ethernet data of input and the PCI control interface 13 by microprocessor 7 outputs to IEEE1394 logic link control chip 8; The IEEE1394 data of 8 pairs of inputs of IEEE1394 logic link control chip output to IEEE1394 physical chip 9 after unpacking and processing; IEEE1394 data after 9 pairs of IEEE1394 physical chips are unpacked and processed are torn open and are outputed to IEEE1394 transformer 10 after frame is processed; The IEEE1394 data flow was exported after IEEE1394 transformer 10 will be torn the frame processing open;

IEEE1394 transformer 10 outputs to IEEE1394 physical chip 9 after the IEEE1394 data flow of receiving is reduced the signal jitter processing; The IEEE1394 data flow carried out exporting IEEE1394 logic link control chip 8 to behind the framing after IEEE1394 physical chip 9 reduced the signal jitter processing; After packaging and process, IEEE1394 Frame behind 8 pairs of framings of IEEE1394 logic link control chip exports the PCI control interface 13 of microprocessor 7 to; Microprocessor 7 calls handling procedure in the memory 12 and the IEEE1394 packet of input is converted to the Ethernet control interface 11 of Ethernet data by microprocessor 7 exports ethernet physical layer chip 6 to; The Ethernet data of 6 pairs of inputs of ethernet physical layer chip is torn open and is exported network transformer 5 to after frame is processed; The Ethernet data that 5 pairs of network transformers are torn open after frame is processed carries out exporting after signal amplification and the debounce.

The utility model is compared background technology and is had the following advantages:

1, IEEE1394 bussing technique transmission rate is high, can reach 100Mbps, 200Mbps, 400Mbps, even 800Mbps.Gigabit Ethernet also is a kind of high-performance data transmission technology.The utility model is changed the agreement of the two mutually, can easily the IEEE1394 data transaction be become network data, sends in the computer, or transmits in Ethernet.

2, Ethernet is a kind of common bus-type local area network (LAN).Present applied range, popularization is high.The IEEE1394 bus is used relatively less, effectively these two kinds of agreements is changed, and saves cost, the application in the fields such as the aviation observing and controlling of quickening IEEE1394 bus, Industry Control.

3, IEEE1394 transfer bus real-time is good, and transmission rate is high, light and flexible, and reliability is high.Be specially adapted in the increasing control and measurement system of Digital Transmission amount.

Description of drawings

Fig. 1 is logical schematic of the present utility model;

Fig. 2 is the schematic diagram of protocol conversion nuclear 1 of the present utility model;

Fig. 3 is the microprocessor 7 that provides of the utility model and the interface connection diagram between the IEEE1394 logic link control chip 8;

Fig. 4 is the IEEE1394 logic link control chip 8 that provides of the utility model and the interface connection diagram between the IEEE1394 physical chip 9;

Fig. 5 is the IEEE1394 physical chip 9 that provides of the utility model and the interface connection diagram of IEEE1394 transformer 10;

Fig. 6 is the microprocessor 7 that provides of the utility model and the interface connection diagram of ethernet physical layer chip 6;

Embodiment

Below in conjunction with accompanying drawing to embodiment of the present utility model as an illustration: a kind of IEEE1394-Ethernet protocol converter comprises following hardware and software.

Fig. 1 is logical schematic of the present utility model, comprises protocol conversion nuclear 1, power module 2, crystal oscillator 3, reseting module 4.Power module 2 for protocol conversion nuclear 1 provide+1V ,+1.2V ,+1.8V ,+3.3V ,+the 2.5V multiple voltage; Crystal oscillator 3 provides the 66M clock for protocol conversion nuclear 1; Reseting module 4 provides correct powering order when resetting for protocol conversion nuclear 1.The gigabit Ethernet data transaction of protocol conversion nuclear 1 input becomes the IEEE1394 data to output on the IEEE1394 bus; Also can become the gigabit Ethernet data to be input on the network IEEE1394 data transaction of input.

Fig. 2 is the schematic diagram of protocol conversion nuclear 1 of the present utility model, comprises network transformer 5; Ethernet physical layer chip 6, the physical chip that adopts such as the utility model is BCM5461S; Microprocessor 7, the microprocessor that adopts such as the utility model is MPC8349; IEEE1394 logic link control chip 8, the logic link control chip that adopts such as the utility model is TSB82AA2; IEEE1394 physical chip 9, the IEEE1394 physical chip that adopts such as the utility model is TSB41BA3; IEEE1394 transformer 10 and memory 12; Wherein microprocessor 7 comprises Ethernet control interface 11 and PCI control interface 13.After protocol conversion nuclear 1 is crossed the gigabit Ethernet data communication device of receiving network transformer 5 and is reduced to receive the shake of signal, be input in the ethernet physical layer chip 6, then by after entering microprocessor 7 with Ethernet control interface 11 and carrying out protocol conversion, enter the processing of unpacking of a volume link control chip 8 by PCI control interface 13, split entering IEEE1394 physical chip 9 behind the data framing, by IEEE1394 transformer 10 data flow is sent into the IEEE1394 bus at last.Microprocessor 7, Resources on Chip is abundant, comprises 2

Ethernet control interfaces

11 and 2 PCI control interfaces 13.IEEE1394 logic link control chip 8 can be realized seamless link with microprocessor 7 based on the OHCI agreement; IEEE1394 physical chip 9 has 3 IEEE1394 ports, supports the multiple transmission mediums such as optical fiber, cable, and 1 IEEE1394 electrical interface is provided in this embodiment; IEEE1394 transformer 10 can adopt TM1062TX3DUA.Ethernet physical layer chip 6, the physical chip that adopts such as the utility model are that BCM5461S passes through gigabit medium-specific interface GMII and is connected with the Ethernet control interface 11 of microprocessor 7.

Fig. 3 is the interface connection diagram between microprocessor 7 and the IEEE1394 logic link control chip 8.The high energy of logic link control chip 8 provides the performance of 800Mbps speed, can be between

PCI control interface

13 and 1394 buses transferring data effectively and promptly.IEEE1394 logic link control chip 8 as a 33MHz/64 position or 33MHz/32 position PCI local bus and compatibility 1394, can support the interface operation between the PHY-link equipment of 98.304Mbps, 196.608Mbps, 393.216Mbps or 786.432Mbps serial data rate.Microprocessor 7 adopts MPC8349 to carry 2 PCI control interfaces 13, can be configured to 64 or 32.In fact, logic link control chip 8 is that pci signal and IEEE1394 signal are changed mutually.

Fig. 4 is the interface connection diagram between logic link control chip 8 and the IEEE1394 physical chip 9.Link layer is mainly finished the functions such as addressing, data detection, data frame transfer, by 32, the pci interface realization of 33MHz and being connected of main frame; Support the IEEE1394 standard, the FIFO of 8KB, the power management function of 1394OHCI and PCI; Use the 3.3V power supply.Physical layer mainly provides the electric of equipment and cable and interface standard mechanically, and the reception of deal with data and transmission guarantee that all equipment can both access bus in good condition.Maximum transmission rate can reach 400Mb/s, uses the 3.3V power supply.Can support three tunnel 1394 transmit pories.

Fig. 5 is the interface connection diagram of IEEE1394

physical chip

9 and 1394 transformers 10.1394 transformers 10 adopt TM1062TX3DUA, and the shake in the time of can reducing transmitt or receive signal is so that transmission range can reach 20 meters.

Fig. 6 is the interface connection diagram of microprocessor 7 and ethernet physical layer chip 6.Ethernet physical layer chip 6 chips are also referred to as PHY.Microprocessor 7 adopts MPC8349 that 2 Ethernet control interface 11TSEC are arranged, Three-Speed Ethernet Controller, support the 10M/100M/1000M third speed, support the IEEE802.3 agreement based on CSMA/CDCarrier-Sense Multiple Access/Collision Detect.

Claims

1. an IEEE1394-Ethernet protocol converter comprises power module (2), crystal oscillator (3) and reseting module (4), it is characterized in that: also comprise protocol conversion nuclear (1); Protocol conversion nuclear (1) is used for becoming the IEEE1394 data to output to the IEEE1394 bus gigabit Ethernet data transaction of input, and the IEEE1394 data transaction of inputting is become the gigabit Ethernet data; Power module (2) is used to protocol conversion nuclear (1) that multiple voltage is provided; Crystal oscillator (3) is used to protocol conversion nuclear (1) that the 66M clock is provided; Reseting module (4) is used to protocol conversion nuclear (1) that correct powering order is provided when resetting.

2. IEEE1394-Ethernet protocol converter according to claim 1 is characterized in that: protocol conversion nuclear (1) comprises network transformer (5), ethernet physical layer chip (6), microprocessor (7), IEEE1394 logic link control chip (8), IEEE1394 physical chip (9), IEEE1394 transformer (10) and memory (12); Wherein, microprocessor (7) comprises Ethernet control interface (11) and PCI control interface (13); Network transformer (5) outputs to ethernet physical layer chip (6) after the gigabit Ethernet data of receiving are reduced the dithering process of signal; Ethernet physical layer chip (6) carries out outputing to behind the framing Ethernet control interface (11) of microprocessor (7) to the data of input; Microprocessor (7) calls that handling procedure in the memory (12) is converted to after the IEEE1394 data the Ethernet data of input and the PCI control interface (13) by microprocessor (7) outputs to IEEE1394 logic link control chip (8); IEEE1394 logic link control chip (8) is unpacked to the IEEE1394 data of input and is outputed to IEEE1394 physical chip (9) after processing; IEEE1394 data after IEEE1394 physical chip (9) is processed unpacking are torn open and are outputed to IEEE1394 transformer (10) after frame is processed; The IEEE1394 data flow was exported after IEEE1394 transformer (10) will be torn the frame processing open;

IEEE1394(10) the IEEE1394 data flow of receiving is reduced signal jitter and processes after, output to IEEE1394 physical chip (9); The IEEE1394 data flow carried out exporting IEEE1394 logic link control chip (8) to behind the framing after IEEE1394 physical chip (9) reduced the signal jitter processing; IEEE1394 logic link control chip (8) packages to the IEEE1394 Frame behind the framing and exports the PCI control interface (13) of microprocessor (7) after processing to; Microprocessor (7) calls handling procedure in the memory (12) and the IEEE1394 packet of input is converted to the Ethernet control interface (11) of Ethernet data by microprocessor (7) exports ethernet physical layer chip (6) to; Ethernet physical layer chip (6) is torn open the Ethernet data of input and is exported network transformer (5) to after frame is processed; Network transformer (5) carries out exporting after signal amplification and the debounce to the Ethernet data of tearing open after frame is processed.