CN203720778U - Circuit for wakening host by USB peripheral - Google Patents

Circuit for wakening host by USB peripheral Download PDF

Info

Publication number
CN203720778U
CN203720778U CN201420078161.8U CN201420078161U CN203720778U CN 203720778 U CN203720778 U CN 203720778U CN 201420078161 U CN201420078161 U CN 201420078161U CN 203720778 U CN203720778 U CN 203720778U
Authority
CN
China
Prior art keywords
resistance
circuit
host
usb
peripheral hardware
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201420078161.8U
Other languages
Chinese (zh)
Inventor
戎海峰
王芳德
李抢满
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DONGGUAN YF TECHNOLOGY Co Ltd
Original Assignee
DONGGUAN YF TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by DONGGUAN YF TECHNOLOGY Co Ltd filed Critical DONGGUAN YF TECHNOLOGY Co Ltd
Priority to CN201420078161.8U priority Critical patent/CN203720778U/en
Application granted granted Critical
Publication of CN203720778U publication Critical patent/CN203720778U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

The utility model relates to a circuit for wakening a host by a USB peripheral. The circuit comprises an insertion detection circuit and a voltage induction circuit, wherein the insertion detection circuit comprises an induction end connected with a power source terminal of a USB interface and a trigger end USB FIG_DET connected with the host; the induction end is connected with an input end HOST_VBUS of the voltage induction circuit, and the trigger end USB FIG_DET is connected with an output end of the voltage induction circuit; when a peripheral is not inserted into the USB interface, the output end of the voltage induction circuit is in a low level; and when the peripheral is inserted into the USB interface, the voltage of the input end HOST_VBUS of the voltage induction circuit is increased, the output end of the voltage induction circuit outputs high-level signals, and the trigger end USB FIG_DET triggers and wakens the host. The host can be wakened through plug actions of the USB peripheral, so that the peripheral can be communicated with the host faster, and power consumption is reduced.

Description

A kind of circuit of USB peripheral hardware wake-up master
Technical field
The utility model relates to communication technique field, relates in particular to a kind of circuit of USB peripheral hardware wake-up master.
Background technology
Along with scientific and technological development, the development of electronic product is particularly outstanding, and the current electronic product overwhelming majority is all provided with USB interface; By USB interface, be connected with other electronic equipments; Current electronic product is all designed with sleep mode mostly, when electronic product within a period of time in without mode of operation, enter dormant state, save power consumption; Enter after dormant state when the main frame of electronic product wakes up again, need to trigger the other key that wakes up.If the main frame in dormant state, now connects peripheral hardware by USB interface, main frame can not be identified, and need to wake up in addition, after waking up, is connected with peripheral hardware signal again, and the power consumption and the reaction time that have increased main frame are slow.
Summary of the invention
The purpose of this utility model is to solve the deficiencies in the prior art, and a kind of circuit of USB peripheral hardware wake-up master is provided, and this circuit can be saved the wake-up master time, reduces power consumption.
The technical solution adopted in the utility model is:
A kind of circuit of USB peripheral hardware wake-up master, comprise insertion detection circuit, wherein insertion detection circuit comprises the induction end being connected with the power end of USB interface, and the trigger end USBFIG_DET being connected with main frame, described USB peripheral hardware wake-up circuit also comprises voltage sense circuit, described induction end is connected with the input end HOST_VBUS of voltage sense circuit, trigger end USBFIG_DET is connected with the output terminal of voltage sense circuit, when not having peripheral hardware to insert USB interface, the output terminal of voltage sense circuit is in low level, when having peripheral hardware to insert USB interface, the input end HOST_VBUS voltage of voltage sense circuit uprises, the output terminal output high level signal of voltage sense circuit, trigger end USBFIG_DET triggers main frame wake-up master.
Further, described voltage sense circuit comprises triode Q25, resistance R 290, R296, R288, R289, R287; One end of described resistance R 289 is connected with power end VCC_5V, the other end of resistance R 289 is connected with the input end HOST_VBUS of voltage sense circuit, the input end HOST_VBUS of voltage sense circuit is connected with one end of resistance R 288, R287 respectively, the other end ground connection of resistance R 287; The other end of resistance R 288 is connected with the base stage of described triode Q25, the grounded emitter of triode Q25, the collector of triode Q25 is connected with one end of resistance R 290, R296 respectively, the other end of resistance R 290 is connected with power end VCC_IO, and the other end of resistance R 296 is connected with trigger end USBFIG_DET.
Further, described USB peripheral hardware wake-up circuit also comprises holding circuit, and holding circuit comprises filter capacitor C283, TC4, esd protection diode D21, D22; The power end VB of described USB interface is connected with the input end HOST_VBUS of voltage sense circuit, filter capacitor C283, the TC4 formation shunt capacitance that is connected in parallel, and one end of shunt capacitance is connected in power end VB, other end ground connection; The correction data end D+ of USB interface is connected with the negative pole of esd protection diode D21, and the negative data end D-of USB interface is connected with the negative pole of esd protection diode D22; The equal ground connection of positive pole of ESD protection diode D21, D22, the earth terminal ground connection of USB interface.
Further, described testing circuit also comprises feedback circuit, and described feedback circuit comprises resistance R 143, R195, R144, R197, triode Q20, capacitor C 219 and transistor Q19; One end of described resistance R 143 is connected with the feedback signal terminal HOUS_DRV of main frame, the other end of resistance R 143 is connected with one end of resistance R 195, the base stage of triode Q20 respectively, the equal ground connection of emitter of the other end of resistance R 195 and triode Q20, the collector of triode Q20 is connected with one end of resistance R 144, and the other end of resistance R 144 is connected with one end of capacitor C 219, the pin one of one end of resistance 296, transistor Q19 respectively; The pin two of the other end of the other end of capacitor C 219, resistance 296, transistor Q19 is connected with power end USB_5V respectively, and the pin 3 of transistor Q19 is connected with the input end HOST_VBUS of voltage sense circuit.
Further, described USB peripheral hardware wake-up circuit also comprises extracts testing circuit, described in extract testing circuit and comprise resistance R 293, R294, R297, R295, R298, capacitor C 220, transistor Q6; One end of resistance R 293 is connected with host signal end HOST_DP, and the other end of resistance R 293 is connected with the pin one of one end of resistance R 294, one end of capacitor C 220 and transistor Q6 respectively; The other end of the other end of the pin two of transistor Q6, resistance R 294, capacitor C 220 is ground connection respectively; The pin 3 of transistor Q6 is connected with one end of resistance R 295, R297, R298 respectively, the other end of resistance R 295 is connected with power end VCC_IO, the other end of resistance R 298 is connected with described trigger end USBFIG_DET, the other end of resistance R 297 with extract trigger end USBFIG_DETT and be connected.
The beneficial effects of the utility model are: the utility model is by the Plug Action of USB peripheral hardware, just can wake-up master, and make the peripheral hardware can be faster and host communication, reduce power consumption.
Accompanying drawing explanation
Fig. 1 is insertion detection circuit schematic diagram of the present utility model.
Fig. 2 is feedback circuit schematic diagram of the present utility model.
Fig. 3 is holding circuit schematic diagram of the present utility model.
Fig. 4 is the testing circuit schematic diagram of extracting of the present utility model.
Embodiment
Below in conjunction with accompanying drawing 1 to Fig. 4 and embodiment, the utility model is further described.
Embodiment:
A kind of circuit of USB peripheral hardware wake-up master, comprise insertion detection circuit, wherein insertion detection circuit comprises the induction end being connected with the power end of USB interface, and the trigger end USBFIG_DET being connected with main frame, described USB peripheral hardware wake-up circuit also comprises voltage sense circuit, described induction end is connected with the input end HOST_VBUS of voltage sense circuit, trigger end USBFIG_DET is connected with the output terminal of voltage sense circuit, when not having peripheral hardware to insert USB interface, the power end voltage of USB interface is 0, the output terminal of voltage sense circuit is in low level, when having peripheral hardware to insert USB interface, the input end HOST_VBUS voltage of voltage sense circuit uprises, the output terminal output high level signal of voltage sense circuit, trigger end USBFIG_DET triggers main frame wake-up master.
The technical program is mainly applied USB interface after inserting peripheral hardware, the power end of its USB interface can produce voltage, USB interface resistance connects into wake-up circuit simultaneously, cause electric current and the voltage of wake-up circuit to change, by the output level of this variable effect insertion detection circuit, thus wake-up master.
Further, described voltage sense circuit comprises triode Q25, resistance R 290, R296, R288, R289, R287; One end of described resistance R 289 is connected with power end VCC_5V, the other end of resistance R 289 is connected with the input end HOST_VBUS of voltage sense circuit, the input end HOST_VBUS of voltage sense circuit is connected with one end of resistance R 288, R287 respectively, the other end ground connection of resistance R 287; The other end of resistance R 288 is connected with the base stage of described triode Q25, the grounded emitter of triode Q25, the collector of triode Q25 is connected with one end of resistance R 290, R296 respectively, the other end of resistance R 290 is main frame power supply with power end VCC_IO() be connected, the other end of resistance R 296 is connected with trigger end USBFIG_DET.
Voltage sense circuit mainly utilizes triode to be operated in saturated and cut-off state, and when base voltage uprises, triode is in state of saturation, and current collection is low level very; Otherwise when base voltage step-down, triode is in cut-off state, and current collection is high level very.Thereby change the level of trigger end USBFIG_DET.When specific design, with reference to figure 1, by the series connection of biasing resistor R289, R287, make the electromotive force of resistance R 288 one end keep constant, now the collector of triode Q25 is by a low level of resistance R 296 outputs; When having peripheral hardware to insert USB interface, the power end of USB interface is connected with the input end HOST_VBUS of voltage sense circuit, and USB interface power end is connected with stake resistance, and this stake resistance and resistance R 287 form the ground connection again that is connected in parallel; Thereby reduced the biased electrical resistance between input end and ground, and then reduced the electromotive force of input end, triode Q25 is in cut-off state.Grounded emitter due to triode Q25, the electric current of the triode Q25 base stage of therefore flowing through reduces, the collector of triode Q25 of flowing through also can reduce, and the electromotive force of its collector increases, and the level raising of the trigger end USBFIG_DET that is connected with resistance R 298 of flowing through becomes high level.Trigger end USBFIG_DET is connected with main frame, and then reaches the object of wake-up master.
Further, described USB peripheral hardware wake-up circuit also comprises holding circuit, and holding circuit comprises filter capacitor C283, TC4, esd protection diode D21, D22; The power end VB of described USB interface is connected with the input end HOST_VBUS of voltage sense circuit, filter capacitor C283, the TC4 formation shunt capacitance that is connected in parallel, and one end of shunt capacitance is connected in power end VB, other end ground connection; The correction data end D+ of USB interface is connected with the negative pole of esd protection diode D21, and the negative data end D-of USB interface is connected with the negative pole of esd protection diode D22; The equal ground connection of positive pole of esd protection diode D21, D22, the earth terminal ground connection of USB interface.
TC4, C283 are set, respectively in order to suppress high frequency, the low-frequency disturbance of power supply; D21, D22 are used separately as esd protection device.When being connected with main frame, data terminal D-, the D+ of USB interface is connected with host signal end HOST_DM, HOST_DP respectively.
Further, described testing circuit also comprises feedback circuit, and described feedback circuit comprises resistance R 143, R195, R144, R197, triode Q20, capacitor C 219 and transistor Q19; One end of described resistance R 143 is connected with the feedback signal terminal HOUS_DRV of main frame, the other end of resistance R 143 is connected with one end of resistance R 195, the base stage of triode Q20 respectively, the equal ground connection of emitter of the other end of resistance R 195 and triode Q20, the collector of triode Q20 is connected with one end of resistance R 144, and the other end of resistance R 144 is connected with one end of capacitor C 219, the pin one of one end of resistance R 197, transistor Q19 respectively; The pin two of the other end of the other end of capacitor C 219, resistance R 197, transistor Q19 is connected with power end USB_5V respectively, and the pin 3 of transistor Q19 is connected with the input end HOST_VBUS of voltage sense circuit.
After host wake-up, the feedback signal terminal HOUS_DRV of main frame is to feedback circuit input high level, thereby the base current that makes triode Q20 becomes large, triode Q20 is operated in state of saturation, collector voltage-to-ground is almost 0V, pin 3 supplying power for outsides of transistor Q19, the power end power supply to USB interface, makes main frame be connected with the communication of peripheral hardware Rapid Establishment.Wherein, peripheral hardware general introduction external unit is called for short " peripheral hardware ", refers to and is connected in main frame hardware device in addition.
Further, described USB peripheral hardware wake-up circuit also comprises extracts testing circuit, described in extract testing circuit and comprise resistance R 293, R294, R297, R295, R298, capacitor C 220, transistor Q6; One end of resistance R 293 is connected with host signal end HOST_DP, and the other end of resistance R 293 is connected with the pin one of one end of resistance R 294, one end of capacitor C 220 and transistor Q6 respectively; The other end of the other end of the pin two of transistor Q6, resistance R 294, capacitor C 220 is ground connection respectively; The pin 3 of transistor Q6 is connected with one end of resistance R 295, R297, R298 respectively, the other end of resistance R 295 is connected with power end VCC_IO, the other end of resistance R 298 is connected (as reserved circuit) with described trigger end USBFIG_DET, the other end of resistance R 297 with extract trigger end USBFIG_DETT and be connected.
Resistance R 293, R294 and capacitor C 220 form filtering circuit, in order to avoid extracting the impact of observation circuit on USB peripheral communication; Before USB peripheral hardware is extracted, USB interface is in high-speed communication pattern, and the signal of host signal end HOST_DP is in high level state; According to transistorized function, the level of exporting by resistance R 297 is low level, and the signal of therefore extracting trigger end USBFIG_DETT is low level; When USB peripheral hardware is extracted, the signal of host signal end HOST_DP is low level, and the signal of then extracting trigger end USBFIG_DETT becomes high level, and sends signal to main frame, simultaneously by host wake-up; The signal that host computer system recognizes USBFIG_DETT becomes after high level, by feedback circuit, by the pin output voltage of transistor Q19, is 0, and the power end of USB interface does not have voltage, and main frame can discharge USB peripheral hardware.
Below be only the application's preferred embodiment, equivalent technical solutions on this basis still falls into application protection domain.

Claims (5)

1. the circuit of a USB peripheral hardware wake-up master, it is characterized in that: it comprises insertion detection circuit, wherein insertion detection circuit comprises the induction end being connected with the power end of USB interface, and the trigger end USBFIG_DET being connected with main frame, described USB peripheral hardware wake-up circuit also comprises voltage sense circuit, described induction end is connected with the input end HOST_VBUS of voltage sense circuit, trigger end USBFIG_DET is connected with the output terminal of voltage sense circuit, when not having peripheral hardware to insert USB interface, the power end voltage of USB interface is 0, the output terminal of voltage sense circuit is in low level, when having peripheral hardware to insert USB interface, the input end HOST_VBUS voltage of voltage sense circuit uprises, the output terminal output high level signal of voltage sense circuit, trigger end USBFIG_DET triggers main frame wake-up master.
2. the circuit of a kind of USB peripheral hardware wake-up master according to claim 1, is characterized in that: described voltage sense circuit comprises triode Q25, resistance R 290, R296, R288, R289, R287; One end of described resistance R 289 is connected with power end VCC_5V, the other end of resistance R 289 is connected with the input end HOST_VBUS of voltage sense circuit, the input end HOST_VBUS of voltage sense circuit is connected with one end of resistance R 288, R287 respectively, the other end ground connection of resistance R 287; The other end of resistance R 288 is connected with the base stage of described triode Q25, the grounded emitter of triode Q25, the collector of triode Q25 is connected with one end of resistance R 290, R296 respectively, the other end of resistance R 290 is connected with power end VCC_IO, and the other end of resistance R 296 is connected with trigger end USBFIG_DET.
3. the circuit of a kind of USB peripheral hardware wake-up master according to claim 1 and 2, is characterized in that: described USB peripheral hardware wake-up circuit also comprises holding circuit, and holding circuit comprises filter capacitor C283, TC4, esd protection diode D21, D22; The power end VB of described USB interface is connected with the input end HOST_VBUS of voltage sense circuit, filter capacitor C283, the TC4 formation shunt capacitance that is connected in parallel, and one end of shunt capacitance is connected in power end VB, other end ground connection; The correction data end D+ of USB interface is connected with the negative pole of esd protection diode D21, and the negative data end D-of USB interface is connected with the negative pole of esd protection diode D22; The equal ground connection of positive pole of esd protection diode D21, D22, the earth terminal ground connection of USB interface.
4. the circuit of a kind of USB peripheral hardware wake-up master according to claim 3, it is characterized in that: described testing circuit also comprises feedback circuit, described feedback circuit comprises resistance R 143, R195, R144, R197, triode Q20, capacitor C 219 and transistor Q19; One end of described resistance R 143 is connected with the feedback signal terminal HOUS_DRV of main frame, the other end of resistance R 143 is connected with one end of resistance R 195, the base stage of triode Q20 respectively, the equal ground connection of emitter of the other end of resistance R 195 and triode Q20, the collector of triode Q20 is connected with one end of resistance R 144, and the other end of resistance R 144 is connected with one end of capacitor C 219, the pin one of one end of resistance R 197, transistor Q19 respectively; The pin two of the other end of the other end of capacitor C 219, resistance R 197, transistor Q19 is connected with power end USB_5V respectively, and the pin 3 of transistor Q19 is connected with the input end HOST_VBUS of voltage sense circuit.
5. the circuit of a kind of USB peripheral hardware wake-up master according to claim 1 and 2, it is characterized in that: described USB peripheral hardware wake-up circuit also comprises extracts testing circuit, described in extract testing circuit and comprise resistance R 293, R294, R297, R295, R298, capacitor C 220, transistor Q6; One end of resistance R 293 is connected with host signal end HOST_DP, and the other end of resistance R 293 is connected with the pin one of one end of resistance R 294, one end of capacitor C 220 and transistor Q6 respectively; The other end of the other end of the pin two of transistor Q6, resistance R 294, capacitor C 220 is ground connection respectively; The pin 3 of transistor Q6 is connected with one end of resistance R 295, R297, R298 respectively, the other end of resistance R 295 is connected with power end VCC_IO, the other end of resistance R 298 is connected with described trigger end USBFIG_DET, the other end of resistance R 297 with extract trigger end USBFIG_DETT and be connected.
CN201420078161.8U 2014-02-24 2014-02-24 Circuit for wakening host by USB peripheral Expired - Fee Related CN203720778U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420078161.8U CN203720778U (en) 2014-02-24 2014-02-24 Circuit for wakening host by USB peripheral

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420078161.8U CN203720778U (en) 2014-02-24 2014-02-24 Circuit for wakening host by USB peripheral

Publications (1)

Publication Number Publication Date
CN203720778U true CN203720778U (en) 2014-07-16

Family

ID=51159916

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201420078161.8U Expired - Fee Related CN203720778U (en) 2014-02-24 2014-02-24 Circuit for wakening host by USB peripheral

Country Status (1)

Country Link
CN (1) CN203720778U (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107666307A (en) * 2017-08-31 2018-02-06 普联技术有限公司 A kind of USB insertion detection circuits and USB insert detection device
CN108932139A (en) * 2018-06-21 2018-12-04 Tcl通力电子(惠州)有限公司 Automatic boot circuit and electronic equipment
CN111907331A (en) * 2020-07-23 2020-11-10 上海英恒电子有限公司 Thermal runaway early warning system and method for battery pack of electric vehicle
CN112075943A (en) * 2020-09-02 2020-12-15 北京华益精点生物技术有限公司 Starting communication device and method for blood glucose meter
CN112467863A (en) * 2020-11-18 2021-03-09 北京华益精点生物技术有限公司 Dual-power switching communication device and method for glucometer
CN114924639A (en) * 2022-05-12 2022-08-19 芯海科技(深圳)股份有限公司 Electronic device and method for waking up micro control unit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107666307A (en) * 2017-08-31 2018-02-06 普联技术有限公司 A kind of USB insertion detection circuits and USB insert detection device
CN107666307B (en) * 2017-08-31 2021-02-09 普联技术有限公司 USB inserts detection circuitry and USB inserts check out test set
CN108932139A (en) * 2018-06-21 2018-12-04 Tcl通力电子(惠州)有限公司 Automatic boot circuit and electronic equipment
CN111907331A (en) * 2020-07-23 2020-11-10 上海英恒电子有限公司 Thermal runaway early warning system and method for battery pack of electric vehicle
CN112075943A (en) * 2020-09-02 2020-12-15 北京华益精点生物技术有限公司 Starting communication device and method for blood glucose meter
CN112467863A (en) * 2020-11-18 2021-03-09 北京华益精点生物技术有限公司 Dual-power switching communication device and method for glucometer
CN114924639A (en) * 2022-05-12 2022-08-19 芯海科技(深圳)股份有限公司 Electronic device and method for waking up micro control unit

Similar Documents

Publication Publication Date Title
CN203720778U (en) Circuit for wakening host by USB peripheral
CN204287446U (en) A kind of power-fail detection circuit
CN103208987B (en) The start awakening method of external connection terminal of audio frequency device
TW201416845A (en) Motherboard
CN201716720U (en) Singlechip communication circuit and singlechip system
CN204258758U (en) A kind of power down does not produce the reset circuit of reset signal
CN204697033U (en) System reset circuit and electronic equipment
CN203386145U (en) USB energy-saving power supply adopting electronic switch
CN202996717U (en) Relay drive circuit in resistance-capacitance voltage drop-down circuit
CN203520298U (en) Start circuit and portable equipment
CN203435137U (en) Circuit for eliminating shutdown POP sound of audio power amplifier
CN101826069B (en) Communication circuit and method of singlechip
CN206313977U (en) Plosive cancellation element and power amplifier
CN204631669U (en) A kind of rate signal modulate circuit
CN104199500B (en) High voltage generating circuit and method, power source control circuit and electronic system
CN203324355U (en) Microwave-system diverse self-checking circuit
CN203661276U (en) A mute control circuit
CN203232871U (en) Electrostatic protection circuit for IO port of USB flash disk
CN202711183U (en) Electromagnetic pen
CN105278405A (en) Clamshell-type electronic equipment and turning-on/turning-off circuit thereof
CN204244073U (en) A kind of controllable direct current power supply circuit
CN204440068U (en) A kind of 24L Control card
CN203261314U (en) Modulator circuit based on NAND gate integrated circuit
CN204376856U (en) The controlled positive and negative square-wave generator of pulsewidth
CN204129554U (en) High voltage generating circuit, power control circuit and electronic system

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140716

Termination date: 20180224