CN203659932U

CN203659932U - Forward-installed LED chip without bonding wire

Info

Publication number: CN203659932U
Application number: CN201320770179.XU
Authority: CN
Inventors: 叶国光; 李秦豫; 罗长得
Original assignee: Guangdong De Li Photoelectric Co Ltd
Current assignee: Guangdong De Li Photoelectric Co Ltd
Priority date: 2013-11-30
Filing date: 2013-11-30
Publication date: 2014-06-18
Anticipated expiration: 2023-11-30

Abstract

The utility model discloses a forward-installed LED chip without a bonding wire. The forward-installed LED chip without the bonding wire is characterized by comprising an epitaxial chip, an N-type electrode, a P-type electrode, a fluorescent powder layer, isolation layers and solder layers; the epitaxial chip comprises a substrate, a buffer layer, an N-type layer, a luminescent layer, an electronic blocking layer, a P-type layer and an ITO layer, and net-shaped fingers are formed on the ITO layer; the N-type electrode, the P-type electrode and the fluorescent powder layer are formed on the epitaxial chip; the isolation layers are formed on the upper side of the epitaxial chip and the periphery of the epitaxial chip respectively; the solder layers are located between the N-type electrode and a corresponding external circuit and between the P-type electrode and a corresponding external circuit respectively. According to the utility model, the light extraction rate can be increased, light source quality is improved, a gold thread is not needed, manufacturing cost is reduced, and the reliability of an LED is improved; meanwhile, the electrodes are connected with the external circuits in a spot welding mode, and therefore the yield of the LED is increased.

Description

Exempt from the packed LED chip of bonding wire

Technical field

The utility model relates to LED production technology, especially a kind of packed LED chip of exempting from bonding wire.

Background technology

Illumination for the mankind in dark place and the activity at night extremely important, the people in ancient times utilizes original mode to obtain light source, for example burn material, oil firing or burn the modes such as wax, even utilize and can be used as night light source noctilucent firefly, but along with scientific and technological progress, from the incandescent lamp bulb in past and fluorescent lamp until light-emitting diode (light emitting diode, LED) now, the mankind start to attempt other distinct methods and obtain light source.As new generation of environment protection solid state light emitter, GaN base LED has become the focus that people pay close attention to, and compared with conventional light source, LED has that the life-span is long, reliability is high, volume is little, low in energy consumption, fast response time, be easy to modulation and the advantage such as integrated.Be widely used in fields such as information demonstration, image processing, future will replace incandescent, fluorescent lamp, enters general lighting field.But LED still faces problems, as manufacture craft is relatively complicated, the problem such as spectral distribution is inhomogeneous, light extraction efficiency.Therefore how to improve the luminous efficiency of LED, reducing production costs is the major technique bottleneck that LED faces.

GaN base LED luminous efficiency is determined by internal quantum efficiency and the light extraction efficiency of light-emitting diode.Along with the progress of Material growth technology and device structure design, but absorbed by material, electrode absorbs, the GaN/ air interface cirtical angle of total reflection, the impact of the many factors such as current crowding, there is three kinds of structures, 1 in chip) positive assembling structure, 2) inverted structure, 3) vertical stratification.Inverted structure, compared with traditional positive assembling structure, possesses the absorption of avoiding electrode pair light, and sapphire refractive index is less than GaN material simultaneously, and the angle of emergence that has more light is less than the cirtical angle of total reflection by interface, and effectively improve the extraction efficiency of LED.But inverted structure also faces inevitable technical barrier, as more expensive with respect to the equipment of formal dress chip structure in inverted structure equipment needed thereby, inverted structure accuracy requires more high various problems simultaneously.Vertical stratification has had very large improvement with respect to the positive assembling structure of tradition on radiating effect and current crowding, but vertical stratification need peel off sapphire, and stripping technology complexity.

Summary of the invention

For the deficiencies in the prior art, the utility model, on traditional formal dress architecture basics, provides a kind of packed LED chip of exempting from bonding wire, its light source quality better and can reduce the cost of raw material and some glue difficulty.

The technical solution of the utility model is: a kind of packed LED chip of exempting from bonding wire, comprising:

-extension chip, extension chip comprises substrate, resilient coating, N-type layer, luminescent layer, electronic barrier layer, P type layer and ITO layer, is formed with netted finger on ITO layer;

-N-type electrode, is formed on the N-type layer of extension chip, this N-type electrode and extension chip electrical couplings;

-P type electrode, is formed on the P type layer of extension chip, this P type electrode and extension chip electrical couplings, and P type electrode is connected with netted finger metal;

-phosphor powder layer, is formed on extension chip, and phosphor powder layer height and N-type electrode and P type electrode are contour, or not contour;

-separator, is formed at upside and the surrounding of extension chip;

-solder layer, at N-type electrode and corresponding outer circuits and P type electrode and accordingly between circuits.

Described outer chip is divided into small-power chip, middle power chip, high-power chip and high pressure chip by design size size.

Consistent or the difference in height of N-type electrode height, P type electrode height, phosphor powder layer height be LED gross thickness 5% within.

Described separator is one or more combinations in silicon dioxide, silicon nitride or polyimide material, and thickness is between 0.5 micron-30 microns.

The material of described N-type electrode, P type electrode, solder layer and netted finger is the alloy of one or more compositions in Ag, Cu, Al, Ni, In, Sn, Ti, Pt, Cr, Au and Wu.

Exempt from a method for packing for the packed LED chip of bonding wire, comprise the steps: 1, clean substrate; 2, adopt resilient coating, N-type layer, luminescent layer, electronic barrier layer, the P type layer in MOCVD technology growth epitaxial chip structure; 3, use ICP, mask or photoetching technique to etch N-type electrode and P type electrode; 4, use reaction and plasma deposition technique to make ITO layer and netted finger, and P type electrode is connected with netted finger; 5, adopt PECVD fabrication techniques separator; 6, apply or paste fluorescent material; 7, fluorescent powder curing; 8, spot welding.

Preferably, in described electrode fabrication, electrode can be distributed in diagonal angle or both sides; The number of electrode can be greater than two; And set shape and the position of electrode according to size.

Preferably, in described spot welding step, scolder is directly on electrode, and excess solder flows down along extension chip sidewall, and the scolder flowing down is directly connected with outer circuits.

The beneficial effects of the utility model are: a kind of packed LED chip of exempting from bonding wire is provided, can have increased the recovery rate of light on the one hand, and promote light source quality by the design of extension chip; Reduce cost of manufacture without gold thread on the one hand, and covered and can promote light efficiency without gold thread, also reduced the problem of the gold thread fracture being brought by fluorescent material and chip thermal mismatching, promoted the reliability of LED; Adopt on the other hand spot-welding technology just can realize electrode and be connected with outer circuits, simplify processing step and improved the yield of LED.

Brief description of the drawings

Fig. 1 is the generalized section of the each embodiment agent structure of the utility model;

The schematic top plan view that Fig. 2 provides for embodiment 1 of the present utility model;

The schematic top plan view that Fig. 3 provides for embodiment 2 of the present utility model;

The schematic top plan view that Fig. 4 provides for embodiment 3 of the present utility model;

The schematic top plan view that Fig. 5 provides for embodiment 4 of the present utility model.

In figure, 1-substrate; 2-resilient coating; 3-N type layer; 4-luminescent layer; 5-electronic barrier layer; 6-P type layer; 7-ITO layer; 8-separator; 9-P type electrode; 10-phosphor powder layer; 11-N type electrode; 12-solder layer.

Embodiment

Below in conjunction with accompanying drawing, embodiment of the present utility model is described further:

As shown in Figure 1, the packed LED chip of what the utility model provided exempt from bonding wire, each embodiment basic structure is identical, include substrate (1), be formed at the resilient coating (2) on substrate (1), be formed at the N-type layer (3) on resilient coating (2), be formed at the luminescent layer (4) on N-type layer (3), be formed at the electronic barrier layer (5) on luminescent layer (4), be formed at the P type layer (6) on electronic barrier layer (5), be formed at the ITO layer (7) on P type layer (6), be formed at the N-type electrode (11) on N-type layer (3), be formed at the P type electrode (9) on P type layer (6), be formed at ITO(7) on netted finger (netted current delivery line), be formed at ITO(7), separator (8) on N-type layer (3) and sidewall, be formed at ITO(7) on phosphor powder layer (10), be formed at the solder layer (12) on P type electrode (9) or N-type electrode (11) and extension chip sidewall.

As shown in Figure 2, the feature of embodiment 1 is that N-type electrode (11) and P type electrode (9) are diagonal angle setting, and manufacturing process is: 1, form after extension chip basic structure, make a pair of to corner electrode by ICP on extension chip; 2, after further processing, make phosphor powder layer (10) and by spot welding, electrode be connected with outer circuits.

As shown in Figure 3, the feature of embodiment 2 is that N-type electrode (11) and P type electrode (9) are and is oppositely arranged, and manufacturing process is: 1, form after extension chip basic structure, make pair of electrodes by ICP on extension chip; 2, after further processing, make phosphor powder layer (10) and carry out spot welding.

As shown in Figure 4, the feature of embodiment 3 has been two N-type electrodes (11) and a P type electrode (9), manufacturing process is: 1, form after extension chip basic structure, make two N-type electrodes (11) and a P type electrode (9) by ICP on extension chip; 2, after further processing, make phosphor powder layer (10) and carry out spot welding.

As shown in Figure 5, so the feature of embodiment 4 is made N-type electrode (11) and P type electrode (9) that diagonal angle arranges on the basis at high pressure chip, manufacturing process is: 1, form after high pressure chip basic structure, make a pair of to corner electrode by ICP on high pressure chip; 2, after further processing, make phosphor powder layer and carry out spot welding.

That in above-described embodiment and specification, describes just illustrates principle of the present utility model and most preferred embodiment; do not departing under the prerequisite of the utility model spirit and scope; the utility model also has various changes and modifications, and these changes and improvements all fall within the scope of claimed the utility model.

Claims

1. a packed LED chip of exempting from bonding wire, is characterized in that: comprising:

-phosphor powder layer, is formed on extension chip;

-separator, is formed at upside and the surrounding of extension chip;

2. packed LED chip of exempting from bonding wire according to claim 1, is characterized in that: the consistent or difference in height of N-type electrode height, P type electrode height, phosphor powder layer height be LED gross thickness 5% within.

3. packed LED chip of exempting from bonding wire according to claim 1, is characterized in that: described separation layer thickness is between 0.5 micron-30 microns.

4. according to the packed LED chip of exempting from bonding wire described in claim 1 or 3, it is characterized in that: described separator is silicon dioxide, silicon nitride or polyimide material.