CN203588108U - High-stability voltage regulator - Google Patents
High-stability voltage regulator Download PDFInfo
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- CN203588108U CN203588108U CN201320683188.5U CN201320683188U CN203588108U CN 203588108 U CN203588108 U CN 203588108U CN 201320683188 U CN201320683188 U CN 201320683188U CN 203588108 U CN203588108 U CN 203588108U
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Abstract
The utility model provides a voltage regulator. The voltage regulator comprises an output circuit, an output capacitance detecting circuit and a feedback loop control circuit. The output circuit is provided with an input end, an output end and a power tube connected between the input end and the output end, the power circuit controls the power tube to convert the input voltage received from the input end into the output voltage of the output end, and an output capacitor is connected between the output end and the ground in series. The output capacitance detecting circuit is used for determining the output capacitance of the output capacitor connected with the output end based on the detected output voltage and outputting corresponding selection signals according to the output capacitance. The feedback loop control circuit is used for outputting a control signal to the power tube according to the output voltage and adjusting an internal compensation structure according to the selection signals. Compared with the prior art, the voltage regulator can adjust different compensation structures or the compensation capacitances according to different output capacitances, wherein the different compensation structures are selected by detecting and judging the output capacitances, and therefore the compatibility for the wider output capacitance range can be achieved.
Description
[technical field]
The utility model relates to circuit design field, particularly a kind of high stability voltage regulator.
[background technology]
In prior art, the stability of voltage regulator is all can stablize for the output capacitance value of certain limit.If output capacitance exceedes certain limit, cannot stablize.Because modern electronic equipment becomes increasingly complex, in order to improve the compatibility of various electronic equipments, voltage regulator may be connected to different being powered on equipment, and the voltage regulator equivalent output capacitance size producing for different power-supply units may be widely different.So can realize better compatible voltage regulator, be more and more subject to consumer's favor.USB (the Universal Serial Bus) output of for example automobile, may be connected on the bluetooth earphone that equivalent output capacitance is less, also can be connected to the panel computer that equivalent output capacitance is larger, even in non-loaded vacant state (equivalent output capacitance is very little, approaches and can ignore).Conventionally the design that compatible less output capacitance is stable is may required capacitance less, and the stable design of compatible larger output capacitance is may required capacitance larger, cannot by a kind of internal compensation capacitance, be realized completely.The compensation method of compatible less output capacitance is often designed to inherent pole the dominant pole of feedback control loop in addition, and the dominant pole of feedback control loop is often exported limit by outside and is designed in the compensation method of compatible larger output capacitance.
Therefore the high stability voltage regulator that, is necessary to provide a kind of compatibility and adapts to larger output capacitance scope.
[utility model content]
The purpose of this utility model is to provide voltage regulator, and it can all have higher stability in larger output capacitance scope.
In order to address the above problem, the utility model provides a kind of voltage regulator, it comprises: output circuit, its there is input end, output terminal and be connected in input end and output terminal between power tube, by controlling described power tube, the input voltage receiving from input end is converted to the output voltage of output terminal, output capacitance is series between the output terminal and ground of output circuit; Output capacitance testing circuit, the output voltage of its output terminal based on detecting is determined the size of the output capacitance of described output terminal connection, and the corresponding signal of selecting of the output of the size based on described output capacitance; Feedback loop control circuit, according to the output voltage of output terminal, export control signal to described power tube, to realize the regulation and control of output voltage to output terminal, it also adjusts inner collocation structure to make this feedback loop control circuit can compatible described output capacitance according to selection signal of described output capacitance testing circuit output in addition.
Further, described voltage regulator also comprises the Enable Pin of current potential holding circuit and reception enable signal,
Described current potential holding circuit is connected with described Enable Pin, described output capacitance testing circuit is connected with described Enable Pin, at described enable signal, be invalid, described current potential holding circuit is defined as fixing current potential by the output voltage of described output terminal, at described enable signal while being effective, described current potential holding circuit is inoperative to the output voltage of described output terminal, at described enable signal, by invalid saltus step, be in a period of time after effectively, described output capacitance testing circuit cuts off the control of described feedback loop control circuit to described power tube, and control described power tube and charge to described output capacitance with scheduled current, described output capacitance testing circuit is detecting the output voltage of output terminal during this period of time afterwards, and itself and predetermined voltage threshold are compared to judge the size of described output capacitance.
Further, described current potential holding circuit comprises the switch S 3 between output terminal and the ground that is connected to described output circuit, when described enable signal is invalid, described switch S 3 conductings, the output voltage of the output terminal of described output circuit is defined as to ground level, when described enable signal is effective, described switch S 3 is turn-offed, and the output voltage of the output terminal of described output circuit is no longer subject to earthy restriction.
Further, described output capacitance testing circuit comprises output capacitance detecting unit and logic control circuit,
Described output capacitance detecting unit is when detecting that described enable signal is effective by invalid saltus step, output continues effective switching signal of the schedule time, when this switching signal is effective, described logic control circuit cuts off the control end of described power tube and the path of described feedback loop control circuit, and the control end of described power tube is connected on a bias voltage of described output capacitance detecting unit output, now under the driving of described bias voltage, on described power tube, flow through scheduled current to described output capacitance charging, described output capacitance detecting unit detects the output voltage at described output terminal, and according to the output voltage of the described output terminal of the effectual time of described switching signal, judge the size of described output capacitance, when described switching signal is invalid, described logic control circuit cuts off the path of the control end of bias voltage that described output capacitance detecting unit provides and described power tube, and connect the path of the control end of described feedback loop control circuit and described power tube, now described feedback loop control circuit is exported the control end of control signal to described power tube according to the output voltage of described output terminal, to realize the regulation and control of the output voltage to output terminal.
Further, when described switching signal is invalid signals by useful signal saltus step, the output voltage of described output capacitance detecting unit based on described output terminal and the comparative result of predetermined voltage threshold, the corresponding signal of selecting of output, described feedback loop control circuit selectively accesses a building-out capacitor described feedback loop control circuit according to the selection signal of described output capacitance detecting unit output and maybe this building-out capacitor is removed from described feedback loop control circuit.
Further, described feedback loop control circuit comprises: the output voltage of the output terminal of the described output circuit of sampling obtains the bleeder circuit of sampled voltage; Based on the error amplifying circuit of branch pressure voltage and the first reference voltage output control signal, in described error amplifying circuit, include described building-out capacitor.
Further, described output capacitance detecting unit comprises delay circuit, the first phase inverter, second and door, comparer, the second phase inverter and d type flip flop, the input end of described delay circuit receives described enable signal, the input end of output termination first phase inverter of described delay circuit, the output terminal of the first phase inverter is connected with an input end of door with second, second receives described enable signal with the second input end of door, and second exports described switching signal with the output terminal of door; The output terminal of output circuit described in one termination of described comparer, another connects the second reference voltage, the input end d of its output termination d type flip flop, second is connected the clock end of described d type flip flop with the output terminal of door, described enable signal is connected with the reset terminal r of described d type flip flop via the second phase inverter, and the output terminal q of described d type flip flop exports described selection signal.
Further, described building-out capacitor and a selector switch are series between the output terminal and input voltage of described error amplifying circuit, the turn-on and turn-off of selector switch described in described selection signal controlling.
Further, described power tube is MOS transistor, the input end that the source electrode of described MOS transistor is described output circuit, the output terminal that its drain electrode is described output circuit.
Further, described logic control circuit comprises phase inverter INV1, a gauge tap S5 and S6, one end of described gauge tap S5 connects the control end of described power tube, the other end connects the output terminal of described feedback loop control circuit, one end of described gauge tap S6 connects the control end of described power tube, the other end receives the bias voltage PB of described output capacitance detecting unit, described switching signal is connected with the control end of described gauge tap S5 via phase inverter INV1, and described switching signal is directly connected with described gauge tap S6.
Compared with prior art, the utility model provides a kind of voltage regulator, it is adjusted and different by detection, judges the size that the size of output capacitance is selected different collocation structures or adjusted building-out capacitor according to different output capacitances, thereby realizes the compatibility to wider output capacitance scope.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the utility model embodiment, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.Wherein:
Fig. 1 is high stability voltage regulator in the utility model structural representation in one embodiment;
Fig. 2 is the electrical block diagram in one embodiment of the output capacitance detecting unit shown in Fig. 1;
Fig. 3 is the electrical block diagram of the error amplifying circuit with building-out capacitor able to programme shown in Fig. 1.
[embodiment]
For above-mentioned purpose of the present utility model, feature and advantage can be become apparent more, below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Alleged " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the utility model herein.Different local in this manual " in one embodiment " that occur not all refer to same embodiment, neither be independent or the embodiment mutually exclusive with other embodiment optionally.Unless stated otherwise, the word that connection herein, the expression that is connected, joins are electrically connected all represents to be directly or indirectly electrical connected.
Please refer to shown in Fig. 1, it is the circuit diagram of the utility model high stability voltage regulator in one embodiment.Described voltage regulator comprises output circuit 110 and the feedback loop control circuit 120 with power tube.Described output circuit 110 there is input end, output terminal and be connected in input end and output terminal between power tube, by controlling described power tube, the input voltage VIN receiving from input end is converted to the output voltage VO of output terminal.An output capacitance C2 is series between the output terminal and ground of described output circuit.Described feedback loop control circuit 120 is exported control signal to described power tube, to realize the regulation and control of the output voltage VO to output terminal according to the output voltage VO of output terminal.
In the embodiment shown in fig. 1, described voltage regulator 110 is low difference voltage regulator (LDO), described output circuit 110 comprises power tube MP2, this power tube MP2 is PMOS (P-channel Metal Oxide Semiconductor) transistor, its source electrode receives input voltage VIN as input end, and its drain electrode obtains described output voltage VO as output terminal.Described feedback loop control circuit 120 comprises that the output voltage VO of the output terminal of the described output circuit of sampling obtains the bleeder circuit of sampled voltage VC; Based on the error amplifying circuit EA of branch pressure voltage VC and the first reference voltage VR output control signal.The control signal of described error amplifying circuit output is connected to the transistorized grid of described PMOS, for controlling the electric current flowing through on it.
Voltage regulator in the utility model also includes output capacitance testing circuit (131 and 132), its can be based on detecting the output voltage VO of output terminal determine the size of the output capacitance C2 that described output terminal connects, and the size based on described output capacitance is selected the corresponding signal SEL that selects.Accordingly, described feedback loop control circuit 120 can be adjusted its inner collocation structure to make this feedback loop control circuit 120 can compatible described output capacitance according to the selection signal SEL of described output capacitance testing circuit output, thereby can realize the more compatibility of wide range output electric capacity.Voltage regulator of the present utility model is realized the high stable of larger output capacitance scope, and best desirable effect is that compatible OCL output capacitance-less is to infinitely great output capacitance value.
In one embodiment, described voltage regulator also comprises the Enable Pin of current potential holding circuit 140 and reception enable signal EN.Described current potential holding circuit 140 is connected with described Enable Pin, and described output capacitance testing circuit is connected with described Enable Pin.At described enable signal EN, be invalid, described current potential holding circuit 140 is defined as fixing current potential by the output voltage of described output terminal, and at described enable signal EN, while being effective, described current potential holding circuit 140 is inoperative to the output voltage of described output terminal.Simultaneously, at described enable signal, by invalid saltus step, be that a period of time after is effectively (such as T1, can determine as required) in, described output capacitance testing circuit cuts off the control of described feedback loop control circuit 120 to described power tube, and control described power tube and charge to described output capacitance C2 with scheduled current (such as I2), described output capacitance testing circuit is detecting the output voltage of output terminal during this period of time afterwards, and itself and predetermined voltage threshold are compared to judge the size of described output capacitance C2, and export accordingly the corresponding signal of selecting.
Specifically, described current potential holding circuit 140 comprises the switch S 3 between output terminal and the ground that is connected to described output circuit 110, when described enable signal is invalid, described switch S 3 conductings, the output voltage of the output terminal of described output circuit is defined as to ground level, when described enable signal is effective, described switch S 3 is turn-offed, and the output voltage of the output terminal of described output circuit is no longer subject to earthy restriction.Like this, while being effective at described enable signal by invalid saltus step, while being described voltage regulator startup, described power tube MP2 can give described output capacitance charging with scheduled current, finally according to the charging voltage of output capacitance, just can learn the size of described output capacitance, and finally can export corresponding selection signal, finally can make described feedback loop control circuit select corresponding collocation structure or building-out capacitor, thereby can adapt to wider output capacitance.
As shown in Figure 1, in one embodiment, described output capacitance testing circuit comprises output capacitance detecting unit 131 and logic control circuit 132.
Described output capacitance detecting unit 131 is when detecting that described enable signal EN is effective by invalid saltus step, output continues effective switching signal Ctrl of the schedule time, when this switching signal Ctrl is effective, described logic control circuit 132 cuts off the control end of described power tube MP2 and the path of described feedback loop control circuit 120, and the control end of described power tube MP2 is connected on the bias voltage PB that described output capacitance detecting unit 131 exports, now under the driving of described bias voltage PB, on described power tube MP2, flow through scheduled current to described output capacitance C2 charging.When described switching signal Ctrl is invalid signals by useful signal saltus step, the output voltage VO of described output capacitance detecting unit 131 based on described output terminal and the comparative result of predetermined voltage threshold, learn the size of described output capacitance, and signal SEL is selected in output accordingly accordingly, the selection signal that described feedback loop control circuit 120 is exported according to described output capacitance detecting unit 131 selectively accesses a building-out capacitor described feedback loop control circuit and maybe this building-out capacitor is removed from described feedback loop control circuit 120.
When described switching signal Ctrl is invalid, described logic control circuit 132 cuts off the path of the control end of bias voltage that described output capacitance detecting unit provides and described power tube, and connect the path of the control end of described feedback loop control circuit and described power tube, now described feedback loop control circuit is exported the control end of control signal to described power tube according to the output voltage of described output terminal, to realize the regulation and control of the output voltage to output terminal, now described feedback loop control circuit has been adjusted the building-out capacitor of coupling according to output capacitance, thereby can obtain higher stability.
In the specific embodiment shown in Fig. 1, described logic control circuit 132 comprises phase inverter INV1, a gauge tap S5 and S6, one end of described gauge tap S5 connects the control end of described power tube MP2, the other end connects the output terminal of described error amplifying circuit, one end of described gauge tap S6 connects the control end of described power tube MP2, and the other end receives the bias voltage PB of described output capacitance detecting unit 131.
In an embodiment shown in Fig. 1, the building-out capacitor able to programme in described feedback loop control circuit 120 is arranged in error amplifying circuit EA.Fig. 3 shows the physical circuit figure of the error amplifying circuit with building-out capacitor able to programme.As shown in Figure 3, described error amplifying circuit includes PMOS transistor MP1, MP2, MP3, MP4, nmos pass transistor MN1, MN2, MN3, MN4, and current source I5, the output terminal that wherein intermediate node of MOS transistor MP2 and MN4 is this error amplifying circuit.The difference of the structure of this error amplifying circuit is, it also includes and is series at a selector switch S7 and building-out capacitor Cc able to programme between the output terminal of described error amplifying circuit and input voltage, the turn-on and turn-off of selector switch S7 described in the selection signal controlling that described output capacitance detecting unit 131 is exported, when its conducting, described compensating circuit Cc is access in described error amplifying circuit, when it turn-offs, described building-out capacitor Cc is removed out in described error amplifying circuit, thereby changed collocation structure, make the feedback loop control circuit 120 can compatible wider output capacitance.
Fig. 2 is the electrical block diagram in one embodiment of the output capacitance detecting unit shown in Fig. 1.As shown in Figure 2, described output capacitance detecting unit 131 comprises delay circuit Delay, the first phase inverter INV3, second and door And2, comparer 1, the second phase inverter INV4 and d type flip flop DFF1.The input end of described delay circuit Delay receives described enable signal EN, the input end of the output termination first phase inverter INV3 of described delay circuit, the output terminal of the first phase inverter INV3 is connected with an input end of door And2 with second, second receives described enable signal EN with the second input end of door And2, second exports described switching signal Ctrl with the output terminal of door And2, and this switching signal is a pulse signal.The output terminal VO of output circuit described in one termination of described comparer 1, another meets the second reference voltage V2, the input end d of its output termination d type flip flop DFF1, second is connected the clock end clk of described d type flip flop DFF1 with the output terminal of door, described enable signal is connected with the reset terminal r of described d type flip flop via the second phase inverter INV4, and the output terminal q of described d type flip flop exports described selection signal SEL.Described output capacitance detecting unit 131 also includes the biasing circuit that bias voltage PB is provided, and this circuit comprises PMOS transistor MP5 and current source I1.Ctrl signal is that rising edge aligns with the rising edge of input signal EN, and pulse width equals the time delay that delay circuit Delay produces.Comparer 1 compares the size of output voltage VO and reference voltage V2, and D-trigger DFF1 is latched into output signal SEL by the output signal COMP1 of comparer in the value in Ctrl signal negative edge moment.When EN signal is low level, ENB is high level, now by D-trigger output zero clearing.
In the example of a concrete application, when EN is high level, voltage regulator is normally worked; When EN is low level, voltage regulator is in closed condition.Phase inverter INV2, switch S 3 guarantee that the output of each voltage regulator is all to start from no-voltage.The input signal of output capacitance detecting unit is EN and VO.When EN becomes high level from low level, in the rising edge moment of EN signal, produce switching signal Ctrl, Ctrl is a pulse signal, and its rising edge aligns with the rising edge of EN, and after the time delay of setting, Ctrl signal becomes low level.Be Ctrl signal be rising edge take EN signal as starting point, the pulse signal of the high level of set time length (this set time is made as T1).PB is for power tube MP2 provides bias voltage, and making power tube MP2 is that the charging current of output capacitance C2 is fixed value.When Ctrl signal is high level, switch S 5 is turned off, switch S 6 conductings, and now power tube MP2 output fixed current, charges to output capacitance C2.By the comparer in output capacitance detecting unit, compare in addition the size of output voltage VO and reference voltage V2.If VO, lower than the reference voltage of setting, illustrates that output capacitance is greater than setting value; If VO voltage is greater than the reference voltage V2 of setting, illustrate that output capacitance is less than setting value.
Within the T1 time, the voltage of output capacitance charging is met:
VO.Co=I2.T1
Wherein VO is the T1 output voltage values of finish time time, and Co is the capacitance of output capacitance C2, and I2 is the output current of MP2 in the T1 time, and T1 is that Ctrl is the time of high level.
So VO=I2.T1/Co.
Hence one can see that, and output capacitance is larger, and VO voltage is lower; Output capacitance is less, and output voltage is higher.
Reference voltage is V2, and corresponding VO equals the output capacitance Co=I2.T1/V2 of V2.
Those of ordinary skill in described field is understandable that, described voltage regulator can be also the voltage regulator of other types, such as step-up DC-DC(DC-to-dc) converter, buck DC-DC converter etc., their common feature is all to have output circuit to carry out voltage transitions and have feedback loop control circuit carrying out loop control, can be different along with dissimilar voltage regulator as for the mode of concrete voltage transitions and the mode of loop control, but the change of the change of voltage transitions mode and loop control does not affect the size based on output capacitance of the present utility model and adjusts the thinking of the compensating circuit in control loop and still can be suitable for.
In the utility model in the utility model, " connection ", be connected, word that the expression such as " company ", " connecing " is electrical connected, if no special instructions, represent direct or indirect electric connection.
It is pointed out that and be familiar with the scope that any change that person skilled in art does embodiment of the present utility model does not all depart from claims of the present utility model.Correspondingly, the scope of claim of the present utility model is also not limited only to previous embodiment.
Claims (10)
1. a voltage regulator, is characterized in that, it comprises:
Output circuit, its there is input end, output terminal and be connected in input end and output terminal between power tube, by controlling described power tube, the input voltage receiving from input end is converted to the output voltage of output terminal, output capacitance is series between the output terminal and ground of output circuit;
Output capacitance testing circuit, the output voltage of its output terminal based on detecting is determined the size of the output capacitance of described output terminal connection, and the corresponding signal of selecting of the output of the size based on described output capacitance;
Feedback loop control circuit, according to the output voltage of output terminal, export control signal to described power tube, to realize the regulation and control of output voltage to output terminal, it also adjusts inner collocation structure to make this feedback loop control circuit can compatible described output capacitance according to selection signal of described output capacitance testing circuit output in addition.
2. voltage regulator according to claim 1, is characterized in that, the Enable Pin that it also comprises current potential holding circuit and receives enable signal,
Described current potential holding circuit is connected with described Enable Pin, described output capacitance testing circuit is connected with described Enable Pin, at described enable signal, be invalid, described current potential holding circuit is defined as fixing current potential by the output voltage of described output terminal, at described enable signal while being effective, described current potential holding circuit is inoperative to the output voltage of described output terminal
At described enable signal, by invalid saltus step, be in a period of time after effectively, described output capacitance testing circuit cuts off the control of described feedback loop control circuit to described power tube, and control described power tube and charge to described output capacitance with scheduled current, described output capacitance testing circuit is detecting the output voltage of output terminal during this period of time afterwards, and itself and predetermined voltage threshold is compared to judge the size of described output capacitance.
3. voltage regulator according to claim 2, it is characterized in that, described current potential holding circuit comprises the switch S 3 between output terminal and the ground that is connected to described output circuit, when described enable signal is invalid, described switch S 3 conductings, are defined as ground level by the output voltage of the output terminal of described output circuit, when described enable signal is effective, described switch S 3 is turn-offed, and the output voltage of the output terminal of described output circuit is no longer subject to earthy restriction.
4. voltage regulator according to claim 3, is characterized in that, described output capacitance testing circuit comprises output capacitance detecting unit and logic control circuit,
Described output capacitance detecting unit is when detecting that described enable signal is effective by invalid saltus step, output continues effective switching signal of the schedule time, when this switching signal is effective, described logic control circuit cuts off the control end of described power tube and the path of described feedback loop control circuit, and the control end of described power tube is connected on a bias voltage of described output capacitance detecting unit output, now under the driving of described bias voltage, on described power tube, flow through scheduled current to described output capacitance charging, described output capacitance detecting unit detects the output voltage at described output terminal, and according to the output voltage of the described output terminal of the effectual time of described switching signal, judge the size of described output capacitance,
When described switching signal is invalid, described logic control circuit cuts off the path of the control end of bias voltage that described output capacitance detecting unit provides and described power tube, and connect the path of the control end of described feedback loop control circuit and described power tube, now described feedback loop control circuit is exported the control end of control signal to described power tube according to the output voltage of described output terminal, to realize the regulation and control of the output voltage to output terminal.
5. voltage regulator according to claim 4, is characterized in that,
When described switching signal is invalid signals by useful signal saltus step, the output voltage of described output capacitance detecting unit based on described output terminal and the comparative result of predetermined voltage threshold, the corresponding signal of selecting of output, described feedback loop control circuit selectively accesses a building-out capacitor described feedback loop control circuit according to the selection signal of described output capacitance detecting unit output and maybe this building-out capacitor is removed from described feedback loop control circuit.
6. voltage regulator according to claim 5, is characterized in that, described feedback loop control circuit comprises:
The output voltage of output terminal of described output circuit of sampling obtains the bleeder circuit of sampled voltage;
Based on the error amplifying circuit of branch pressure voltage and the first reference voltage output control signal,
In described error amplifying circuit, include described building-out capacitor.
7. voltage regulator according to claim 6, is characterized in that, described output capacitance detecting unit comprises delay circuit, the first phase inverter, second and door, comparer, the second phase inverter and d type flip flop,
The input end of described delay circuit receives described enable signal, the input end of output termination first phase inverter of described delay circuit, the output terminal of the first phase inverter is connected with an input end of door with second, second receives described enable signal with the second input end of door, and second exports described switching signal with the output terminal of door;
The output terminal of output circuit described in one termination of described comparer, another connects the second reference voltage, the input end d of its output termination d type flip flop, second is connected the clock end of described d type flip flop with the output terminal of door, described enable signal is connected with the reset terminal r of described d type flip flop via the second phase inverter, and the output terminal q of described d type flip flop exports described selection signal.
8. voltage regulator according to claim 7, is characterized in that, described building-out capacitor and a selector switch are series between the output terminal and input voltage of described error amplifying circuit, the turn-on and turn-off of selector switch described in described selection signal controlling.
9. voltage regulator according to claim 1, is characterized in that, described power tube is MOS transistor, the input end that the source electrode of described MOS transistor is described output circuit, the output terminal that its drain electrode is described output circuit.
10. voltage regulator according to claim 4, it is characterized in that, described logic control circuit comprises a phase inverter INV1, gauge tap S5 and S6, one end of described gauge tap S5 connects the control end of described power tube, the other end connects the output terminal of described feedback loop control circuit, one end of described gauge tap S6 connects the control end of described power tube, the other end receives the bias voltage PB of described output capacitance detecting unit, described switching signal is connected with the control end of described gauge tap S5 via phase inverter INV1, described switching signal is directly connected with described gauge tap S6.
Priority Applications (1)
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|---|---|---|---|
| CN201320683188.5U CN203588108U (en) | 2013-10-31 | 2013-10-31 | High-stability voltage regulator |
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| CN201320683188.5U CN203588108U (en) | 2013-10-31 | 2013-10-31 | High-stability voltage regulator |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103529895A (en) * | 2013-10-31 | 2014-01-22 | 无锡中星微电子有限公司 | High-stability voltage regulator |
| US10389225B2 (en) | 2015-09-07 | 2019-08-20 | Byd Company Limited | Switching power supply, primary control chip and loop compensation device thereof |
-
2013
- 2013-10-31 CN CN201320683188.5U patent/CN203588108U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103529895A (en) * | 2013-10-31 | 2014-01-22 | 无锡中星微电子有限公司 | High-stability voltage regulator |
| US10389225B2 (en) | 2015-09-07 | 2019-08-20 | Byd Company Limited | Switching power supply, primary control chip and loop compensation device thereof |
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