CN215340043U - Switching power supply low current detection circuit - Google Patents
Switching power supply low current detection circuit Download PDFInfo
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- CN215340043U CN215340043U CN202121779712.XU CN202121779712U CN215340043U CN 215340043 U CN215340043 U CN 215340043U CN 202121779712 U CN202121779712 U CN 202121779712U CN 215340043 U CN215340043 U CN 215340043U
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Abstract
The utility model relates to the technical field of switching power supplies, in particular to a switching power supply small current detection circuit, which comprises a display screen; the filter capacitor COUT is connected with two ends of the switching power supply; the voltage sampling circuit is connected with two ends of the filter capacitor COUT and used for collecting voltage signals; a first comparator COMP1, wherein one input end of the first comparator COMP1 is connected to the FB signal end of the voltage sampling circuit, and the other two input ends of the first comparator COMP1 are respectively connected to the corresponding reference voltage REFH and REFL ends; and the PULSE conversion circuit is connected with the output end of the first comparator COMP1 and is used for converting the PULSE signal output by the first comparator COMP1 into a RAMP voltage signal.
Description
Technical Field
The utility model relates to the technical field of switching power supplies, in particular to a switching power supply small current detection circuit.
Background
In the application of a switching power supply powered by batteries such as a mobile power supply and a Bluetooth headset charging box, because the capacity of the battery is limited, the switching power supply system needs to be closed after the output load current is reduced to a certain value, so that the power consumption of the system is reduced, and the standby time of the products is prolonged.
The prior art generally has two modes to detect whether the load current of the switching power supply is lower than a set critical value, the first mode is to directly string a precise power resistor in a load path and directly detect the voltage on the power resistor to realize the method, and the method has several disadvantages that firstly, the precise power resistor is expensive and increases the system cost, secondly, the power resistor has larger power loss and reduces the system efficiency, thirdly, under the condition of small current, the voltage drop of the power resistor is very small, a high-precision comparator is needed to detect the voltage of the resistor, and the design difficulty and the cost of a detection circuit are increased. The second way is to determine the output voltage drop rate in the turn-off period TOFF by detecting the output voltage drop rate of the switching power supply in burst mode, that is, the output voltage drop rate is determined by detecting the output voltage drop rate in the turn-off period TOFF
The method has the disadvantages that the current critical value is in direct proportion to the capacitance value of the capacitor COUT, and when different COUT capacitance values are selected according to scheme characteristics in different application schemes, the current critical value has to change along with the change of the COUT capacitance value.
Disclosure of Invention
The utility model aims to provide a switching power supply low current detection circuit, which aims to solve the problems that a current critical value is in direct proportion to the capacitance value of a capacitor COUT, and the current critical value has to change along with the change of the COUT capacitance value when different COUT capacitance values are selected according to scheme characteristics in different application schemes.
In order to achieve the above object, the present invention is widely applied to a technical scheme of small current detection, and particularly provides the following technical scheme: a switching power supply small current detection circuit comprises;
the filter capacitor COUT is connected with two ends of the switching power supply;
the voltage sampling circuit is connected with two ends of the filter capacitor COUT and used for collecting voltage signals;
a first comparator COMP1, wherein one input end of the first comparator COMP1 is connected to the FB signal end of the voltage sampling circuit, and the other two input ends of the first comparator COMP1 are respectively connected to the corresponding reference voltage REFH and REFL ends;
the PULSE conversion circuit is connected with the output end of the first comparator COMP1 and is used for converting the PULSE signal output by the first comparator COMP1 into a RAMP voltage signal;
a second comparator COMP2, an output terminal of the second comparator COMP2 is connected to an output terminal of the pulse conversion circuit, and another output terminal is connected to another reference voltage REF 3;
and the delay circuit is connected with the output end of the second comparator COMP2 and is used for outputting a low-current signal.
Preferably, the voltage sampling circuit comprises a circuit formed by a resistor R1 and a resistor R2 or a sampling circuit formed by an integrated circuit.
Preferably, the pulse conversion circuit comprises a pulse conversion circuit consisting of a current source I1, a current source I2, a PMOS transistor MP1, an NMOS transistor MN1 and a capacitor C1.
Preferably, one end of the current source I2 is connected to an external power supply VDD, the other end of the current source I2 is connected to a source of a PMOS transistor MP1, a drain of the PMOS transistor MP1 is connected to a source of an NMOS transistor MN1, and is respectively connected to one end of a capacitor C1 and an input end of a second comparator COMP 2; the drain of the NMOS transistor MN1 is connected to the other end of the capacitor C1, and is grounded via the current source I1, and the gate of the PMOS transistor MP1 and the gate of the NMOS transistor MN1 are both connected to the output terminal of the first comparator COMP 1.
Preferably, the current magnitudes of the current source I1 and the current source I2 are set in proportion to each other, so as to adjust the required small current detection threshold value.
The control method of the small current according to the above circuit comprises the steps of:
step S1; the critical value of the required small current detection is adjusted by setting the proportion of the current source I1 and the current source I2;
step S2; when the output load current of the switching power supply is smaller, the switching power supply works in a burst mode, and the working period of the switching power supply is a normal switching period TON and an off period TOFF;
during the TON phase, the current source I1 discharges the capacitor C1, so that the RAMP voltage decreases by the following value:
during the TOFF phase, current source I2 charges capacitor C1 such that the RAMP voltage increase is:
step S3; in the stage of loading small current, setting the small current in a small current stage I and a small current stage II according to different load currents;
step S4; in the small-current stage, when the switching power supply TON > TOFF, that is, K ═ TON/TOFF >1, as can be seen from the calculation formulas of Δ V1 and Δ V2, the RAMP voltage decrease value Δ V1 is greater than the RAMP voltage increase value Δ V2 in each period, so that the RAMP voltage is always lower than the reference voltage REF3, and the second comparator COMP2 outputs a low level, the switching power supply continues to operate in the current state;
step S5; in the second stage of low current, when the switching power supply TON < TOFF, that is, K is TON/TOFF <1, as can be seen from the above calculation formulas of Δ V1 and Δ V2, the RAMP voltage decrease value Δ V1 is smaller than the RAMP voltage increase value Δ V2 in each period, so the RAMP voltage gradually increases, and when the RAMP voltage is greater than the reference voltage REF3, the second comparator COMP2 outputs high level, so the low current signal output is valid, and the switching power supply is controlled to be turned off.
Preferably, in step S3, if the load current in the first low-current stage is greater than the threshold for current detection, and the load current in the second low-current stage is less than the threshold for current detection, the currents of the current source I1 and the current source I2 are equal;
otherwise, when the load current in the first small current stage is smaller than the threshold of current detection and the load current in the second small current stage is larger than the threshold of current detection, the currents of the current source I1 and the current source I2 are not equal.
Preferably, in the step S4, the second comparator COMP2 outputs a low level, the influence of the load current variation in a short time is filtered by the delay circuit, and after the delay of the delay circuit, the low current signal is also output as low, that is, the low current signal is invalid.
Preferably, in the step S5, the second comparator COMP2 outputs a high level, and after the delay of the delay circuit, the low current signal is output as high, that is, the low current signal is active.
Compared with the prior art, the utility model has the beneficial effects that:
the output voltage waveform of the switching power supply is converted into a PULSE signal with the proportion of K to TON/TOFF, and whether the output current of the switching power supply is lower than a set critical value is judged by judging the value of K; the method does not need a traditional precision power detection resistor and a high-precision comparator, the detection current critical value is irrelevant to the capacitance value of the output filter capacitor of the switching power supply, and meanwhile, the working state of the switching power supply can be controlled by a small current control method.
Drawings
Fig. 1 is a schematic diagram of a switching power supply low current detection circuit of the utility model:
FIG. 2 is a flow chart of a small current control method according to the present invention;
FIG. 3 is a diagram of a low current stage I and a low current stage II according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-3, an embodiment of the present invention is shown:
a switch power supply low current detection circuit comprises a switch power supply output filter capacitor COUT 1 and a low current detection unit 2;
the voltage sampling circuit 201 is connected with two ends of the filter capacitor COUT and used for collecting voltage signals;
a first comparator COMP 1202, wherein one input end of the first comparator COMP 1202 is connected with the FB signal end of the voltage sampling circuit 201, and the other two input ends of the first comparator COMP 1202 are respectively connected with corresponding reference voltage REFH and REFL ends;
the PULSE conversion circuit 203 is connected with the output end of the first comparator COMP 1202, and the PULSE conversion circuit 203 is used for converting the PULSE signal output by the first comparator COMP 1202 into a RAMP voltage signal;
a second comparator COMP 2204, wherein an output terminal of the second comparator COMP 2204 is connected with an output terminal of the pulse converting circuit 203, and another output terminal is connected with another reference voltage REF 3;
and the delay circuit 205, wherein the delay circuit 205 is connected with an output end of the second comparator COMP 2204 and is used for outputting a low-current signal.
The voltage sampling circuit 201 comprises a circuit formed by a resistor R1 and a resistor R2 or a sampling circuit formed by an integrated circuit.
The pulse conversion circuit 203 comprises a pulse conversion circuit 203 consisting of a current source I1, a current source I2, a PMOS transistor MP1, an NMOS transistor MN1 and a capacitor C1.
One end of the current source I2 is connected to an external power supply VDD, the other end of the current source I2 is connected to a source of a PMOS transistor MP1, a drain of the PMOS transistor MP1 is connected to a source of an NMOS transistor MN1, and is respectively connected to one end of a capacitor C1 and an input end of a second comparator COMP 2204; the drain of the NMOS transistor MN1 is connected to the other end of the capacitor C1, and is grounded via the current source I1, and the gate of the PMOS transistor MP1 and the gate of the NMOS transistor MN1 are both connected to the output terminal of the first comparator COMP 1202.
The current magnitude proportion of the current source I1 and the current source I2 is set for adjusting the required small current detection critical value.
For the description, taking the current source I1 equal to the current source I2 as an example, referring to fig. 1 and fig. 3, when the output load current of the switching power supply is large, the output voltage VOUT is a direct current voltage, there is no low-frequency triangular wave, the FB voltage detected by the sampling circuit is always lower than the input reference voltages REFH and REFL of the first comparator COMP 1202, PULSE is always high, the NMOS transistor MN1 is turned on, the PMOS transistor MP1 is turned off, the current source I1 discharges the positive electrode RAMP of the capacitor C1 through MN1, RAMP is always low, the second comparator COMP 2204 outputs low, the output low current signal of the delay circuit 205 is also always low, the low current signal is invalid, and the system is always in a working state.
Referring to fig. 2 and 3, a switching power supply low current control method includes the following steps:
step S1; the critical value of the required small current detection is adjusted by setting the proportion of the current source I1 and the current source I2;
step S2; when the output load current of the switching power supply is smaller, the switching power supply works in a burst mode, and the working period of the switching power supply is a normal switching period TON and an off period TOFF;
during the TON phase, the current source I1 discharges the capacitor C1, so that the RAMP voltage decreases by the following value:
during the TOFF phase, current source I2 charges capacitor C1 such that the RAMP voltage increase is:
step S3; in the stage of loading small current, setting the small current in a small current stage I and a small current stage II according to different load currents;
step S4; in the small current stage, when the switching power supply TON > TOFF, that is, K is TON/TOFF >1, as can be seen from the calculation formulas of Δ V1 and Δ V2, the RAMP voltage decrease value Δ V1 is greater than the RAMP voltage increase value Δ V2 in each period, so that the RAMP voltage is always lower than the reference voltage REF3, and the second comparator COMP 2204 outputs a low level, the switching power supply continues to operate in the current state;
step S5; in the second stage of low current, when the switching power supply TON < TOFF, i.e. K is TON/TOFF <1, as can be seen from the above calculation formulas of Δ V1 and Δ V2, the RAMP voltage decrease value Δ V1 is smaller than the RAMP voltage increase value Δ V2 in each period, so the RAMP voltage gradually increases, and when the RAMP voltage is greater than the reference voltage REF3, the second comparator COMP 2204 outputs high level, so the low current signal output is valid, and the switching power supply is controlled to be turned off.
In step S3, if the load current in the low current stage I is greater than the threshold for current detection, and the load current in the low current stage I is less than the threshold for current detection, the currents of the current source I1 and the current source I2 are equal;
otherwise, when the load current in the first small current stage is smaller than the threshold of current detection and the load current in the second small current stage is larger than the threshold of current detection, the currents of the current source I1 and the current source I2 are not equal.
In the step S4, the second comparator COMP 2204 outputs a low level, the delay circuit 205 filters the effect of the load current variation for a short time, and after the delay of the delay circuit 205, the low current signal is also output as low, that is, the low current signal is invalid.
In the step S5, the second comparator COMP 2204 outputs a high level, and after the delay of the delay circuit 205, the low current signal is output as high, that is, the low current signal is active.
Referring to fig. 3, specifically, when the output load current of the switching power supply is small, the switching power supply operates in a burst mode, the operating period of the switching power supply is divided into a normal switching period TON and an off period TOFF, the output voltage VOUT is a triangular wave, and after the VOUT voltage is sampled by the sampling circuit, the FB voltage is also a triangular wave after the VOUT voltage is divided by the resistors R1 and R2.
In the TON period, the switching power supply normally switches on and off, because the load current is very small, the output voltage VOUT gradually rises, and the sampling voltage FB also rises, when the FB voltage is higher than the input reference voltage REFH of the first comparator COMP 1202, the switching power supply is switched from the TON period to the TOFF period, PULSE becomes low level, the NMOS transistor MN1 is turned off, the PMOS transistor MP1 is turned on, the current source I2 passes, the PMOS transistor MP1 charges the positive electrode RAMP of the capacitor C1, and the RAMP voltage gradually rises;
meanwhile, in the TOFF period, the switching power supply stops switching, the output voltage VOUT is maintained by the capacitor COUT, the VOUT voltage gradually drops, and the sampling voltage FB also drops along with the output voltage VOUT;
when the FB voltage is lower than the input reference voltage REFL of the first comparator COMP 1202, the switching power supply shifts from the TOFF period to the TON period, PULSE becomes high, the NMOS transistor MN1 is turned on, the PMOS transistor MP1 is turned off, and the current source I1 discharges the positive electrode RAMP of the capacitor C1 through MN 1.
During the TON phase, I1 discharges the capacitor C1 such that the RAMP voltage decreases by the value:
during the TOFF phase, I2 charges capacitor C1 such that the RAMP voltage increase is:
in the stage of low load current, according to different load current sizes, the ratio of TON to TOFF is different, the smaller the current is, the smaller TON is, and the larger TOFF is, so as to better explain the detection principle of the utility model, the stage of low load current is divided into 2 stages for explanation;
the load current in the first small current stage is greater than the current detection threshold, and the load current in the second small current stage is less than the current detection threshold, since the current of the current source I1 is set equal to the current of the current source I2,
in the low current stage I; TON > TOFF, that is, K is TON/TOFF >1, as can be seen from the above calculation formulas of Δ V1 and Δ V2, the RAMP voltage decrease value Δ V1 is greater than the RAMP voltage increase value Δ V2 every period, so the RAMP voltage is always lower than the reference voltage REF3, the second comparator COMP 2204 outputs a low level, in order to filter out the influence of the load current change in a short time, the delay circuit 205 is added, after the delay of the delay circuit 205, the low current signal is also output as a low current, that is, the low current signal is invalid, and the switching power supply continues to operate in the current state.
In the low-current stage i, TON < TOFF, that is, K is TON/TOFF <1, as can be seen from the above calculation formulas of Δ V1 and Δ V2, the RAMP voltage decrease value Δ V1 is smaller than the RAMP voltage increase value Δ V2 in each period, so the RAMP voltage gradually increases, when the RAMP voltage is greater than the reference voltage REF3, the second comparator COMP 2204 outputs a high level, and after the RAMP voltage is delayed by the delay circuit 205, the low-current signal is output high, that is, the low-current signal is valid, and the signal controls the switching power supply system to shut down.
It will be evident to those skilled in the art that the utility model is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the utility model being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (5)
1. A switching power supply small current detection circuit is characterized in that: the method comprises the following steps:
the filter capacitor COUT is connected with two ends of the switching power supply;
the voltage sampling circuit is connected with two ends of the filter capacitor COUT and used for collecting voltage signals;
a first comparator COMP1, wherein one input end of the first comparator COMP1 is connected to the FB signal end of the voltage sampling circuit, and the other two input ends of the first comparator COMP1 are respectively connected to the corresponding reference voltage REFH and REFL ends;
the PULSE conversion circuit is connected with the output end of the first comparator COMP1 and is used for converting the PULSE signal output by the first comparator COMP1 into a RAMP voltage signal;
a second comparator COMP2, an output terminal of the second comparator COMP2 is connected to an output terminal of the pulse conversion circuit, and another output terminal is connected to another reference voltage REF 3;
and the delay circuit is connected with the output end of the second comparator COMP2 and is used for outputting a low-current signal.
2. The switching power supply small current detection circuit according to claim 1, wherein: the voltage sampling circuit comprises a circuit formed by a resistor R1 and a resistor R2 or a sampling circuit formed by an integrated circuit.
3. The switching power supply small current detection circuit according to claim 1, wherein: the pulse conversion circuit comprises a pulse conversion circuit consisting of a current source I1, a current source I2, a PMOS transistor MP1, an NMOS transistor MN1 and a capacitor C1.
4. The switching power supply small current detection circuit according to claim 3, wherein: one end of the current source I2 is connected with an external power supply VDD, the other end of the current source I2 is connected with the source of a PMOS transistor MP1, the drain of the PMOS transistor MP1 is connected with the source of an NMOS transistor MN1, and is respectively connected with one end of a capacitor C1 and one input end of a second comparator COMP 2; the drain of the NMOS transistor MN1 is connected to the other end of the capacitor C1, and is grounded via the current source I1, and the gate of the PMOS transistor MP1 and the gate of the NMOS transistor MN1 are both connected to the output terminal of the first comparator COMP 1.
5. The switching power supply small current detection circuit according to claim 4, wherein: the current magnitude proportion of the current source I1 and the current source I2 is set for adjusting the required small current detection critical value.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113484590A (en) * | 2021-07-30 | 2021-10-08 | 深圳凌扬微电子有限公司 | Switching power supply small current detection circuit and switching power supply small current control method |
| WO2023138236A1 (en) * | 2022-01-20 | 2023-07-27 | 成都齐碳科技有限公司 | Current measurement circuit, current measurement method and nanopore sequencing apparatus |
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2021
- 2021-07-30 CN CN202121779712.XU patent/CN215340043U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113484590A (en) * | 2021-07-30 | 2021-10-08 | 深圳凌扬微电子有限公司 | Switching power supply small current detection circuit and switching power supply small current control method |
| WO2023138236A1 (en) * | 2022-01-20 | 2023-07-27 | 成都齐碳科技有限公司 | Current measurement circuit, current measurement method and nanopore sequencing apparatus |
| US11768231B1 (en) | 2022-01-20 | 2023-09-26 | Qitan Technology Ltd., Chengdu | Current measurement circuit, current measurement method and nanopore sequencing device |
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