CN203562950U - Output time-delay circuit - Google Patents
Output time-delay circuit Download PDFInfo
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- CN203562950U CN203562950U CN201320621384.XU CN201320621384U CN203562950U CN 203562950 U CN203562950 U CN 203562950U CN 201320621384 U CN201320621384 U CN 201320621384U CN 203562950 U CN203562950 U CN 203562950U
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- 238000006243 chemical reaction Methods 0.000 claims abstract description 7
- 239000003381 stabilizer Substances 0.000 claims description 41
- 239000004065 semiconductor Substances 0.000 claims description 38
- 239000003990 capacitor Substances 0.000 abstract description 9
- 238000000034 method Methods 0.000 abstract description 2
- 230000003111 delayed effect Effects 0.000 abstract 2
- 230000000630 rising effect Effects 0.000 description 4
- 230000000087 stabilizing effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003044 adaptive effect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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Abstract
The utility model discloses an output time-delay circuit. The output time-delay circuit comprises a power supply Ui, a DC-DC conversion module, a first MOS tube, a second MOS tube, a first voltage-stabilizing tube, a second voltage-stabilizing tube, a third voltage-stabilizing tube, a first resistor, a second resistor, a third resistor and a capacitor. In the access process of an input voltage, the DC-DC conversion module N1 is firstly switched off, the switching on of a control end of the DC-DC conversion module is carried out after being delayed for a period of time through the delay circuit, and then the DC-DC conversion module N1 starts to work, so that the access of the input voltage is realized. According to the utility model, the output time-delay circuit is added to an input end of the power supply module, so that the start of the power supply module is delayed, the output is carried out when the input voltage is stable, and the start current is substantially reduced; in addition, the output time-delay circuit has the advantages of being small in size, simple in usage, high in reliability and wide in application range.
Description
Technical field
The utility model relates to a kind of DC power supply art that relates to, particularly a kind of output delay circuit.
Background technology
Numerous DC/DC DC power voltage stabilizing transformers that countries in the world produce at present, the adaptive capacity that input voltage is changed is more and more stronger, from accomplishing 2:1 at first, such as from 9 to 18V, from 18V to 36V, from 36V to 72 V etc., can accomplish now even 8:1 of 4:1.More and more wider along with module input range, requirement to power supply input tape loading capability is also more and more higher, because the output voltage of input source is all generally to start to rise to normal voltage from 0V starting moment, such as the module of 9 to 36V input ranges will be started working in the situation that input voltage rises to 9V, now input current value can be very current value during greatly considerably beyond normal input, when input source current capacity inadequate, will cause input source normally to work, the mode addressing this is that is all generally by increasing the power of input source, improve load capacity, but this mode will increase cost and the volume of input source undoubtedly, cause unnecessary waste.
Summary of the invention
Technical problem to be solved in the utility model is to provide a kind of exportable delay circuit, the moment starting at input source, first temporary transient power cutoff module a period of time, Deng input source stable output later again opening power module start working, solve in this way the problem that power module input moment can produce large electric current.
In order to realize the object solving the problems of the technologies described above, the utility model has adopted following technical scheme:
A kind of output delay circuit of the present utility model, comprises power supply, DC-DC modular converter, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the first voltage-stabiliser tube, the second voltage-stabiliser tube, the 3rd voltage-stabiliser tube, the first resistance, the second resistance, the 3rd resistance, electric capacity;
The input positive pole of described DC-DC modular converter is connected to one end of the first resistance and the 3rd resistance, the positive pole of input source, the input negative pole of DC-DC modular converter is connected to the positive pole of the first voltage-stabiliser tube and the 3rd voltage-stabiliser tube, the negative pole of electric capacity, one end of the second resistance, the source electrode of the first metal-oxide-semiconductor, the source electrode of the second metal-oxide-semiconductor, the negative pole of input source, the control end PC of DC-DC modular converter is connected to the drain electrode of the second metal-oxide-semiconductor, the grid of described the second metal-oxide-semiconductor is connected to the other end of the 3rd resistance, the negative pole of the 3rd voltage-stabiliser tube, the drain electrode of the first metal-oxide-semiconductor, the grid of described the first metal-oxide-semiconductor is connected to the positive pole of the second voltage-stabiliser tube, the negative pole of the second voltage-stabiliser tube is connected to the other end of the first resistance, the other end of the second resistance, the positive pole of electric capacity, the negative pole of the first voltage-stabiliser tube.
Concrete, module work when the control end of the DC-DC modular converter of this patent is unsettled, on the contrary do not work.
Concrete, the described DC-DC modular converter of this patent is one and completes the module that direct current input dc power is pressed onto output dc voltage conversion.
Further concrete, the pin definitions of the DC-DC modular converter of this patent is :+IN is anodal for input, and-IN is input negative pole, and PC is control end, and+OUT is output cathode, and-OUT is output negative pole.
Concrete, the model of the first metal-oxide-semiconductor of this patent is VN2222LL, the model of the second metal-oxide-semiconductor is VN2222LL, the model of the first voltage-stabiliser tube is BWB15, and the model of the second voltage-stabiliser tube is BWB9V1, and the model of the 3rd voltage-stabiliser tube is BWB9V1, the model of the first resistance is 0.25W-20K Ω, the model of the second resistance is 0.25W-100K Ω, and the model of the 3rd resistance is 0.25W-10K Ω, and the model of electric capacity is 25V-220 μ F.
Operation principle: when input voltage access, when voltage rises to certain value, conducting the second metal-oxide-semiconductor drags down the control end PC of DC-DC modular converter, guaranteeing to start DC-DC modular converter does not work, input voltage passes through the first resistance to capacitor charging simultaneously, on electric capacity, voltage is by rising, when rising to the voltage stabilizing value of the second voltage-stabiliser tube when above, will conducting the first metal-oxide-semiconductor, thereby drag down the G utmost point of the second metal-oxide-semiconductor, make the second metal-oxide-semiconductor become not on-state, the PC end of DC-DC modular converter is for high, and now DC-DC modular converter is worked.
Technique effect of the present utility model is, by adding output delay circuit at power module input, can make power module delay start, etc. after stabilized input voltage, export again, this will greatly reduce power supply input and start needed starting current of moment, thereby reduce the power that input source needs, reach the effect of optimizing input source cost and volume.
The utility model is also applicable to there being the power supply of requirement to power supply output electric sequence, the module of the output powering on after requiring is applied to this output delay circuit can meet the demands.
The utlity model has the feature that volume is little, circuit is used simply, reliability is high, applied widely, be applicable to the requirement of various power modules output time delays, there is very wide application prospect; Shortcoming is can not accurately control the time of time delay.
Accompanying drawing explanation
Fig. 1 is the utility model output delay circuit figure.
In figure, Ui-power supply, V1-the first metal-oxide-semiconductor, V2-the second metal-oxide-semiconductor, V3-the first voltage-stabiliser tube, V4-the second voltage-stabiliser tube, V5-the 3rd voltage-stabiliser tube, R1-the first resistance, R2-the second resistance, R3-the 3rd resistance, C1-electric capacity, N1-DC-DC modular converter.
Embodiment
Below in conjunction with accompanying drawing, this patent is further explained.But the protection range of this patent is not limited to concrete execution mode.
Embodiment 1
As shown in Figure 1, the model of the output delay circuit first metal-oxide-semiconductor V1 of this patent is VN2222LL, the model of the second metal-oxide-semiconductor V2 is VN2222LL, the model of the first voltage-stabiliser tube V3 is BWB15, and the model of the second voltage-stabiliser tube V4 is BWB9V1, and the model of the 3rd voltage-stabiliser tube V5 is BWB9V1, the model of the first resistance R 1 is 0.25W-20K Ω, the model of the second resistance R 2 is 0.25W-100K Ω, and the model of the 3rd resistance R 3 is 0.25W-10K Ω, and the model of capacitor C 1 is 25V-220 μ F.
The input positive pole of DC-DC modular converter N1 is connected to one end of the first resistance R 1 and the 3rd resistance R 3, the positive pole of input source Ui, the input negative pole of DC-DC modular converter N1 is connected to the positive pole of the first voltage-stabiliser tube V3 and the 3rd voltage-stabiliser tube V5, the negative pole of capacitor C 1, one end of the second resistance R 2, the source electrode of the first metal-oxide-semiconductor V1, the source electrode of the second metal-oxide-semiconductor V2, the negative pole of input source Ui, the control end PC of DC-DC modular converter N1 is connected to the drain electrode of the second metal-oxide-semiconductor V2, the grid of described the second metal-oxide-semiconductor V2 is connected to the other end of the 3rd resistance R 3, the negative pole of the 3rd voltage-stabiliser tube V5, the drain electrode of the first metal-oxide-semiconductor V1, the grid of described the first metal-oxide-semiconductor V1 is connected to the positive pole of the second voltage-stabiliser tube V4, the negative pole of the second voltage-stabiliser tube V4 is connected to the other end of the first resistance R 1, the other end of the second resistance R 2, the positive pole of capacitor C 1, the negative pole of the first voltage-stabiliser tube V3.DC-DC modular converter N1 is one and completes input voltage to the module of output voltage conversion.Module work when control end PC is unsettled, on the contrary do not work.
When input voltage Ui access, when Ui voltage rises to certain value, conducting the second metal-oxide-semiconductor V2 drags down the control end PC of DC-DC modular converter N1, guaranteeing to start DC-DC modular converter N1 does not work, Ui gives capacitor C 1 charging by the first resistance R 1 simultaneously, in capacitor C 1, voltage is by rising, when rising to the voltage stabilizing value of the second voltage-stabiliser tube V4 when above, will conducting the first metal-oxide-semiconductor V1, thereby drag down the G utmost point of the second metal-oxide-semiconductor V2, make the second metal-oxide-semiconductor V2 become not on-state, the PC end of DC-DC modular converter N1 is height, now module work.
In this circuit, circuit parameter is to be D capacitor C 18-76V based on input voltage, and be that 50ms chooses above time of delay.When being input as all the other voltages, the first resistance R 1 and the first voltage-stabiliser tube V3～three voltage-stabiliser tube V5 need to adjust.
Obtain the delay of longer time, according to formula: τ=RC, need to increase the requirement that the first resistance R 1 and capacitor C 1 meet the time.Meeting under the prerequisite of the required electric current of the first voltage-stabiliser tube V3 voltage stabilizing, the first resistance R 1 is as far as possible large.
Claims (5)
1. an output delay circuit, is characterized in that: comprise power supply (Ui), DC-DC modular converter (N1), the first metal-oxide-semiconductor (V1), the second metal-oxide-semiconductor (V2), the first voltage-stabiliser tube (V3), the second voltage-stabiliser tube (V4), the 3rd voltage-stabiliser tube (V5), the first resistance (R1), the second resistance (R2), the 3rd resistance (R3), electric capacity (C1);
The input positive pole of described DC-DC modular converter (N1) is connected to one end of the first resistance (R1) and the 3rd resistance (R3), the positive pole of input source (Ui), the input negative pole of DC-DC modular converter (N1) is connected to the positive pole of the first voltage-stabiliser tube (V3) and the 3rd voltage-stabiliser tube (V5), the negative pole of electric capacity (C1), one end of the second resistance (R2), the source electrode of the first metal-oxide-semiconductor (V1), the source electrode of the second metal-oxide-semiconductor (V2), the negative pole of input source (Ui), the control end PC of DC-DC modular converter (N1) is connected to the drain electrode of the second metal-oxide-semiconductor (V2), and the grid of described the second metal-oxide-semiconductor (V2) is connected to the other end of the 3rd resistance (R3), the negative pole of the 3rd voltage-stabiliser tube (V5), the drain electrode of the first metal-oxide-semiconductor (V1), the grid of described the first metal-oxide-semiconductor (V1) is connected to the positive pole of the second voltage-stabiliser tube (V4), and the negative pole of the second voltage-stabiliser tube (V4) is connected to the other end of the first resistance (R1), the other end of the second resistance (R2), the positive pole of electric capacity (C1), the negative pole of the first voltage-stabiliser tube (V3).
2. export according to claim 1 delay circuit, it is characterized in that: module work when the control end PC of described DC-DC modular converter (N1) is unsettled, on the contrary do not work.
3. export according to claim 1 delay circuit, it is characterized in that: described DC-DC modular converter (N1) is one and completes the module that direct current input dc power is pressed onto output dc voltage conversion.
4. export according to claim 1 delay circuit, it is characterized in that: the pin definitions of described DC-DC modular converter (N1) :+IN is anodal for input, and-IN is input negative pole, and PC is control end, and+OUT is output cathode, and-OUT is output negative pole.
5. export according to claim 1 delay circuit, it is characterized in that: the model of described the first metal-oxide-semiconductor (V1) is VN2222LL, the model of the second metal-oxide-semiconductor (V2) is VN2222LL, the model of the first voltage-stabiliser tube (V3) is BWB15, the model of the second voltage-stabiliser tube (V4) is BWB9(V1), the model of the 3rd voltage-stabiliser tube (V5) is BWB9(V1), the model of the first resistance (R1) is 0.25W-20K Ω, the model of the second resistance (R2) is 0.25W-100K Ω, the model of the 3rd resistance (R3) is 0.25W-10K Ω, the model of electric capacity (C1) is 25V-220 μ F.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320621384.XU CN203562950U (en) | 2013-10-10 | 2013-10-10 | Output time-delay circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320621384.XU CN203562950U (en) | 2013-10-10 | 2013-10-10 | Output time-delay circuit |
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| Publication Number | Publication Date |
|---|---|
| CN203562950U true CN203562950U (en) | 2014-04-23 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320621384.XU Expired - Fee Related CN203562950U (en) | 2013-10-10 | 2013-10-10 | Output time-delay circuit |
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| CN (1) | CN203562950U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104866059A (en) * | 2015-05-28 | 2015-08-26 | 蚌埠市舒杨电子科技有限公司 | Laptop computer movable power supply |
| CN105206214A (en) * | 2015-09-18 | 2015-12-30 | 京东方科技集团股份有限公司 | Display voltage supply device, power sequence regulating system and method and display device |
| CN105978302B (en) * | 2016-06-17 | 2019-05-10 | 中国电子科技集团公司第二十四研究所 | A kind of pwm pulse sequential control circuit |
-
2013
- 2013-10-10 CN CN201320621384.XU patent/CN203562950U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104866059A (en) * | 2015-05-28 | 2015-08-26 | 蚌埠市舒杨电子科技有限公司 | Laptop computer movable power supply |
| CN105206214A (en) * | 2015-09-18 | 2015-12-30 | 京东方科技集团股份有限公司 | Display voltage supply device, power sequence regulating system and method and display device |
| CN105978302B (en) * | 2016-06-17 | 2019-05-10 | 中国电子科技集团公司第二十四研究所 | A kind of pwm pulse sequential control circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140423 |