CN103312141B - AC-DC (alternating-current to direct-current) converter control circuit - Google Patents
AC-DC (alternating-current to direct-current) converter control circuit Download PDFInfo
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Abstract
The invention discloses an AC-DC (alternating-current to direct-current) converter control circuit which comprises an off-chip compensation capacitor, a power-on starting control unit, a charging lifting unit, a conduction time detection unit, a charging control unit and a PWM (pulse-width modulation) generation unit. By detecting voltage of an input line of a converter and using the power-on starting control unit, the power-on process of the converter is accurately controlled; the process of the converter from successful powering-on to normal working is controlled by the charging lifting unit and the charging control unit; by quickly lifting voltage, the charging process is guaranteed and the starting slope is increased; by the PWM generation circuit, the converter can be guaranteed to complete the process from successful powering-on to normal working in an extremely short time. In the whole process of powering-on of the converter, by the AC-DC converter control circuit, successful starting and starting speed are guaranteed. Compared with other design, the AC-DC converter control circuit has the advantages that sizes of off-chip devices can be greatly reduced, overall efficiency of a system can be improved, and substantial chip area can be saved.
Description
Technical field
The invention belongs to voltage changer control technology field, be specifically related to a kind of control circuit of AC-DC converter.
Background technology
Converters has high-energy-density, high efficiency, the plurality of advantages such as high controllability, has increasing application in traditional energy field and new energy field.In household electrical appliance and electronic equipment for consumption, AC-DC(AC-DC) converter is one of maximum converter of application.Along with user's improving constantly small size electrical equipment demand, the degree of integration of AC-DC converter is also improving constantly.Therefore, designer needs to reduce the outer device of sheet as far as possible, also reduces holistic cost with the volume reducing converter.
In typical AC-DC converter, as shown in Figure 1, it comprises EMI(EMI Filtering electric capacity), rectifier bridge, ground capacity Cp, transformer T, master power switch pipe Q, secondary power diode D etc., the output of rectifier bridge is the input line of system, ground capacity Cp mounts in input line, and the voltage to earth of input line is the input line voltage of system.Because input voltage Vac is alternating voltage input in Fig. 1, can not directly use by feed system controller.Meanwhile, in order to save cost, the power supply of system controller is generally all designed to system power supply itself, and therefore the starting problem of system becomes the key issue that can system normally work.
A kind of AC-DC converter electrifying startup circuit of typical employing line power voltage supply shown in Fig. 2 (a), this circuit often needs the outer starting resistance R1 and larger storage capacitor C1 of less sheet to meet controller power consumption requirements and toggle speed requirement, this will produce great extra power consumption on R1, large C1 and M1 also will occupy area on great plate, so adopt line power voltage supply mode seriously to limit the raising of converter whole efficiency and the reduction of volume; Another internal activation circuitry is as shown in Fig. 2 (b), it comprises Clock dividers and decoding current-limiting circuit, these extra modules will add chip area and design complexities, in today that chip integration is more and more higher, be not suitable for very much sheet designs.
On the other hand, required by many application have the start-up time to system, require system interior startup enter normal operating conditions in short as far as possible.Because system PWM duty ratio is usually by the voltage control of off-chip compensation capacitor, therefore the rate of climb of PWM duty ratio is slow, system can be caused to start slowly, even start unsuccessfully within the limited time.
Summary of the invention
For the above-mentioned technical problem existing for prior art, the invention provides a kind of control circuit of AC-DC converter, converter can be made to start at short notice and enter normal operating conditions, effectively reduce the volume of the outer device of sheet.
A control circuit for AC-DC converter, comprising:
Off-chip compensation capacitor;
Electrifying startup control unit, for gathering the input line voltage of converter to generate operating voltage VDD, and to power on pass signal by comparing generation;
Unit is praised in charging, for according to powering on pass signal, charges to off-chip compensation capacitor in converter initial start up phase;
ON time detecting unit, for detecting ON time signal and the turn-off time signal of secondary power diode in converter according to the pass signal that powers on, and generates the normal working signal of converter;
Charging control unit, for charging to off-chip compensation capacitor according to power on pass signal and normal working signal; When not receiving normal working signal, charging control unit is worked in coordination with charging and is praised unit and charge to off-chip compensation capacitor, when receiving normal working signal, charging control unit carries out charge and discharge control according to ON time signal and turn-off time signal to off-chip compensation capacitor;
PWM generating unit, for gathering off-chip compensation capacitor voltage to earth as modulation signal, and then carries out pulse-width modulation according to described modulation signal, and output pwm signal is to control the master power switch pipe in converter.
Described electrifying startup control unit comprises resistance R1, diode D1, electric capacity C1, comparator B1 and metal-oxide-semiconductor M1; Wherein, one end of resistance R1 is connected with the input line of converter, the other end of resistance R1 is connected with the drain electrode of metal-oxide-semiconductor M1 with the anode of diode D1, the negative electrode of diode D1 and one end of electric capacity C1 are connected with the normal phase input end of comparator B1 and produce operating voltage VDD, the inverting input of comparator B1 receives the comparative voltage Vb1 preset, the output of comparator B1 is connected with the grid of metal-oxide-semiconductor M1 and exports the pass signal that powers on, the other end of electric capacity C1 and the source grounding of metal-oxide-semiconductor M1.
Described charging is praised unit and is comprised current source E1, operational amplifier U1, metal-oxide-semiconductor M2 and triode Q1; Wherein, the input termination operating voltage VDD of current source E1, the output of current source E1 is connected with the emitter of triode Q1 with the inverting input of operational amplifier U1, the collector electrode of triode Q1 and base stage connect and ground connection altogether, the Enable Pin of operational amplifier U1 receives the pass signal that powers on, the normal phase input end of operational amplifier U1 is connected with one end of described off-chip compensation capacitor with the drain electrode of metal-oxide-semiconductor M2, the other end ground connection of off-chip compensation capacitor, the output of operational amplifier U1 is connected with the grid of metal-oxide-semiconductor M2, and the source electrode of metal-oxide-semiconductor M2 meets operating voltage VDD.
Described ON time detecting unit comprises auxiliary winding Na, NOR gate K1, inverter INV1, two resistance R2 ~ R3, three comparator B2 ~ B4 and two d type flip flop H1 ~ H2, wherein, assist the former limit winding coupled of transformer in winding Na and converter, one end ground connection of auxiliary winding Na, the other end of auxiliary winding Na is connected with one end of resistance R2, the other end of resistance R2 and one end of resistance R3, the normal phase input end of comparator B2, the inverting input of comparator B3 is connected with the inverting input of comparator B4, the other end ground connection of resistance R3, the inverting input of comparator B2 is connected with the normal phase input end of comparator B3 and ground connection, the normal phase input end of comparator B4 receives the comparative voltage Vb2 preset, the Enable Pin of three comparator B2 ~ B4 all receives the pass signal that powers on, the output of comparator B2 is connected with the clock end of d type flip flop H1, the first input end of the output AND OR NOT gate K1 of comparator B3 is connected, the output of comparator B4 is connected with the clock end of d type flip flop H2, d type flip flop H2's
second input of end AND OR NOT gate K1 is connected, the output of NOR gate K1 is connected with the input of inverter INV1, the output of inverter INV1 is connected with the reset terminal of d type flip flop H1, the D termination activities voltage VDD of d type flip flop H1, the Q end of d type flip flop H1 exports ON time signal, d type flip flop H1's
end exports turn-off time signal, the D termination activities voltage VDD of d type flip flop H2, the reset terminal ground connection of d type flip flop H2, and the Q end of d type flip flop H2 exports normal working signal.
Described charging control unit comprises sampling Rc, isolation resistor R0, electric capacity C2, three operational amplifier U2 ~ U4, two current source E2 ~ E3, four metal-oxide-semiconductor M3 ~ M6 and three sequence switch S1 ~ S3, wherein, sampling resistor Rc, sequence switch S1, electric capacity C1 and operational amplifier A 1, wherein, one end of sampling resistor Rc is connected with the output of master power switch pipe in one end of sequence switch S1 and converter, the other end of sequence switch S1 is connected with the normal phase input end of operational amplifier U2 with one end of electric capacity C2, the other end ground connection of electric capacity C2, the pwm signal described in the reception of control pole of sequence switch S1, the inverting input of operational amplifier U2 is connected with output one end with sequence switch S2, the other end of sequence switch S2 is connected with the input of isolation resistor R0 with one end of sequence switch S3, the other end ground connection of sequence switch S3, the control pole of sequence switch S2 receives ON time signal, the control pole of sequence switch S3 receives turn-off time signal, the output of isolation resistor R0 and the inverting input of operational amplifier U3, the source electrode of metal-oxide-semiconductor M5 is connected with the drain electrode of metal-oxide-semiconductor M3, the normal phase input end of operational amplifier U3 and the normal phase input end of operational amplifier U4 all receive given reference voltage signal V
ref1, the output of operational amplifier U3 is connected with the grid of metal-oxide-semiconductor M5, the grid of metal-oxide-semiconductor M3 and the grid of metal-oxide-semiconductor M4, the drain electrode of metal-oxide-semiconductor M5 is connected with the output of current source E2, the source electrode of metal-oxide-semiconductor M3 and the source grounding of metal-oxide-semiconductor M4, the input of current source E2 is connected with the input of current source E3 and meets operating voltage VDD, the output of current source E3 is connected with one end of described off-chip compensation capacitor with the drain electrode of metal-oxide-semiconductor M6, the other end ground connection of off-chip compensation capacitor, the grid of metal-oxide-semiconductor M6 is connected with the output of operational amplifier U4, the source electrode of metal-oxide-semiconductor M6 is connected with the drain electrode of metal-oxide-semiconductor M4 with the inverting input of operational amplifier U4, the Enable Pin of operational amplifier U3 and operational amplifier U4 all receives the pass signal that powers on.
Described isolation resistor R0 comprises two resistance R4 ~ R5, inverter INV2 and metal-oxide-semiconductor M7; Wherein, one end of resistance R4 is the input of isolation resistor R0, the other end of resistance R4 is connected with the source electrode of metal-oxide-semiconductor M7 with one end of resistance R5, the other end of resistance R5 is connected with the drain electrode of metal-oxide-semiconductor M7 and is the output of isolation resistor R0, the grid of metal-oxide-semiconductor M7 is connected with the output of inverter INV2, the normal working signal described in input reception of inverter INV2.
Described PWM generating unit comprises two metal-oxide-semiconductor M8 ~ M9, triode Q2, two comparator B5 ~ B6, two current source E4 ~ E5, two electric capacity C3 ~ C4, two NOR gate K2 ~ K3 and inverter INV3, wherein, the input of current source E4 is connected with the input of current source E5 and meets operating voltage VDD, the output of current source E4 is connected with the drain electrode of metal-oxide-semiconductor M8 with one end of the inverting input of comparator B5, electric capacity C3, and the normal phase input end of comparator B5 receives given reference voltage signal V
ref2, the other end ground connection of electric capacity C3, the grid of metal-oxide-semiconductor M8 and the input of inverter INV3, the first input end of NOR gate K2 is connected with the output of NOR gate K3 and output pwm signal, the source ground of metal-oxide-semiconductor M8, the first input end of the output AND OR NOT gate K3 of NOR gate K2 is connected, second input of the output AND OR NOT gate K2 of comparator B5 is connected, the output of current source E5 and the inverting input of comparator B6, one end of electric capacity C4 is connected with the drain electrode of metal-oxide-semiconductor M9, the normal phase input end of comparator B6 is connected with one end of described off-chip compensation capacitor, the other end ground connection of off-chip compensation capacitor, the other end ground connection of electric capacity C4, the grid of metal-oxide-semiconductor M9 is connected with the output of inverter INV3, the source electrode of metal-oxide-semiconductor M9 is connected with the emitter of triode Q2, the base stage of triode Q2 and collector electrode connect and ground connection altogether, second input of the output AND OR NOT gate K3 of comparator B6 is connected.
The present invention, by detecting the input line voltage of AC-DC converter, uses electrifying startup control unit to control the electrifying startup process of AC-DC converter accurately; Unit and the charging control unit control AC-DC converter process that success is extremely working properly is from power on praised by charging; By praising voltage fast, keep charging process and improve starting slope, it is working properly that PWM circuit for generating ensure that AC-DC converter successfully can arrive from power within the very short time.In the whole power up of AC-DC converter, the present invention both ensure that and had successfully started, and in turn ensure that the speed of startup; Compared to other designs, the present invention uses the outer electric capacity of less sheet and does not use zener, can the volume of device greatly outside reducing tab, raising entire system efficiency, simultaneously owing to not re-using frequency divider and decoding current-limiting circuit, considerable chip area can be saved.
Accompanying drawing explanation
Fig. 1 is the structural representation of typical AC-DC converter.
Fig. 2 (a) is the structural representation that tradition adopts the AC-DC converter electrifying startup circuit of line power voltage supply.
Fig. 2 (b) is the structural representation of the AC-DC converter start-up circuit containing Clock dividers.
Fig. 3 is the structural representation of control circuit of the present invention.
Fig. 4 is the structural representation of electrifying startup control unit.
Fig. 5 is the structural representation that unit is praised in charging.
Fig. 6 is the structural representation of ON time detecting unit.
Fig. 7 is the structural representation of charging control unit.
Fig. 8 is the structural representation of PWM generating unit.
Fig. 9 is the waveform schematic diagram of modulation voltage in control circuit of the present invention
Embodiment
In order to more specifically describe the present invention, below in conjunction with the drawings and the specific embodiments, technical scheme of the present invention and related work principle thereof are described in detail.
As shown in Figure 3, a kind of control circuit of AC-DC converter, comprising: off-chip compensation capacitor C, electrifying startup control unit, charging praise unit, ON time detecting unit, charging control unit and PWM generating unit; Wherein: unit is praised with charging in off-chip compensation capacitor C one end, charging control unit is connected with PWM generating unit, other end ground connection;
As shown in Figure 1, it is by EMI, rectifier bridge for present embodiment AC-DC converter, and transformer T, ground capacity Cp, master power switch pipe Q, secondary power diode D and filter capacitor Cr form; Wherein transformer has three windings to be former limit winding Np, vice-side winding Ns respectively, auxiliary winding Na; Vice-side winding Ns and auxiliary winding Na homophase, but contrary with former limit winding Np phase place.The forward of former limit winding Np termination rectifier bridge of the same name exports, and the forward of rectifier bridge exports the input line for converter, and ground capacity Cp mounts in input line, and the voltage to earth of input line is the input line voltage of converter.The Same Name of Ends of auxiliary winding Na and vice-side winding Ns with connecing former limit respectively with secondary ground.Former limit winding Np non-same polarity connects the drain terminal of master power switch pipe Q, and master power switch pipe Q source ground connection exports; Vice-side winding Ns non-same polarity connects the anode of secondary power diode D, and the negative electrode of D meets output filter capacitor Cr.
Electrifying startup control unit for gathering the input line voltage Vline of converter to generate operating voltage VDD, and to power on pass signal Startok by comparing generation; In present embodiment, electrifying startup control unit comprises resistance R1, diode D1, electric capacity C1, comparator B1 and metal-oxide-semiconductor M1, as shown in Figure 4; Wherein, one end of resistance R1 is connected with the input line of converter, the other end of resistance R1 is connected with the drain electrode of metal-oxide-semiconductor M1 with the anode of diode D1, the negative electrode of diode D1 and one end of electric capacity C1 are connected with the normal phase input end of comparator B1 and produce operating voltage VDD, the inverting input of comparator B1 receives the comparative voltage Vb1(18V preset), the output of comparator B1 is connected with the grid of metal-oxide-semiconductor M1 and exports the pass signal that powers on, the other end of electric capacity C1 and the source grounding of metal-oxide-semiconductor M1.
Charging praises unit for according to powering on pass signal Startok, charges to off-chip compensation capacitor C in converter initial start up phase; In present embodiment, charging is praised unit and is comprised current source E1, operational amplifier U1, metal-oxide-semiconductor M2 and triode Q1, as shown in Figure 5; Wherein, the input termination operating voltage VDD of current source E1, the output of current source E1 is connected with the emitter of triode Q1 with the inverting input of operational amplifier U1, the collector electrode of triode Q1 and base stage connect and ground connection altogether, the Enable Pin of operational amplifier U1 receives the pass signal Startok that powers on, the normal phase input end of operational amplifier U1 is connected with one end of off-chip compensation capacitor C with the drain electrode of metal-oxide-semiconductor M2, the output of operational amplifier U1 is connected with the grid of metal-oxide-semiconductor M2, and the source electrode of metal-oxide-semiconductor M2 meets operating voltage VDD.
In the initial condition of circuit start, off-chip compensation capacitor C voltage is 0, the lowest threshold that the PWM lower than the setting of PWM generating unit produces, and PWM does not export.Off-chip compensation capacitor C voltage rises when normal work by charging control unit output charging; because charging current is limited; and be limited to the current source of charging control unit; the modulation voltage V rate of climb slowly; cause system to start to normal working hours long, likely cause starting unsuccessfully.Therefore present embodiment charging praises unit when modulation voltage V is lower than Vref_q, the output of operational amplifier U1 is low level, and conducting metal-oxide-semiconductor M2 is directly charged to off-chip compensation capacitor C by VDD.When modulation voltage V reaches Vref_q, the output of operational amplifier U1 is high level, closes metal-oxide-semiconductor M2, and whether this part control or not when normal work.
ON time detecting unit is used for the ON time signal t detecting secondary power diode D in converter according to the pass signal Startok that powers on
onwith turn-off time signal t
off, and generate the normal working signal normal of converter, in present embodiment, ON time detecting unit comprises auxiliary winding Na, NOR gate K1, inverter INV1, two resistance R2 ~ R3, three comparator B2 ~ B4 and two d type flip flop H1 ~ H2, as shown in Figure 6, wherein, assist the former limit winding coupled of transformer in winding Na and converter, one end ground connection of auxiliary winding Na, the other end of auxiliary winding Na is connected with one end of resistance R2, the other end of resistance R2 and one end of resistance R3, the normal phase input end of comparator B2, the inverting input of comparator B3 is connected with the inverting input of comparator B4, the other end ground connection of resistance R3, the inverting input of comparator B2 is connected with the normal phase input end of comparator B3 and ground connection, the normal phase input end of comparator B4 receives the comparative voltage Vb2(1V preset), the Enable Pin of three comparator B2 ~ B4 all receives the pass signal Startok that powers on, the output of comparator B2 is connected with the clock end of d type flip flop H1, the first input end of the output AND OR NOT gate K1 of comparator B3 is connected, the output of comparator B4 is connected with the clock end of d type flip flop H2, d type flip flop H2's
second input of end AND OR NOT gate K1 is connected, the output of NOR gate K1 is connected with the input of inverter INV1, the output of inverter INV1 is connected with the reset terminal of d type flip flop H1, and the Q end of the D termination activities voltage VDD of d type flip flop H1, d type flip flop H1 exports ON time signal t
on, d type flip flop H1's
end exports turn-off time signal t
off, the D termination activities voltage VDD of d type flip flop H2, the reset terminal ground connection of d type flip flop H2, the Q end of d type flip flop H2 exports normal working signal normal.
Charging control unit is used for charging to off-chip compensation capacitor C according to the pass signal Startok and normal working signal normal that powers on, when not receiving normal working signal normal, charging control unit is worked in coordination with charging and is praised unit and charge to off-chip compensation capacitor C, and when receiving normal working signal normal, charging control unit is according to ON time signal t
onwith turn-off time signal t
offcharge and discharge control is carried out to off-chip compensation capacitor C, in present embodiment, charging control unit comprises sampling Rc, isolation resistor R0, electric capacity C2, three operational amplifier U2 ~ U4, two current source E2 ~ E3, four metal-oxide-semiconductor M3 ~ M6 and three sequence switch S1 ~ S3, wherein, sampling resistor Rc, sequence switch S1, electric capacity C1 and operational amplifier A 1, as shown in Figure 7, wherein, one end of sampling resistor Rc is connected with the output of master power switch pipe in one end of sequence switch S1 and converter, the other end of sequence switch S1 is connected with the normal phase input end of operational amplifier U2 with one end of electric capacity C2, the other end ground connection of electric capacity C2, the control pole of sequence switch S1 receives pwm signal, the inverting input of operational amplifier U2 is connected with output one end with sequence switch S2, the other end of sequence switch S2 is connected with the input of isolation resistor R0 with one end of sequence switch S3, the other end ground connection of sequence switch S3, the control pole of sequence switch S2 receives ON time signal t
on, the control pole of sequence switch S3 receives turn-off time signal t
off, the output of isolation resistor R0 is connected with the drain electrode of metal-oxide-semiconductor M3 with the source electrode of the inverting input of operational amplifier U3, metal-oxide-semiconductor M5, and the normal phase input end of operational amplifier U3 and the normal phase input end of operational amplifier U4 all receive given reference voltage signal V
ref1(400mV), the output of operational amplifier U3 is connected with the grid of metal-oxide-semiconductor M5, the grid of metal-oxide-semiconductor M3 and the grid of metal-oxide-semiconductor M4, the drain electrode of metal-oxide-semiconductor M5 is connected with the output of current source E2, the source electrode of metal-oxide-semiconductor M3 and the source grounding of metal-oxide-semiconductor M4, the input of current source E2 is connected with the input of current source E3 and meets operating voltage VDD, the output of current source E3 is connected with one end of off-chip compensation capacitor C with the drain electrode of metal-oxide-semiconductor M6, the grid of metal-oxide-semiconductor M6 is connected with the output of operational amplifier U4, the source electrode of metal-oxide-semiconductor M6 is connected with the drain electrode of metal-oxide-semiconductor M4 with the inverting input of operational amplifier U4, the Enable Pin of operational amplifier U3 and operational amplifier U4 all receives the pass signal Startok that powers on.Isolation resistor R0 comprises two resistance R4 ~ R5, inverter INV2 and metal-oxide-semiconductor M7; Wherein, one end of resistance R4 is the input of isolation resistor R0, the other end of resistance R4 is connected with the source electrode of metal-oxide-semiconductor M7 with one end of resistance R5, the other end of resistance R5 is connected with the drain electrode of metal-oxide-semiconductor M7 and is the output of isolation resistor R0, the grid of metal-oxide-semiconductor M7 is connected with the output of inverter INV2, and the input of inverter INV2 receives normal working signal normal.
T
onand t
offit is the system works normal signal of the complementation that system produces.When the systems are operating normally, t
onand t
offsignal alternate conduction works, and off-chip compensation capacitor C is by the charging and discharging repeated.In order to allow system start faster, shielding off-chip compensation capacitor C before normal work is needed to be discharged.Therefore, at Holdover mode, namely at first t
onbefore signal arrives, switch S 3 is connected to ground all the time, and namely off-chip compensation capacitor C can be remained charged state.Charging control unit, to the electric current of the charging current copy input operational amplifier U3 of off-chip compensation capacitor C, is determined by following formula:
Wherein, I2 is the charging current of off-chip compensation capacitor C, and I1 is the electric current flowing into charging control unit, V
ref1for the reference voltage of system feedback, V
infor the input voltage of current amplifier.
In isolation resistor R0, the inversion signal of normal working signal normal is the control signal of switching tube M7.When system starts start but do not reach normal, normal output low level, switching tube M7 conducting, the equivalent resistance of R0 is R4, and charging current is now:
Start normally in system, normal exports high level, and switching tube M7 closes, and the equivalent resistance of R0 is the summation of R4 and R5, and charging current is now:
PWM generating unit for gathering off-chip compensation capacitor C voltage to earth as modulation signal V, and then carries out pulse-width modulation according to modulation signal V, and output pwm signal is to control the master power switch pipe Q in converter, in present embodiment, PWM generating unit comprises two metal-oxide-semiconductor M8 ~ M9, triode Q2, two comparator B5 ~ B6, two current source E4 ~ E5, two electric capacity C3 ~ C4, two NOR gate K2 ~ K3 and inverter INV3, as shown in Figure 8, wherein, the input of current source E4 is connected with the input of current source E5 and meets operating voltage VDD, the output of current source E4 is connected with the drain electrode of metal-oxide-semiconductor M8 with one end of the inverting input of comparator B5, electric capacity C3, and the normal phase input end of comparator B5 receives given reference voltage signal V
ref2(2.2V), the other end ground connection of electric capacity C3, the grid of metal-oxide-semiconductor M8 and the input of inverter INV3, the first input end of NOR gate K2 is connected with the output of NOR gate K3 and output pwm signal, the source ground of metal-oxide-semiconductor M8, the first input end of the output AND OR NOT gate K3 of NOR gate K2 is connected, second input of the output AND OR NOT gate K2 of comparator B5 is connected, the output of current source E5 and the inverting input of comparator B6, one end of electric capacity C4 is connected with the drain electrode of metal-oxide-semiconductor M9, the normal phase input end of comparator B6 is connected with one end of off-chip compensation capacitor C, the other end ground connection of electric capacity C4, the grid of metal-oxide-semiconductor M9 is connected with the output of inverter INV3, the source electrode of metal-oxide-semiconductor M9 is connected with the emitter of triode Q2, the base stage of triode Q2 and collector electrode connect and ground connection altogether, second input of the output AND OR NOT gate K3 of comparator B6 is connected.
PWM generating unit exports the size of the duty ratio of PWM ripple, is determined, and be directly proportional to modulation voltage V voltage by the modulation voltage V on off-chip compensation capacitor C, and when modulation voltage V raises, PWM duty ratio increases, and when modulation voltage V reduces, PWM duty ratio reduces.PWM produces and requires that modulation voltage V lowest threshold is set to 0.7V.In normal mode of operation, t
onand t
offsignal alternate conduction works.
The startup waveform of modulation voltage V during present embodiment work that Fig. 9 is shown, wherein start-up course is respectively under the control of circuit and charging control unit is praised in charging, can be divided into three phases: start and praise the stage, discharge shroud stage and startup normal phase.First stage is that the stage is praised in startup, and praise the effect of circuit at capacitor charging under, modulation voltage V is raised to rapidly about 0.7V; Second stage is the discharge shroud stage, the electric discharge conductively-closed of the outer electric capacity C of sheet, and modulation voltage V keeps propradation always, wherein, the slope risen through the effect of charging control unit, the large when slope ratio of charging normally works, charging rate is therefore fast than normal condition; Phase III is normal work stage, as system first t
onwhen signal occurs, system is considered to enter normal operating conditions, and system starts normal, and whole start-up course can complete in 1ms.
Claims (7)
1. a control circuit for AC-DC converter, is characterized in that, comprising:
Off-chip compensation capacitor;
Electrifying startup control unit, for gathering the input line voltage of converter to generate operating voltage VDD, and to power on pass signal by comparing generation;
Unit is praised in charging, for according to powering on pass signal, charges to off-chip compensation capacitor in converter initial start up phase;
ON time detecting unit, for detecting ON time signal and the turn-off time signal of secondary power diode in converter according to the pass signal that powers on, and generates the normal working signal of converter;
Charging control unit, for charging to off-chip compensation capacitor according to power on pass signal and normal working signal; When not receiving normal working signal, charging control unit is worked in coordination with charging and is praised unit and charge to off-chip compensation capacitor, when receiving normal working signal, charging control unit carries out charge and discharge control according to ON time signal and turn-off time signal to off-chip compensation capacitor;
PWM generating unit, for gathering off-chip compensation capacitor voltage to earth as modulation signal, and then carries out pulse-width modulation according to described modulation signal, and output pwm signal is to control the master power switch pipe in converter.
2. control circuit according to claim 1, is characterized in that: described electrifying startup control unit comprises resistance R1, diode D1, electric capacity C1, comparator B1 and metal-oxide-semiconductor M1; Wherein, one end of resistance R1 is connected with the input line of converter, the other end of resistance R1 is connected with the drain electrode of metal-oxide-semiconductor M1 with the anode of diode D1, the negative electrode of diode D1 and one end of electric capacity C1 are connected with the normal phase input end of comparator B1 and produce operating voltage VDD, the inverting input of comparator B1 receives the comparative voltage Vb1 preset, the output of comparator B1 is connected with the grid of metal-oxide-semiconductor M1 and exports the pass signal that powers on, the other end of electric capacity C1 and the source grounding of metal-oxide-semiconductor M1.
3. control circuit according to claim 1, is characterized in that: described charging is praised unit and comprised current source E1, operational amplifier U1, metal-oxide-semiconductor M2 and triode Q1; Wherein, the input termination operating voltage VDD of current source E1, the output of current source E1 is connected with the emitter of triode Q1 with the inverting input of operational amplifier U1, the collector electrode of triode Q1 and base stage connect and ground connection altogether, the Enable Pin of operational amplifier U1 receives the pass signal that powers on, the normal phase input end of operational amplifier U1 is connected with one end of described off-chip compensation capacitor with the drain electrode of metal-oxide-semiconductor M2, the other end ground connection of off-chip compensation capacitor, the output of operational amplifier U1 is connected with the grid of metal-oxide-semiconductor M2, and the source electrode of metal-oxide-semiconductor M2 meets operating voltage VDD.
4. control circuit according to claim 1, is characterized in that: described ON time detecting unit comprises auxiliary winding Na, NOR gate K1, inverter INV1, two resistance R2 ~ R3, three comparator B2 ~ B4 and two d type flip flop H1 ~ H2, wherein, assist the former limit winding coupled of transformer in winding Na and converter, one end ground connection of auxiliary winding Na, the other end of auxiliary winding Na is connected with one end of resistance R2, the other end of resistance R2 and one end of resistance R3, the normal phase input end of comparator B2, the inverting input of comparator B3 is connected with the inverting input of comparator B4, the other end ground connection of resistance R3, the inverting input of comparator B2 is connected with the normal phase input end of comparator B3 and ground connection, the normal phase input end of comparator B4 receives the comparative voltage Vb2 preset, the Enable Pin of three comparator B2 ~ B4 all receives the pass signal that powers on, the output of comparator B2 is connected with the clock end of d type flip flop H1, the first input end of the output AND OR NOT gate K1 of comparator B3 is connected, the output of comparator B4 is connected with the clock end of d type flip flop H2, d type flip flop H2's
second input of end AND OR NOT gate K1 is connected, the output of NOR gate K1 is connected with the input of inverter INV1, the output of inverter INV1 is connected with the reset terminal of d type flip flop H1, the D termination activities voltage VDD of d type flip flop H1, the Q end of d type flip flop H1 exports ON time signal, d type flip flop H1's
end exports turn-off time signal, the D termination activities voltage VDD of d type flip flop H2, the reset terminal ground connection of d type flip flop H2, and the Q end of d type flip flop H2 exports normal working signal.
5. control circuit according to claim 1, is characterized in that: described charging control unit comprises sampling resistor Rc, isolation resistor R0, electric capacity C2, three operational amplifier U2 ~ U4, two current source E2 ~ E3, four metal-oxide-semiconductor M3 ~ M6 and three sequence switch S1 ~ S3, wherein, one end of sampling resistor Rc is connected with one end of sequence switch S1, the other end ground connection of sampling resistor Rc, the other end of sequence switch S1 is connected with the normal phase input end of operational amplifier U2 with one end of electric capacity C2, the other end ground connection of electric capacity C2, the pwm signal described in the reception of control pole of sequence switch S1, the inverting input of operational amplifier U2 is connected with output one end with sequence switch S2, the other end of sequence switch S2 is connected with the input of isolation resistor R0 with one end of sequence switch S3, the other end ground connection of sequence switch S3, the control pole of sequence switch S2 receives ON time signal, the control pole of sequence switch S3 receives turn-off time signal, the output of isolation resistor R0 and the inverting input of operational amplifier U3, the source electrode of metal-oxide-semiconductor M5 is connected with the drain electrode of metal-oxide-semiconductor M3, the normal phase input end of operational amplifier U3 and the normal phase input end of operational amplifier U4 all receive given reference voltage signal V
ref1, the output of operational amplifier U3 is connected with the grid of metal-oxide-semiconductor M5, the grid of metal-oxide-semiconductor M3 and the grid of metal-oxide-semiconductor M4, the drain electrode of metal-oxide-semiconductor M5 is connected with the output of current source E2, the source electrode of metal-oxide-semiconductor M3 and the source grounding of metal-oxide-semiconductor M4, the input of current source E2 is connected with the input of current source E3 and meets operating voltage VDD, the output of current source E3 is connected with one end of described off-chip compensation capacitor with the drain electrode of metal-oxide-semiconductor M6, the other end ground connection of off-chip compensation capacitor, the grid of metal-oxide-semiconductor M6 is connected with the output of operational amplifier U4, the source electrode of metal-oxide-semiconductor M6 is connected with the drain electrode of metal-oxide-semiconductor M4 with the inverting input of operational amplifier U4, the Enable Pin of operational amplifier U3 and operational amplifier U4 all receives the pass signal that powers on.
6. control circuit according to claim 5, is characterized in that: described isolation resistor R0 comprises two resistance R4 ~ R5, inverter INV2 and metal-oxide-semiconductor M7; Wherein, one end of resistance R4 is the input of isolation resistor R0, the other end of resistance R4 is connected with the source electrode of metal-oxide-semiconductor M7 with one end of resistance R5, the other end of resistance R5 is connected with the drain electrode of metal-oxide-semiconductor M7 and is the output of isolation resistor R0, the grid of metal-oxide-semiconductor M7 is connected with the output of inverter INV2, the normal working signal described in input reception of inverter INV2.
7. control circuit according to claim 1, is characterized in that: described PWM generating unit comprises two metal-oxide-semiconductor M8 ~ M9, triode Q2, two comparator B5 ~ B6, two current source E4 ~ E5, two electric capacity C3 ~ C4, two NOR gate K2 ~ K3 and inverter INV3, wherein, the input of current source E4 is connected with the input of current source E5 and meets operating voltage VDD, the output of current source E4 is connected with the drain electrode of metal-oxide-semiconductor M8 with one end of the inverting input of comparator B5, electric capacity C3, and the normal phase input end of comparator B5 receives given reference voltage signal V
ref2, the other end ground connection of electric capacity C3, the grid of metal-oxide-semiconductor M8 and the input of inverter INV3, the first input end of NOR gate K2 is connected with the output of NOR gate K3 and output pwm signal, the source ground of metal-oxide-semiconductor M8, the first input end of the output AND OR NOT gate K3 of NOR gate K2 is connected, second input of the output AND OR NOT gate K2 of comparator B5 is connected, the output of current source E5 and the inverting input of comparator B6, one end of electric capacity C4 is connected with the drain electrode of metal-oxide-semiconductor M9, the normal phase input end of comparator B6 is connected with one end of described off-chip compensation capacitor, the other end ground connection of off-chip compensation capacitor, the other end ground connection of electric capacity C4, the grid of metal-oxide-semiconductor M9 is connected with the output of inverter INV3, the source electrode of metal-oxide-semiconductor M9 is connected with the emitter of triode Q2, the base stage of triode Q2 and collector electrode connect and ground connection altogether, second input of the output AND OR NOT gate K3 of comparator B6 is connected.
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| CN109494998A (en) * | 2018-12-29 | 2019-03-19 | 青岛亿联客信息技术有限公司 | A kind of single live wire power getting control system and method |
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| CN101841250A (en) * | 2010-04-27 | 2010-09-22 | 上海新进半导体制造有限公司 | Switching power supply control circuit and primary winding-controlled flyback switching power supply |
| CN202798467U (en) * | 2011-01-28 | 2013-03-13 | 罗姆股份有限公司 | DC/DC converter, power supply device applying DC/DC converter, and electronic device |
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| CN101841250A (en) * | 2010-04-27 | 2010-09-22 | 上海新进半导体制造有限公司 | Switching power supply control circuit and primary winding-controlled flyback switching power supply |
| CN202798467U (en) * | 2011-01-28 | 2013-03-13 | 罗姆股份有限公司 | DC/DC converter, power supply device applying DC/DC converter, and electronic device |
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