CN103248207B - Constant-current and constant-voltage fly-back converter based on primary side feedback - Google Patents
Constant-current and constant-voltage fly-back converter based on primary side feedback Download PDFInfo
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Abstract
The invention discloses a constant-current and constant-voltage fly-back converter based on primary side feedback. The constant-current and constant-voltage fly-back converter comprises a rectifying bridge, an inverted U-shaped filter, a transformer, an auxiliary power supply circuit, a constant-current and constant-voltage controller and a switch tube, wherein the transformer consists of a primary winding, a secondary winding and an auxiliary winding; the constant-current and constant-voltage controller comprises a constant-voltage module, a frequency generator, a constant-current module, a joint gate, an RS trigger and a driving module; the output end of the constant-voltage module and the first and second output ends of the constant-current module are connected with three input ends of the joint gate; the input end of the constant-current module is connected with the emitting electrode of the switch tube, and is used for sampling a current signal of the primary winding; the output end of the joint gate is connected with the R end of the RS trigger, and is used for transmitting a switch-off signal generated by the joint gate to the R end of the RS trigger; the switch-on signal of the frequency generator is output to the S end of the RS trigger; the RS trigger is used for receiving the switch-on signal and the switch-off signal to generate a modulating signal; and the Q end of the RS trigger is connected with the input end of the driving module.
Description
Technical field
Designing integrated circuit field of the present invention.More particularly, the present invention relates to a kind of constant current constant voltage formula inverse excitation type converter fed back based on former limit.
Background technology
Hand-hold type personal telecommunication terminal (such as mobile phone) product in recent years, development rapidly.Its relevant charger market is developed thereupon.Inverse excitation type converter, due to himself cost, performance advantage, is widely used in this field.And the constant-current constant-voltage controller of various employing former limit feedback, because its peripheral structure is simple, with low cost, be widely accepted and apply.
The constant-current constant-voltage controller of existing former limit feedback, the inverse excitation type converter built, as shown in Figure 1.Comprise, rectifier bridge 170, ∏ mode filter 171, absorbing circuit 172, transformer 173(armature winding 180, secondary winding 181, auxiliary winding 182), constant-current constant-voltage controller 187, secondary commutation diode 174, the output capacitance 175 of former limit feedback, export dummy load 176, auxiliary power supply circuit 177, switching tube 178, primary current sampling resistor 179.
The constant-current constant-voltage controller 187 of former limit feedback, comprise, degaussing detection module 120, sampling keep module 110, time delay module 130, operational amplifier 112, comparator 140, rest-set flip-flop 150, driver module 152, lead-edge-blanking module 160, transmitting switch 162 etc.
The constant-current constant-voltage controller 187 of former limit feedback, needs to extract the information relevant with output voltage and output loading, by exporting conducting and the cut-off of modulation signal control switch, carrys out regulated output voltage.In the system shown in figure 1, such information can be extracted by signal 100 and signal 101.Wherein, signal 100 equal proportion reflection output voltage values; And signal 101, for flowing through the electric current of armature winding 180, at the voltage signal that primary current sampling resistor 179 is formed.
Suppose, output voltage is Vout, and secondary winding 181 number of turn is Ns, auxiliary winding 182 number of turn is Naux, and signal 100 is V at the magnitude of voltage of direct current section
fb.
Formula 1 can be found out, output voltage Vo and V
fbvoltage is linear, can pass through constant V
fbthe way of voltage carrys out constant output voltage.
If switch 178 conducting, then flow through the electric current of armature winding 180, linearly increase, signal 101 also linearly increases.Signal 101, after transmitting switch 162, generates signal 102, and enter comparator 140 together with threshold voltage signal 113, generates signal 141.When signal 102 exceedes threshold voltage signal 116, then comparator signal 141 is high level.
When switch 178 ends, the energy be stored in transformer is released to output, and demagnetization process starts.In demagnetization process, sampling keeps module 110 pairs of signals 100 to carry out sampling maintenance, output signal 111.Signal 111 and the difference of reference voltage Vref 1, amplified to generate amplifying signal 113 by error amplifier 112.The detection module of degaussing simultaneously, detects degaussing time Tdemag, generates signal 121.Signal 113 enters time delay module 130 together with signal 121, after the Tdis time, and output signal 131.
Rest-set flip-flop 150 Received signal strength 131 and 141, and responsively generate signal 151.If signal 131 is logic high and signal 141 is logic low, then signal 151 is logic high.If signal 131 is logic low and signal 141 is logic high, then signal 151 is logic low.
If shown in 1, signal 151 is received by driver module 152, and outputs signal 153 to switch 178.If signal 151 is high level, driver module output signal 153, makes driving switch 178 conducting.Otherwise if signal 151 is low level, driver module output signal 153, makes driving switch 178 end.
With reference to supply convertor system shown in figure 1, output loading is larger, and so the output signal 113 of error amplifier 112 becomes larger.The output signal 131 of time delay module 130, the Tdis time of decision is less.Whole supply convertor system frequency is higher.Otherwise output loading is less, so the output signal 113 of error amplifier 112 becomes less.The output signal 131 of time delay module 130, the Tdis time of decision is greatly less.Whole supply convertor system frequency is lower.
If during output loading switching at runtime, load is switched to suddenly fully loaded from underloading, and the feedback information fed back due to former limit needs could sample in next cycle.So within the one-period time, the controller fed back due to former limit cannot detect output voltage information, and output voltage can continue to fall.
Up-to-date USB3.0 standard proposes higher dynamic response capability to the charger that specified output is 5V1A, and output voltage range is 4.75 ~ 5.25V.The charger output capacitance of 5V1A is generally 1000uF.
According to the drop-off voltage value of 0.5V.
The lowermost switch frequency Fsw of the controller of former limit feedback is greater than and equals 2K.
Time unloaded, the constant current constant voltage of former limit feedback controls, and need the requirement of the lowermost switch frequency ensureing 2K, the size of service time now, determines the size of the idling consumption of whole supply convertor.
Inverse excitation type converter, opening moment, has immediate current by transformer turn-to-turn capacitance, diode equivalent electric capacity, by switch 178, forms spike at primary current sampling resistor 179.In order to hide the interference of peak voltage.Need lead-edge-blanking module 160, Received signal strength 151, after postponing a period of time Tleb, just make transmitting switch 161 conducting.(see Fig. 2, Fig. 3)
In practical application, Tleb is typically designed to 500nS.
So, system shown in Figure 1, minimum ON time Ton is also 500nS.
So according to calculating, specified output is the charger of 5V1A, and the inductance value of the armature winding 110 of transformer is about 1.5mH, so when 230V exchanges input, whole charger stand-by power consumption is at least, and determined by minimum duty cycle and lowermost switch frequency limitation, loss is at least
Formula
If design a kind of constant-current constant-voltage controller of former limit feedback newly, if its minimum service time is not by the restriction of lead-edge-blanking time.So, use the supply convertor that it is built, under similarity condition, the constant-current constant-voltage controller of relatively general former limit feedback, will have lower stand-by power consumption.
Summary of the invention
The invention provides the better and constant current constant voltage formula inverse excitation type converter fed back based on former limit that stand-by power consumption is lower of a kind of dynamic response.
The technical scheme of technical solution problem of the present invention is:
A kind of constant current constant voltage formula inverse excitation type converter fed back based on former limit, comprise: rectifier bridge, ∏ mode filter, absorbing circuit, by armature winding, the transformer that secondary winding and auxiliary winding are formed, constant-current constant-voltage controller and switching tube, described secondary winding is also connected with secondary circuit, described auxiliary winding is also connected with auxiliary power supply circuit, the base stage of described switching tube is connected with the output of constant-current constant-voltage controller, the collector electrode of switching tube is connected with armature winding, the emitter of switching tube is by primary current sampling resistor ground connection, described constant-current constant-voltage controller comprises constant voltage module, frequency generator, constant flow module, or door, rest-set flip-flop and driver module, the input of described constant voltage module is for the voltage signal of auxiliary winding of sampling, the output of constant voltage module and first of constant flow module, second output respectively with or three inputs of door to be connected and for by the first cut-off signals, second cut-off signals and the 3rd cut-off signals are sent to or three inputs of door respectively, the input of constant flow module is connected the current signal for armature winding of sampling with the emitter of described switching tube, described or the output of door and the R of rest-set flip-flop hold be connected and for by or the cut-off signals that becomes of the pupil R that is sent to rest-set flip-flop hold, the input of described frequency generator is for sampling and receiving the voltage signal of assisting winding, frequency generator produce open signal and export to rest-set flip-flop S end, described rest-set flip-flop is used for reception and opens signal and cut-off signals, generate modulation signal, the Q end of rest-set flip-flop is connected with the input of driver module, described driver module is for receiving modulation signal, and to described switching tube output drive signal.
Compared with the constant-current constant-voltage controller fed back with the former limit of tradition, the present invention has many benefits.Time unloaded, first threshold signal enters the first comparator with inner triangular wave and compares.By modulation module, export modulation signal.By experiments more of the present invention, show the inverse excitation type converter that the present invention builds, the restriction of lead-edge-blanking time can not be subject to, the lowermost switch frequency (see Fig. 3, Fig. 6 contrast) of less service time and Geng Gao can be had time unloaded, thus, the requirement of dynamic response and stand-by power consumption can be met simultaneously.
Accompanying drawing explanation
Fig. 1 is that the inverse excitation type converter system of the constant-current constant-voltage controller of existing former limit feedback simplifies diagram.
Fig. 2 is the simplified timing diagram of system in Fig. 1.
Simplified timing diagram when Fig. 3 is system in Fig. 1 unloaded.
Fig. 4 is that the constant current constant voltage formula inverse excitation type converter system of former according to an embodiment of the invention limit feedback simplifies diagram.
Fig. 5 is the simplified timing diagram of the constant current constant voltage formula inverse excitation type converter system of the former limit feedback of Fig. 4 embodiments of the invention.
Simplified timing diagram when Fig. 6 is the constant current constant voltage formula inverse excitation type converter system of the former limit feedback of Fig. 4 embodiments of the invention unloaded.
Fig. 7 is in the constant current constant voltage formula inverse excitation type converter system of former limit feedback of Fig. 4 embodiments of the invention, the simplification diagram of degaussing detection module 420.
Fig. 8 is the simplified timing diagram of Fig. 7 degaussing detection module 420.
Fig. 9 is that in the constant current constant voltage formula inverse excitation type converter system of former limit feedback of Fig. 4 embodiments of the invention, sampling keeps the simplification diagram of module 410.
Figure 10 is that Fig. 9 samples and keeps the simplified timing diagram of module 410.
Figure 11 is in the constant current constant voltage formula inverse excitation type converter system of former limit feedback of Fig. 4 embodiments of the invention, the simplification diagram of time delay module 430.
Figure 12 is the simplified timing diagram of Figure 11 time delay module 430.
Figure 13 is in the constant current constant voltage formula inverse excitation type converter system of former limit feedback of Fig. 4 embodiments of the invention, the simplification diagram of triangular-wave generator 433.
Figure 14 is the simplified timing diagram of Figure 13 triangular-wave generator 433.
Figure 15 is that the former limit of Fig. 4 embodiments of the invention is fed back in the constant current constant voltage formula inverse excitation type converter system of building, the simplification diagram of current sample computing module 440.
Figure 16 is the simplified timing diagram of Figure 15 current sample computing module 440.
Embodiment
A kind of constant current constant voltage formula inverse excitation type converter fed back based on former limit, comprise: rectifier bridge 470, ∏ mode filter 471, absorbing circuit 472, by armature winding 480, the transformer 473 that secondary winding 481 and auxiliary winding 482 are formed, constant-current constant-voltage controller 479 and switching tube 487, described secondary winding 481 is also connected with secondary circuit 494, described auxiliary winding 482 is also connected with auxiliary power supply circuit 474, the base stage of described switching tube 487 is connected with the output of constant-current constant-voltage controller 479, the collector electrode of switching tube 487 is connected with armature winding 480, the emitter of switching tube 487 is by primary current sampling resistor 488 ground connection, described constant-current constant-voltage controller 479 comprises constant voltage module 490, frequency generator 491, constant flow module 492, or door 462, rest-set flip-flop 464 and driver module 466, the input of described constant voltage module 490 is for the voltage signal 400 of auxiliary winding 482 of sampling, the output of constant voltage module 490 and first of constant flow module 492, second output respectively with or three inputs of door 462 to be connected and for by the first cut-off signals 415, second cut-off signals 453 and the 3rd cut-off signals 461 are sent to or three inputs of door 462 respectively, the input of constant flow module 492 is connected the current signal 401 for armature winding 480 of sampling with the emitter of described switching tube 487, described or the output of door 462 and the R of rest-set flip-flop 463 hold be connected and for by or the cut-off signals 463 that generates of door 462 R that is sent to rest-set flip-flop 464 hold, the input of described frequency generator 491 is for sampling and receiving the voltage signal 400 of assisting winding 482, frequency generator 491 produce open signal 432 and export to rest-set flip-flop 464 S end, described rest-set flip-flop 464 opens signal 432 and cut-off signals 463 for receiving, generate modulation signal 465, the Q end of rest-set flip-flop 464 is connected with the input of driver module 466, described driver module 466 is for receiving modulation signal 465, and to described switching tube 487 output drive signal 467.
In the present embodiment,
Described frequency generator 491 comprises degaussing detection module 420, time delay module 430 and triangular-wave generator 433, the input of degaussing detection module 420 is as the input of frequency generator 491, the output degaussing time signal 421 of degaussing detection module 420, degaussing time signal 421 enters time delay module 430, after time delay, generation first is opened signal 432 and second and is opened signal 431, first opens the output signal of signal 432 as frequency generator 491 is delivered to by the output of described frequency generator 491 and holds with the S of rest-set flip-flop 464, triangular-wave generator 433 receives second and opens signal 431, generate triangular signal 434,
Described constant voltage module 490 comprises sampling and keeps module 410, first error amplifier 412, first comparator 414, sampling keep module 410 input as constant voltage module 490 input, sampling keeps the output signal 411 of module 410 to enter the first error amplifier 412, and generate first threshold signal 413, first threshold signal 413 and the triangular signal 434 generated by described triangular-wave generator 433 enter the first comparator 414, generate the first cut-off signals 415 and output signal as constant voltage module 490;
Described constant flow module 492 comprises current sample computing module 440, second error amplifier 450, second comparator 452 and the 3rd comparator 460, current sample computing module 440 as constant flow module 492 input and for the current signal 401 of armature winding 480 of sampling, output signal after calculating enters the second error amplifier 450, generate Second Threshold signal 451, Second Threshold signal 451 and the triangular signal 434 generated by described triangular-wave generator 433 enter the second comparator 452, and generate the second cut-off signals 453, simultaneously, primary winding current signal 401 enters the 3rd comparator 460, generate the 3rd cut-off signals 461.
With reference to being described below in detail and accompanying drawing, can comprehensive objects, features and advantages of the present invention.
Fig. 4 is that the constant current constant voltage formula inverse excitation type converter system of former according to an embodiment of the invention limit feedback simplifies diagram.This diagram is only example, and it should not limit the scope of claim undeservedly.Those skilled in the art will recognize that many variants, substitutions and modifications.
Fig. 5 is the simplified timing diagram of the constant current constant voltage formula inverse excitation type converter system of the former limit feedback of Fig. 4 embodiments of the invention.
Simplified timing diagram when Fig. 6 is the constant current constant voltage formula inverse excitation type converter system of the former limit feedback of Fig. 4 embodiments of the invention unloaded.
Power converting system shown in Fig. 4, in an example, signal 465 exports high level, and by driver module 466, generate drive singal 467, make switching tube 487 conducting, in armature winding 480, electric current linearly increases, storage power.Meanwhile, triangular signal 434 linearly rises increase.In another example, threshold signal 413 and triangular signal 434, enter comparator 414 together.Signal 434 exceedes threshold signal 413, then comparison signal 415 is logic high.Enter multichannel or door 462.
In another example, signal 465 output low level, by driver module 466, generate drive singal 467, switching tube 487 is ended, and be now stored in armature winding 480 energy and be released to secondary winding 481 and auxiliary winding 482, transformer completes degaussing.In demagnetization process, sampling keeps the voltage division signal 400 of module 410 to auxiliary winding 482 to sample, and output voltage signal 411.Signal 411 enters error amplifier 412 together with reference voltage Vref 1, carries out error amplification, output signal 413.
According to an example, primary winding current sampling resistor 488 for the current signal of detection of primary winding 480, formation voltage signal 401.Signal 401, signal 421, signal 432, enter current sample module 440 together, generates signal 441.In another example, signal 441 enters error amplifier 450 together with reference voltage Vref 2, carries out error amplification, exports threshold signal 451.In another example, threshold signal 451 and triangular signal 434, enter comparator 452 together.Triangular signal 434 linearly rises increase, and exceed threshold signal 451, then comparison signal 453 is logic high.
In another example; signal 401 is received by comparator 460, comparator also for receiving the threshold signal Vref3 of overcurrent protection, and by threshold signal Vref3 compared with signal 401; when signal 401 exceedes threshold signal Vref3, comparator 460 outputs signal 461 and becomes high level.
In an example, multichannel or door 462 Received signal strength 415, signal 453, signal 461, and output signal 463.Such as, signal 415 is high level, and signal 453 is low level, and signal 461 is low level, and so signal 463 is high level.Signal 415 is low level, and signal 453 is high level, and signal 461 is low level, and so signal 463 is high level.Signal 415 is low level, and signal 453 is low level, and signal 461 is high level, and so signal 363 is high level.Signal 315 is low level, and signal 353 is low level, and signal 361 is low level, and so signal 463 is low level.
According to an example, time delay module 430 receives degaussing time signal 421, signal 411, signal 441, and after certain delay time Tdis, output signal 432 becomes high level, enters rest-set flip-flop 464.In another example, time delay module 430 outputs signal 431, enters triangular-wave generator 433.
In an example, triangular-wave generator 433 receives triggering signal 431, and generates triangular signal 434.
In an example, rest-set flip-flop 464 Received signal strength 432 and signal 463, and responsively output signal 465.Such as, if signal 432 is logic high and 463 for logic low, then signal 465 is logic high.If signal 432 is logic high and 463 for logic high, then signal 465 is logic low.
Fig. 7 is in the constant current constant voltage formula inverse excitation type converter system of former limit feedback of Fig. 4 embodiments of the invention, the simplification diagram of degaussing detection module 420.This diagram is only example, and it should not limit the scope of claim undeservedly.Those skilled in the art will recognize that many variants, replacement and change.
Such as, degaussing detection module 420 comprises comparator 701, not gate 710 and 720, with door 730 and 750, and rest-set flip-flop 740.
Fig. 8 is the simplified timing diagram of Fig. 7 degaussing detection module 420.With reference to figure 4, Fig. 7 and Fig. 8, the voltage division signal 400 of auxiliary winding enters comparator 701, compared with threshold voltage (being 0.1V in Fig. 7), and output signal 702, after not gate 710, output signal 711.In another example, signal 465, after not gate 720, outputs signal 721.According to another example, with door 730 Received signal strength 711 and signal 721, output signal 731.
In an example, rest-set flip-flop 740, Received signal strength 465 and signal 731, and responsively output signal 741.Such as, if signal 731 is logic high and 465 for logic low, then signal 741 is logic high.If signal 731 is logic low and 465 for logic high, then signal 741 is logic low.
In an example, with door 750 Received signal strength 741 and 702, output signal 421.
Fig. 9 is that in the constant current constant voltage formula inverse excitation type converter system of former limit feedback of Fig. 4 embodiments of the invention, sampling keeps the simplification diagram of module 410.This diagram is only example, and it should not limit the scope of claim undeservedly.Those skilled in the art will recognize that many variants, replacement and change.
Figure 10 is that Fig. 9 samples and keeps the simplified timing diagram of module 410.
Sampling keep module 410 comprise: d type flip flop 901, with door 903, with door 904, with door 951, with door 952 and 971, current source 910, current source 911, current source 913 and 924, switch 921, switch 922, switch 923, switch 914, switch 991, electric capacity 931, electric capacity 932 and 981, comparator 941 and 942, monostable 955 and 956 or door 961.
With reference to figure 9 and Figure 10, degaussing time signal 421 is held with d type flip flop CLK and is connected, the D input of d type flip flop 901 with
output is connected and forms 2 frequency dividing circuits, carries out 2 frequency divisions to degaussing time signal 421, and the Q output of d type flip flop 901 and degaussing time signal 421 enter and door 903, and output signal 905, d type flip flop 901
output and degaussing time signal 421 enter and door 904, and output signal 906.Degaussing time signal 421 is divided into one-period degaussing time signal 905 and second period degaussing time signal 906.Current source 910 upper end is connected with constant voltage VDD, and lower end is connected with switch 921 upper end, and switch 921 lower end is connected with switch 922 upper end, switch 922 lower end and another current source 911 upper end, current source 911 lower end ground connection.Current source 913 upper end is connected with constant voltage VDD, and lower end is connected with switch 923 upper end, and switch 923 lower end is connected with switch 914 upper end, switch 914 lower end and another current source 924 upper end, current source 924 lower end ground connection.Signal 905 control switch 921 and 914.Signal 906 control switch 922 and 923.Switch 921 and the tie point of switch 922, be connected with electric capacity 931 one end simultaneously, and be connected with comparator 941 negative terminal, electric capacity 931 other end ground connection.Switch 923 and the tie point of switch 914, be connected with electric capacity 932 one end simultaneously, and be connected with comparator 942 negative terminal, electric capacity 932 other end ground connection.Comparator 941 and 942 positive input termination reference voltage 0.1V.The output of comparator 941 and signal 906 enter and door 951, output signal 953.The output of comparator 942 and signal 905 enter and door 952, output signal 954.Monostable 955 Received signal strength 953, and output pulse signal 957.Monostable 956 Received signal strength 954, and output pulse signal 958.Pulse signal 957 enters or door 961 together with 958, and outputs signal 962.Signal 962 and degaussing signal 421 enter and door 971, output signal 972.Switch 991 one end is connected with the voltage division signal 400 of auxiliary winding, and switch 991 other end is connected with electric capacity 981 one end, generates signal 411, electric capacity 981 other end ground connection.Signal 972 control switch 991.One-period degaussing time signal 905 is charged with constant current I by switch 921 pairs of capacitors 931, in the mode of integration, to one-period degaussing time signal 905, carries out stored record.Second period degaussing time signal 906 carries out constant current 2I electric discharge by switch 922 pairs of capacitors 931.When the voltage signal 925 of capacitor 931 is lower than 0.1V, trigger comparator 941 exports high level, and enters and door 951 with signal 906, and outputs signal 953, and signal 953 enters monostable 955 production burst signal 957.Second period degaussing time signal 906 is charged with constant current I by switch 923 pairs of capacitors 932, in the mode of integration, to second period degaussing time signal 906, carries out stored record.One-period degaussing time signal 905 carries out constant current 2I electric discharge by switch 914 pairs of capacitors 932.When the voltage signal 926 of capacitor 932 is lower than 0.1V, trigger comparator 942 exports high level, and enters and door 952 with signal 905, and outputs signal 954, and signal 954 enters monostable 956 production burst signal 958.Signal 957 and 958 warp or door 961 generate signal 962, and signal 962, through generating signal 972 with door 971, control switch 991, is sampled to the voltage division signal 400 of auxiliary winding.
Figure 11 is in the constant current constant voltage formula inverse excitation type converter system of former limit feedback of Fig. 4 embodiments of the invention, the simplification diagram of time delay module 430.This diagram is only example, and it should not limit the scope of claim undeservedly.Those skilled in the art will recognize that more changeable body, replacement and change.
Figure 12 is the simplified timing diagram of Figure 11 time delay module 430.
Time delay module 430 comprises: switch 1110, electric capacity 1120, resistance 1140, comparator 1150, multiplier 1130.With reference to Figure 11 and Figure 12.Degaussing time signal 421 control switch 1110.Switch 1110 one end is connected with voltage VDD, and the other end is connected with resistance 1140 with electric capacity 1120, and tie point signal is 1101.Electric capacity 1120 and resistance 1140 other end are connected to the ground.Signal 411 and 441 enters multiplier 1130, and multiplier 1130 outputs signal 1102.Signal 1101 is connected with negative input end with the positive input terminal of comparator 1150 respectively with signal 1102.Comparator 1150 outputs signal 431 and signal 432.
Such as, when degaussing time signal 421 controls to open switch 1110, electric capacity 1120 is charged; During shutoff, resistance 1140 pairs of electric capacity 1120 are utilized to carry out RC electric discharge.In another example, reflect the signal 411 and 441 of output voltage, output current information respectively, enter multiplier 1130, output signal 1102, signal 1102 reflects output power information.
According to another example, signal 1101 and signal 1102, enter comparator 1150, output signal 431 and 432.Control switch frequency.Make, power is larger, and signal 1102 is larger, and the Tdis time is shorter, and switching frequency is higher; Otherwise power is lower, signal 1102 is less, and Tdis is longer, and switching frequency is lower.
Figure 13 is in the constant current constant voltage formula inverse excitation type converter system of former limit feedback of Fig. 4 embodiments of the invention, the simplification diagram of triangular-wave generator 433.This diagram is only example, and it should not limit the scope of claim undeservedly.Those skilled in the art will recognize that more changeable body, replacement and change.
Figure 14 is the simplified timing diagram of Figure 13 triangular-wave generator 433.
Triangular-wave generator 433 comprises: d type flip flop 1310, not gate 1320 and 1380, switch 1330 and 1340, electric capacity 1360, current source 1150, comparator 1370.With reference to Figure 13 and Figure 14, the D input of d type flip flop 1310 is connected with voltage VDD, and signal 431 is connected with the CLK of d type flip flop 1310.The Q output control switch 1330 of d type flip flop 1310.The Q output of d type flip flop 1310, after not gate 1320, controls another switch 1340.Current source 1150 one end is connected with VDD, and the other end is connected with switch 1330 one end, and 1330 other ends are connected with another switch 1340 one end, switch 1340 other end ground connection.Switch 1330 is connected with electric capacity 1360 with the tie point of switch 1340 simultaneously, and is connected with the negative input end of comparator 1370.Electric capacity 1360 other end ground connection.Fixed voltage 2V is connected with the positive input terminal of comparator 1370, and comparator 1370 outputs signal 1371, and after not gate 1380, generate signal 1381, signal 1381 is connected with the CLR input of d type flip flop 1310.
Such as, signal 1311 and signal 1321 control switch 1330 and 1340 respectively, carries out charging and discharging to electric capacity 1360.Generate triangular signal 434.In another example, triangular signal 434 and 2V threshold value enter comparator 1370, and when signal 434 is more than 2V, exporting comparison signal 1371 is low level.According to another example, after signal 1371 enters not gate 1180, output signal 1381.According to another example, signal 431 and signal 1381 enter d type flip flop 1310, generate signal 1311.D type flip flop 1310, D inputs termination high level.If signal 431 is for high level and CLR input is low level, so d type flip flop Q output, export high level; If CLR input is high level, so d type flip flop Q output, output low level.
Figure 15 is that the former limit of Fig. 4 embodiments of the invention is fed back in the constant current constant voltage formula inverse excitation type converter system of building, the simplification diagram of current sample computing module 440.。This diagram is only example, and it should not limit the scope of claim undeservedly.Those skilled in the art will recognize that more changeable body, replacement and change.
Figure 16 is the simplified timing diagram of Figure 15 current sample computing module 440.
Current sample computing module 440 comprises: switch 1510, switch 1530, switch 1531, switch 1532, electric capacity 1520, electric capacity 1560, resistance 1540, not gate 1553, XOR gate 1550.
With reference to Figure 15 and Figure 16, switch 1510 one end is connected with signal 401, and the other end is connected with electric capacity 1520, and tie point signal is 1511.Electric capacity 1520 other end ground connection.Switch 1530 one end is connected with signal 1511, and the other end is connected with 1532 with switch 1531, is connected with resistance 1540 simultaneously.Switch 1531 other end ground connection.Switch 1532 other end ground connection.Resistance 1540 other end is connected with electric capacity 1560, and tie point signal is 441.Electric capacity 1560 other end ground connection.Signal 421 generates signal 1552 after not gate 1553.Signal 432 and signal 1552, enter XOR gate 1550, and output signal 1551.Signal 432 control switch 1510.Signal 421 control switch 1530.Signal 432 control switch 1531.Signal 1551 control switch 1532.
Signal 432 control switch 1510 pairs of signals 401 carry out peak value sampling, and the voltage max of signal 401 is remained on electric capacity 1520.In another example, signal 421, signal 432 and signal 1551, control switch 1530, switch 1531 and switch 1532, carry out discharge and recharge by resistance 1540 pairs of electric capacity 1560 respectively.
According to another example, signal 421 generates signal 1552 behind the door through non-, and signal 1552 enters XOR gate 1550 together with signal 432, and generates signal 1551.When signal 1552 is logic high and signal 432 is logic low, signal 1551 is high level; When signal 1552 is logic low and signal 432 is logic high, signal 1551 is high level; When signal 1552 is logic high and signal 432 is logic high, signal 1551 is low level; When signal 1552 is logic low and signal 432 is logic low, signal 1551 is low level.
See Figure 16, the service time Ton of the time representation switch pipe 487 of signal 432 high level, signal 421 is the time of high level represent transformer degaussing time Tdemag, and signal 1551 represents delay time Tdis.
Electric capacity 1560 capacity relative is comparatively large, and signal 441 magnitude of voltage is basicly stable, obviously can not fluctuate because of discharge and recharge.So in a switch periods, the charging charge of electric capacity 1560 equals discharge charge substantially.The crest voltage supposing signal 401 is Vcs, supposes that the magnitude of voltage of signal 441 is Vavg.
So
(formula 4)
Draw,
(formula 5)
Suppose, peak primary currents is Ip, armature winding number of turn Np, secondary winding turns Ns, and output current is Iout
Output current
(formula 6)
As can be seen from formula 6, in fact the magnitude of voltage Vavg of signal 441 is directly proportional with output current.
An example according to Fig. 4, signal 441 enters error amplifier 450 together with Vref2, output error amplifying signal 451.In another example, error amplification signal 451 enters comparator 452 together with triangular signal 434, and exports comparison signal 453.When triangular signal 434 magnitude of voltage exceedes error amplification signal 451, comparison signal 453 becomes high level.In another example, signal 453 becomes high level, so through or door 462 after, output signal 463 becomes high level.According to another example, signal 463 high level triggered RS flip-flop 464, output signal 465 becomes low level.In another example, signal 465 level enters driver module 466, and outputs signal 367 on-off switching tubes 487.
With reference to system shown in Figure 4, when output current strengthens gradually, the magnitude of voltage Vavg of the output signal 441 of current sample computing module 440 strengthens gradually, when Vavg equals Vref2, form feedback control loop, by turning on and off of control switch pipe 487, Vavg is no longer increased, thus restriction output current, play the effect of constant output current.
Finally, it is also noted that above citing be only certain specific embodiment of the present invention.Obviously, the invention is not restricted to above embodiment, many distortion can also be had.All distortion that those of ordinary skill in the art can directly derive from content disclosed by the invention or associate, all should think protection scope of the present invention.
Claims (1)
1. the constant current constant voltage formula inverse excitation type converter fed back based on former limit, comprise: rectifier bridge (470), ∏ mode filter (471), absorbing circuit (472), by armature winding (480), the transformer (473) that secondary winding (481) and auxiliary winding (482) are formed, constant-current constant-voltage controller (479) and switching tube (487), described secondary winding (481) is also connected with secondary circuit (494), described auxiliary winding (482) is also connected with auxiliary power supply circuit (474), the base stage of described switching tube (487) is connected with the output of constant-current constant-voltage controller (479), the collector electrode of switching tube (487) is connected with armature winding (480), the emitter of switching tube (487) is by primary current sampling resistor (488) ground connection, it is characterized in that, described constant-current constant-voltage controller (479) comprises constant voltage module (490), frequency generator (491), constant flow module (492), or door (462), rest-set flip-flop (464) and driver module (466), the input of described constant voltage module (490) is for the voltage signal (400) of auxiliary winding (482) of sampling, the output of constant voltage module (490) and first of constant flow module (492), second output respectively with or three inputs of door (462) to be connected and for by the first cut-off signals (415), second cut-off signals (453) and the 3rd cut-off signals (461) are sent to or three inputs of door (462) respectively, the input of constant flow module (492) is connected the current signal (401) for armature winding of sampling (480) with the emitter of described switching tube (487), output and the R of rest-set flip-flop (464) of described or door (462) hold be connected and for by or the cut-off signals (463) that generates of door (462) R that is sent to rest-set flip-flop (464) hold, the input of described frequency generator (491) is used for sampling and receives the voltage signal (400) of auxiliary winding (482), frequency generator (491) produces first and opens signal (432), and the S end that signal (432) exports rest-set flip-flop (464) to is opened by first, described rest-set flip-flop (464) opens signal (432) and cut-off signals (463) for receiving first, generate modulation signal (465), the Q end of rest-set flip-flop (464) is connected with the input of driver module (466), described driver module (466) is for receiving modulation signal (465), and to described switching tube (487) output drive signal (467),
Described frequency generator (491) comprises degaussing detection module (420), time delay module (430) and triangular-wave generator (433), the input of degaussing detection module (420) is as the input of frequency generator (491), degaussing detection module (420) exports degaussing time signal (421), degaussing time signal (421) enters time delay module (430), after time delay, generation first is opened signal (432) and second and is opened signal (431), first opens the output signal of signal (432) as frequency generator (491) is delivered to rest-set flip-flop (464) S end by the output of described frequency generator (491), triangular-wave generator (433) receives second and opens signal (431), generate triangular signal (434),
Described constant voltage module (490) comprises sampling and keeps module (410), first error amplifier (412), first comparator (414), sampling keeps the input of input as constant voltage module (490) of module (410), sampling keeps the output signal (411) of module (410) to enter the first error amplifier (412), and generate first threshold signal (413), first threshold signal (413) and the triangular signal (434) generated by described triangular-wave generator (433) enter the first comparator (414), generate the first cut-off signals (415) and output signal as constant voltage module (490),
Described constant flow module (492) comprises current sample computing module (440), second error amplifier (450), second comparator (452) and the 3rd comparator (460), current sample computing module (440) as constant flow module (492) input and for the current signal (401) of armature winding of sampling (480), output signal after calculating enters the second error amplifier (450), generate Second Threshold signal (451), Second Threshold signal (451) and the triangular signal (434) generated by described triangular-wave generator (433) enter the second comparator (452), and generate the second cut-off signals (453), simultaneously, primary winding current signal (401) enters the 3rd comparator (460), generate the 3rd cut-off signals (461).
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| CN102570837B (en) * | 2012-02-28 | 2014-09-03 | 矽力杰半导体技术(杭州)有限公司 | Constant voltage constant current control circuit and control method thereof |
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Address after: Suzhou City, Jiangsu province 215000 Industrial Park Suzhou Xinping Street No. 388 Suzhou innovation park off the 23 building 3 layer 09, 10 unit Patentee after: SUZHOU INTELLI-CHIPLINK ELECTRONICS TECHNOLOGY CO., LTD. Address before: Suzhou City, Jiangsu province 215000 Industrial Park Suzhou Xinping Street No. 388 Suzhou innovation park off the 23 building 3 layer 09, 10 unit Patentee before: Suzhou Zhipu Xinlian Electronic Technology Co., Ltd. |